* [PATCH v2,0/3] Add mt8186 dsi compatoble & Convert
@ 2022-02-18 10:07 xinlei.lee
2022-02-18 10:07 ` [PATCH v2,1/3] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml xinlei.lee
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: xinlei.lee @ 2022-02-18 10:07 UTC (permalink / raw)
To: chunkuang.hu, p.zabel, airlied, daniel, matthias.bgg
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, allen-kh.cheng,
rex-bc.chen, Xinlei Lee
From: Xinlei Lee <xinlei.lee@mediatek.com>
V1 title:Add mt8186 dsi compatoble & Move the getting bridge node
function
The modification is based on avoiding EPROBE_DEFER loop:
https://patchwork.kernel.org/project/linux-mediatek/patch/20220131085520.287105-1-angelogioacchino.delregno@collabora.com/
Changes since v1:
1. Delete the mediatek,dsi.txt & Add the mediatek,dsi.yaml.
2. Ignore the Move the getting bridge node function patch for V1.
Xinlei Lee (3):
dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
dt-bindings: display: mediatek: dsi: Add compatible for MediaTek
MT8186
drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c
.../display/mediatek/mediatek,dsi.txt | 62 -------------
.../display/mediatek/mediatek,dsi.yaml | 86 +++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++
3 files changed, 94 insertions(+), 62 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
--
2.18.0
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2,1/3] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
2022-02-18 10:07 [PATCH v2,0/3] Add mt8186 dsi compatoble & Convert xinlei.lee
@ 2022-02-18 10:07 ` xinlei.lee
2022-03-04 12:03 ` [PATCH v2, 1/3] " AngeloGioacchino Del Regno
2022-02-18 10:07 ` [PATCH v2,2/3] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 xinlei.lee
2022-02-18 10:07 ` [PATCH v2,3/3] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c xinlei.lee
2 siblings, 1 reply; 7+ messages in thread
From: xinlei.lee @ 2022-02-18 10:07 UTC (permalink / raw)
To: chunkuang.hu, p.zabel, airlied, daniel, matthias.bgg
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, allen-kh.cheng,
rex-bc.chen, Xinlei Lee
From: Xinlei Lee <xinlei.lee@mediatek.com>
Convert mediatek,dsi.txt to mediatek,dsi.yaml format
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
---
.../display/mediatek/mediatek,dsi.txt | 62 --------------
.../display/mediatek/mediatek,dsi.yaml | 85 +++++++++++++++++++
2 files changed, 85 insertions(+), 62 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
deleted file mode 100644
index 36b01458f45c..000000000000
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
+++ /dev/null
@@ -1,62 +0,0 @@
-Mediatek DSI Device
-===================
-
-The Mediatek DSI function block is a sink of the display subsystem and can
-drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
-channel output.
-
-Required properties:
-- compatible: "mediatek,<chip>-dsi"
-- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
-- reg: Physical base address and length of the controller's registers
-- interrupts: The interrupt signal from the function block.
-- clocks: device clocks
- See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
-- clock-names: must contain "engine", "digital", and "hs"
-- phys: phandle link to the MIPI D-PHY controller.
-- phy-names: must contain "dphy"
-- port: Output port node with endpoint definitions as described in
- Documentation/devicetree/bindings/graph.txt. This port should be connected
- to the input port of an attached DSI panel or DSI-to-eDP encoder chip.
-
-Optional properties:
-- resets: list of phandle + reset specifier pair, as described in [1].
-
-[1] Documentation/devicetree/bindings/reset/reset.txt
-
-MIPI TX Configuration Module
-============================
-
-See phy/mediatek,dsi-phy.yaml
-
-Example:
-
-mipi_tx0: mipi-dphy@10215000 {
- compatible = "mediatek,mt8173-mipi-tx";
- reg = <0 0x10215000 0 0x1000>;
- clocks = <&clk26m>;
- clock-output-names = "mipi_tx0_pll";
- #clock-cells = <0>;
- #phy-cells = <0>;
- drive-strength-microamp = <4600>;
- nvmem-cells= <&mipi_tx_calibration>;
- nvmem-cell-names = "calibration-data";
-};
-
-dsi0: dsi@1401b000 {
- compatible = "mediatek,mt8173-dsi";
- reg = <0 0x1401b000 0 0x1000>;
- interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>,
- <&mipi_tx0>;
- clock-names = "engine", "digital", "hs";
- resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>;
- phys = <&mipi_tx0>;
- phy-names = "dphy";
-
- port {
- dsi0_out: endpoint {
- remote-endpoint = <&panel_in>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
new file mode 100644
index 000000000000..552a013786fe
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: mediatek DSI Controller Device Tree Bindings
+
+maintainers:
+ - CK Hu <ck.hu@mediatek.com>
+ - Jitao Shi <jitao.shi@mediatek.com>
+ - Xinlei Lee <xinlei.lee@mediatek.com>
+
+properties:
+ compatible:
+ enum:
+ - mediatek,mt2701-dsi
+ - mediatek,mt8173-dsi
+ - mediatek,mt8183-dsi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Engine Clock
+ - description: Digital Clock
+ - description: Hs Clock
+
+ clock-names:
+ items:
+ - const: engine
+ - const: digital
+ - const: hs
+
+ resets:
+ maxItems: 1
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: dphy
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - power-domains
+ - clocks
+ - clock-names
+ - phys
+ - phy-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8183-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/power/mt8183-power.h>
+ #include <dt-bindings/phy/phy.h>
+ #include <dt-bindings/reset/mt8183-resets.h>
+
+ dsi0: dsi@14014000 {
+ compatible = "mediatek,mt8183-dsi";
+ reg = <0x14014000 0x1000>;
+ interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
+ clocks = <&mmsys CLK_MM_DSI0_MM>,
+ <&mmsys CLK_MM_DSI0_IF>,
+ <&mipi_tx0>;
+ clock-names = "engine", "digital", "hs";
+ resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
+ phys = <&mipi_tx0>;
+ phy-names = "dphy";
+ };
--
2.18.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2,2/3] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186
2022-02-18 10:07 [PATCH v2,0/3] Add mt8186 dsi compatoble & Convert xinlei.lee
2022-02-18 10:07 ` [PATCH v2,1/3] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml xinlei.lee
@ 2022-02-18 10:07 ` xinlei.lee
2022-03-04 12:04 ` [PATCH v2, 2/3] " AngeloGioacchino Del Regno
2022-02-18 10:07 ` [PATCH v2,3/3] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c xinlei.lee
2 siblings, 1 reply; 7+ messages in thread
From: xinlei.lee @ 2022-02-18 10:07 UTC (permalink / raw)
To: chunkuang.hu, p.zabel, airlied, daniel, matthias.bgg
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, allen-kh.cheng,
rex-bc.chen, Xinlei Lee
From: Xinlei Lee <xinlei.lee@mediatek.com>
Add dt-binding documentation of dsi for MediaTek MT8186 SoC.
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
---
.../devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
index 552a013786fe..cdacb2d0d11c 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
@@ -17,6 +17,7 @@ properties:
- mediatek,mt2701-dsi
- mediatek,mt8173-dsi
- mediatek,mt8183-dsi
+ - mediatek,mt8186-dsi
reg:
maxItems: 1
--
2.18.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2,3/3] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c
2022-02-18 10:07 [PATCH v2,0/3] Add mt8186 dsi compatoble & Convert xinlei.lee
2022-02-18 10:07 ` [PATCH v2,1/3] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml xinlei.lee
2022-02-18 10:07 ` [PATCH v2,2/3] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 xinlei.lee
@ 2022-02-18 10:07 ` xinlei.lee
2022-03-04 12:05 ` AngeloGioacchino Del Regno
2 siblings, 1 reply; 7+ messages in thread
From: xinlei.lee @ 2022-02-18 10:07 UTC (permalink / raw)
To: chunkuang.hu, p.zabel, airlied, daniel, matthias.bgg
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, allen-kh.cheng,
rex-bc.chen, Xinlei Lee
From: Xinlei Lee <xinlei.lee@mediatek.com>
Add the compatible because use different cmdq addresses in mt8186.
Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
index bced4c7d668e..8c61c4f412bc 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
@@ -1140,6 +1140,12 @@ static const struct mtk_dsi_driver_data mt8183_dsi_driver_data = {
.has_size_ctl = true,
};
+static const struct mtk_dsi_driver_data mt8186_dsi_driver_data = {
+ .reg_cmdq_off = 0xd00,
+ .has_shadow_ctl = true,
+ .has_size_ctl = true,
+};
+
static const struct of_device_id mtk_dsi_of_match[] = {
{ .compatible = "mediatek,mt2701-dsi",
.data = &mt2701_dsi_driver_data },
@@ -1147,6 +1153,8 @@ static const struct of_device_id mtk_dsi_of_match[] = {
.data = &mt8173_dsi_driver_data },
{ .compatible = "mediatek,mt8183-dsi",
.data = &mt8183_dsi_driver_data },
+ { .compatible = "mediatek,mt8186-dsi",
+ .data = &mt8186_dsi_driver_data },
{ },
};
MODULE_DEVICE_TABLE(of, mtk_dsi_of_match);
--
2.18.0
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2, 1/3] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml
2022-02-18 10:07 ` [PATCH v2,1/3] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml xinlei.lee
@ 2022-03-04 12:03 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 7+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-03-04 12:03 UTC (permalink / raw)
To: xinlei.lee, chunkuang.hu, p.zabel, airlied, daniel, matthias.bgg
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, allen-kh.cheng,
rex-bc.chen
Il 18/02/22 11:07, xinlei.lee@mediatek.com ha scritto:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Convert mediatek,dsi.txt to mediatek,dsi.yaml format
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
> ---
> .../display/mediatek/mediatek,dsi.txt | 62 --------------
> .../display/mediatek/mediatek,dsi.yaml | 85 +++++++++++++++++++
> 2 files changed, 85 insertions(+), 62 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> deleted file mode 100644
> index 36b01458f45c..000000000000
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt
> +++ /dev/null
> @@ -1,62 +0,0 @@
> -Mediatek DSI Device
> -===================
> -
> -The Mediatek DSI function block is a sink of the display subsystem and can
> -drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-
> -channel output.
> -
> -Required properties:
> -- compatible: "mediatek,<chip>-dsi"
> -- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.
> -- reg: Physical base address and length of the controller's registers
> -- interrupts: The interrupt signal from the function block.
> -- clocks: device clocks
> - See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
> -- clock-names: must contain "engine", "digital", and "hs"
> -- phys: phandle link to the MIPI D-PHY controller.
> -- phy-names: must contain "dphy"
> -- port: Output port node with endpoint definitions as described in
> - Documentation/devicetree/bindings/graph.txt. This port should be connected
> - to the input port of an attached DSI panel or DSI-to-eDP encoder chip.
> -
> -Optional properties:
> -- resets: list of phandle + reset specifier pair, as described in [1].
> -
> -[1] Documentation/devicetree/bindings/reset/reset.txt
> -
> -MIPI TX Configuration Module
> -============================
> -
> -See phy/mediatek,dsi-phy.yaml
> -
> -Example:
> -
> -mipi_tx0: mipi-dphy@10215000 {
> - compatible = "mediatek,mt8173-mipi-tx";
> - reg = <0 0x10215000 0 0x1000>;
> - clocks = <&clk26m>;
> - clock-output-names = "mipi_tx0_pll";
> - #clock-cells = <0>;
> - #phy-cells = <0>;
> - drive-strength-microamp = <4600>;
> - nvmem-cells= <&mipi_tx_calibration>;
> - nvmem-cell-names = "calibration-data";
> -};
> -
> -dsi0: dsi@1401b000 {
> - compatible = "mediatek,mt8173-dsi";
> - reg = <0 0x1401b000 0 0x1000>;
> - interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_LOW>;
> - clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>,
> - <&mipi_tx0>;
> - clock-names = "engine", "digital", "hs";
> - resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>;
> - phys = <&mipi_tx0>;
> - phy-names = "dphy";
> -
> - port {
> - dsi0_out: endpoint {
> - remote-endpoint = <&panel_in>;
> - };
> - };
> -};
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
> new file mode 100644
> index 000000000000..552a013786fe
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
> @@ -0,0 +1,85 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: mediatek DSI Controller Device Tree Bindings
Shouldn't this be "MediaTek"?
> +
> +maintainers:
> + - CK Hu <ck.hu@mediatek.com>
> + - Jitao Shi <jitao.shi@mediatek.com>
> + - Xinlei Lee <xinlei.lee@mediatek.com>
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt2701-dsi
> + - mediatek,mt8173-dsi
> + - mediatek,mt8183-dsi
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + power-domains:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Engine Clock
> + - description: Digital Clock
> + - description: Hs Clock
HS should be all capital letters.
> +
> + clock-names:
> + items:
> + - const: engine
> + - const: digital
> + - const: hs
> +
> + resets:
> + maxItems: 1
> +
> + phys:
> + maxItems: 1
> +
> + phy-names:
> + items:
> + - const: dphy
Add #address-cells, #size-cells with const 2
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - power-domains
> + - clocks
> + - clock-names
> + - phys
> + - phy-names
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8183-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/mt8183-power.h>
> + #include <dt-bindings/phy/phy.h>
> + #include <dt-bindings/reset/mt8183-resets.h>
> +
Since all users are using two address and size cells:
soc {
#address-cells = <2>;
#size-cells = <2>;
dsi0: dsi@14014000 {
compatible = "mediatek,mt8183-dsi";
reg = <0 0x14014000 0 0x1000>;
.....etc.....
};
};
> + dsi0: dsi@14014000 {
> + compatible = "mediatek,mt8183-dsi";
> + reg = <0x14014000 0x1000>;
> + interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_LOW>;
> + power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
> + clocks = <&mmsys CLK_MM_DSI0_MM>,
> + <&mmsys CLK_MM_DSI0_IF>,
> + <&mipi_tx0>;
> + clock-names = "engine", "digital", "hs";
> + resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
> + phys = <&mipi_tx0>;
> + phy-names = "dphy";
> + };
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2, 2/3] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186
2022-02-18 10:07 ` [PATCH v2,2/3] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 xinlei.lee
@ 2022-03-04 12:04 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 7+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-03-04 12:04 UTC (permalink / raw)
To: xinlei.lee, chunkuang.hu, p.zabel, airlied, daniel, matthias.bgg
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, allen-kh.cheng,
rex-bc.chen
Il 18/02/22 11:07, xinlei.lee@mediatek.com ha scritto:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Add dt-binding documentation of dsi for MediaTek MT8186 SoC.
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
> .../devicetree/bindings/display/mediatek/mediatek,dsi.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
> index 552a013786fe..cdacb2d0d11c 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml
> @@ -17,6 +17,7 @@ properties:
> - mediatek,mt2701-dsi
> - mediatek,mt8173-dsi
> - mediatek,mt8183-dsi
> + - mediatek,mt8186-dsi
>
> reg:
> maxItems: 1
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v2,3/3] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c
2022-02-18 10:07 ` [PATCH v2,3/3] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c xinlei.lee
@ 2022-03-04 12:05 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 7+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-03-04 12:05 UTC (permalink / raw)
To: xinlei.lee, chunkuang.hu, p.zabel, airlied, daniel, matthias.bgg
Cc: dri-devel, linux-mediatek, linux-arm-kernel, linux-kernel,
Project_Global_Chrome_Upstream_Group, jitao.shi, allen-kh.cheng,
rex-bc.chen
Il 18/02/22 11:07, xinlei.lee@mediatek.com ha scritto:
> From: Xinlei Lee <xinlei.lee@mediatek.com>
>
> Add the compatible because use different cmdq addresses in mt8186.
>
> Signed-off-by: Xinlei Lee <xinlei.lee@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
> drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index bced4c7d668e..8c61c4f412bc 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
> @@ -1140,6 +1140,12 @@ static const struct mtk_dsi_driver_data mt8183_dsi_driver_data = {
> .has_size_ctl = true,
> };
>
> +static const struct mtk_dsi_driver_data mt8186_dsi_driver_data = {
> + .reg_cmdq_off = 0xd00,
> + .has_shadow_ctl = true,
> + .has_size_ctl = true,
> +};
> +
> static const struct of_device_id mtk_dsi_of_match[] = {
> { .compatible = "mediatek,mt2701-dsi",
> .data = &mt2701_dsi_driver_data },
> @@ -1147,6 +1153,8 @@ static const struct of_device_id mtk_dsi_of_match[] = {
> .data = &mt8173_dsi_driver_data },
> { .compatible = "mediatek,mt8183-dsi",
> .data = &mt8183_dsi_driver_data },
> + { .compatible = "mediatek,mt8186-dsi",
> + .data = &mt8186_dsi_driver_data },
> { },
> };
> MODULE_DEVICE_TABLE(of, mtk_dsi_of_match);
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-03-04 12:05 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2022-02-18 10:07 [PATCH v2,0/3] Add mt8186 dsi compatoble & Convert xinlei.lee
2022-02-18 10:07 ` [PATCH v2,1/3] dt-bindings: display: mediatek: dsi: Convert dsi_dtbinding to .yaml xinlei.lee
2022-03-04 12:03 ` [PATCH v2, 1/3] " AngeloGioacchino Del Regno
2022-02-18 10:07 ` [PATCH v2,2/3] dt-bindings: display: mediatek: dsi: Add compatible for MediaTek MT8186 xinlei.lee
2022-03-04 12:04 ` [PATCH v2, 2/3] " AngeloGioacchino Del Regno
2022-02-18 10:07 ` [PATCH v2,3/3] drm/mediatek: Add mt8186 dsi compatible to mtk_dsi.c xinlei.lee
2022-03-04 12:05 ` AngeloGioacchino Del Regno
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