From: Vidya Sagar <vidyas@nvidia.com>
To: Rob Herring <robh@kernel.org>
Cc: <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
<mark.rutland@arm.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <kishon@ti.com>,
<catalin.marinas@arm.com>, <will.deacon@arm.com>,
<jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
<mperttunen@nvidia.com>, <linux-pci@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
<mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>
Subject: Re: [PATCH V5 07/16] dt-bindings: PCI: designware: Add binding for CDM register check
Date: Tue, 7 May 2019 13:55:42 +0530 [thread overview]
Message-ID: <031df2ca-27de-2388-5f23-078320203f5d@nvidia.com> (raw)
In-Reply-To: <20190426143247.GA25107@bogus>
On 4/26/2019 8:02 PM, Rob Herring wrote:
> On Wed, Apr 24, 2019 at 10:49:55AM +0530, Vidya Sagar wrote:
>> Add support to enable CDM (Configuration Dependent Module) registers check
>> for any data corruption. CDM registers include standard PCIe configuration
>> space registers, Port Logic registers and iATU and DMA registers.
>> Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook
>> Version 4.90a
>>
>> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
>> ---
>> Changes since [v4]:
>> * None
>>
>> Changes since [v3]:
>> * None
>>
>> Changes since [v2]:
>> * Changed flag name from 'cdm-check' to 'enable-cdm-check'
>> * Added info about Port Logic and DMA registers being part of CDM
>>
>> Changes since [v1]:
>> * This is a new patch in v2 series
>>
>> Documentation/devicetree/bindings/pci/designware-pcie.txt | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> index 5561a1c060d0..85b872c42a9f 100644
>> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
>> @@ -34,6 +34,11 @@ Optional properties:
>> - clock-names: Must include the following entries:
>> - "pcie"
>> - "pcie_bus"
>> +- enable-cdm-check: This is a boolean property and if present enables
>
> This needs a vendor prefix.
Why only for this? Since this whole file is for Synopsys DesignWare core based PCIe IP,
I thought there is specific prefix required. Am I wrong? Also, CDM checking is a feature
of IP and DWC based implementations can choose either to enable this feature at hardware level
or not. And whoever enabled it at hardware level (like Tegra194) can set this flag to
enable corresponding software support.
>
>> + automatic checking of CDM (Configuration Dependent Module) registers
>> + for data corruption. CDM registers include standard PCIe configuration
>> + space registers, Port Logic registers, DMA and iATU (internal Address
>> + Translation Unit) registers.
>> RC mode:
>> - num-viewport: number of view ports configured in hardware. If a platform
>> does not specify it, the driver assumes 2.
>> --
>> 2.17.1
>>
next prev parent reply other threads:[~2019-05-07 8:25 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-24 5:19 [PATCH V5 00/16] Add Tegra194 PCIe support Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 01/16] PCI: Add #defines for some of PCIe spec r4.0 features Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 02/16] PCI/PME: Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs Vidya Sagar
2019-05-03 11:01 ` Thierry Reding
2019-05-07 7:10 ` Vidya Sagar
2019-05-07 7:51 ` Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 03/16] PCI: Export pcie_bus_config symbol Vidya Sagar
2019-05-03 11:07 ` Thierry Reding
2019-05-10 6:21 ` Vidya Sagar
2019-05-10 16:46 ` Bjorn Helgaas
2019-05-10 17:50 ` Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 04/16] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-05-03 11:13 ` Thierry Reding
2019-05-07 7:49 ` Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 05/16] PCI: dwc: Move config space capability search API Vidya Sagar
2019-04-24 8:13 ` Gustavo Pimentel
2019-05-07 8:04 ` Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 06/16] PCI: dwc: Add ext " Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 07/16] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-04-26 14:32 ` Rob Herring
2019-05-07 8:25 ` Vidya Sagar [this message]
2019-05-13 15:15 ` Rob Herring
2019-05-14 5:29 ` Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 08/16] PCI: dwc: Add support to enable " Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 09/16] Documentation/devicetree: Add PCIe supports-clkreq property Vidya Sagar
2019-04-26 15:22 ` Rob Herring
2019-05-07 8:31 ` Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 10/16] dt-bindings: PCI: tegra: Add device tree support for T194 Vidya Sagar
2019-04-26 15:43 ` Rob Herring
2019-05-07 9:20 ` Vidya Sagar
2019-05-13 15:20 ` Rob Herring
2019-05-14 6:25 ` Vidya Sagar
2019-05-03 11:19 ` Thierry Reding
2019-05-07 9:26 ` Vidya Sagar
2019-04-24 5:19 ` [PATCH V5 11/16] dt-bindings: PHY: P2U: Add Tegra 194 P2U block Vidya Sagar
2019-04-26 15:45 ` Rob Herring
2019-04-26 16:07 ` Thierry Reding
2019-04-26 18:05 ` Rob Herring
2019-05-07 9:57 ` Vidya Sagar
2019-04-24 5:20 ` [PATCH V5 12/16] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT Vidya Sagar
2019-05-03 11:26 ` Thierry Reding
2019-05-07 10:10 ` Vidya Sagar
2019-04-24 5:20 ` [PATCH V5 13/16] arm64: tegra: Enable PCIe slots in P2972-0000 board Vidya Sagar
2019-05-03 11:27 ` Thierry Reding
2019-05-07 10:11 ` Vidya Sagar
2019-04-24 5:20 ` [PATCH V5 14/16] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-05-03 11:35 ` Thierry Reding
2019-05-07 10:25 ` Vidya Sagar
2019-04-24 5:20 ` [PATCH V5 15/16] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-05-03 13:08 ` Thierry Reding
2019-05-07 13:54 ` Vidya Sagar
2019-04-24 5:20 ` [PATCH V5 16/16] arm64: Add Tegra194 PCIe driver to defconfig Vidya Sagar
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