From: Jon Hunter <jonathanh@nvidia.com>
To: Aapo Vienamo <avienamo@nvidia.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Thierry Reding <thierry.reding@gmail.com>,
Mikko Perttunen <mperttunen@nvidia.com>
Cc: <devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/6] soc/tegra: pmc: Factor out DPD register bit calculation
Date: Wed, 11 Jul 2018 09:24:57 +0100 [thread overview]
Message-ID: <040dce71-36c8-f2e6-cdf0-a848294862c4@nvidia.com> (raw)
In-Reply-To: <1531226879-11802-3-git-send-email-avienamo@nvidia.com>
On 10/07/18 13:47, Aapo Vienamo wrote:
> Factor out the the code to calculate the correct DPD register and bit
> number for a given pad. This logic will be needed to query the status
> register.
>
> Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> ---
> drivers/soc/tegra/pmc.c | 20 +++++++++++++++++---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index 5bea3b9..83b39cd 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -922,11 +922,12 @@ tegra_io_pad_find(struct tegra_pmc *pmc, enum tegra_io_pad id)
> return NULL;
> }
>
> -static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
> - unsigned long *status, u32 *mask)
> +static int tegra_io_pad_get_dpd_register_bit(enum tegra_io_pad id,
> + unsigned long *request,
> + unsigned long *status,
> + u32 *mask)
> {
> const struct tegra_io_pad_soc *pad;
> - unsigned long rate, value;
>
> pad = tegra_io_pad_find(pmc, id);
> if (!pad) {
> @@ -947,6 +948,19 @@ static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
> *request = pmc->soc->regs->dpd2_req;
> }
>
> + return 0;
> +}
> +
> +static int tegra_io_pad_prepare(enum tegra_io_pad id, unsigned long *request,
> + unsigned long *status, u32 *mask)
> +{
> + unsigned long rate, value;
> + int err;
> +
> + err = tegra_io_pad_get_dpd_register_bit(id, request, status, mask);
> + if (err)
> + return err;
> +
> if (pmc->clk) {
> rate = clk_get_rate(pmc->clk);
> if (!rate) {
>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Cheers
Jon
--
nvpublic
next prev parent reply other threads:[~2018-07-11 8:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-10 12:47 [PATCH 0/6] Tegra PMC pinctrl pad configuration Aapo Vienamo
2018-07-10 12:47 ` [PATCH 1/6] soc/tegra: pmc: Fix pad voltage configuration for Tegra186 Aapo Vienamo
2018-07-11 8:08 ` Jon Hunter
2018-07-10 12:47 ` [PATCH 2/6] soc/tegra: pmc: Factor out DPD register bit calculation Aapo Vienamo
2018-07-11 8:24 ` Jon Hunter [this message]
2018-07-10 12:47 ` [PATCH 3/6] soc/tegra: pmc: Implement tegra_io_pad_is_powered() Aapo Vienamo
2018-07-11 8:27 ` Jon Hunter
2018-07-10 12:47 ` [PATCH 4/6] soc/tegra: pmc: Use X macro to generate IO pad tables Aapo Vienamo
2018-07-11 8:30 ` Jon Hunter
2018-07-11 9:23 ` Aapo Vienamo
2018-07-11 9:43 ` Jon Hunter
2018-07-10 12:54 ` [PATCH 5/6] dt-bindings: Add Tegra PMC pad configuration bindings Aapo Vienamo
2018-07-11 8:32 ` Jon Hunter
2018-07-10 12:54 ` [PATCH 6/6] soc/tegra: pmc: Implement pad configuration via pinctrl Aapo Vienamo
2018-07-11 8:40 ` Jon Hunter
2018-07-11 9:38 ` Aapo Vienamo
2018-07-11 9:46 ` Jon Hunter
2018-07-11 10:12 ` Aapo Vienamo
2018-07-11 11:42 ` Jon Hunter
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