* [PATCH 1/4] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties
2023-02-17 18:52 [PATCH 0/4] RZ/G2L SSI: Update interrupt numbers Prabhakar
@ 2023-02-17 18:52 ` Prabhakar
2023-02-18 10:11 ` Krzysztof Kozlowski
2023-02-17 18:52 ` [PATCH 2/4] ASoC: sh: rz-ssi: Update interrupt handling for half duplex channels Prabhakar
` (3 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Prabhakar @ 2023-02-17 18:52 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai
Cc: alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar, Biju Das, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
From R01UH0914EJ0120 Rev.1.20 HW manual, for full duplex channels
(SSI0/1/3) dma_rt interrupt has now being marked as reserved and similarly
for half duplex channel (SSI2) dma_rx and dma_tx interrupts have now being
marked as reserved (this applies to RZ/G2L and alike SoC's). This patch
updates the binding doc to match the same.
While at it also updated the example node.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
.../bindings/sound/renesas,rz-ssi.yaml | 21 +++++++++++--------
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml
index 196881d94396..3b5ae45eee4a 100644
--- a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml
+++ b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml
@@ -25,14 +25,18 @@ properties:
maxItems: 1
interrupts:
- maxItems: 4
+ minItems: 2
+ maxItems: 3
interrupt-names:
- items:
- - const: int_req
- - const: dma_rx
- - const: dma_tx
- - const: dma_rt
+ oneOf:
+ - items:
+ - const: int_req
+ - const: dma_rx
+ - const: dma_tx
+ - items:
+ - const: int_req
+ - const: dma_rt
clocks:
maxItems: 4
@@ -106,9 +110,8 @@ examples:
reg = <0x10049c00 0x400>;
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
<&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
<&audio_clk1>,
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/4] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties
2023-02-17 18:52 ` [PATCH 1/4] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties Prabhakar
@ 2023-02-18 10:11 ` Krzysztof Kozlowski
0 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-18 10:11 UTC (permalink / raw)
To: Prabhakar, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Geert Uytterhoeven, Magnus Damm,
Jaroslav Kysela, Takashi Iwai
Cc: alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Biju Das, Lad Prabhakar
On 17/02/2023 19:52, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> From R01UH0914EJ0120 Rev.1.20 HW manual, for full duplex channels
> (SSI0/1/3) dma_rt interrupt has now being marked as reserved and similarly
> for half duplex channel (SSI2) dma_rx and dma_tx interrupts have now being
> marked as reserved (this applies to RZ/G2L and alike SoC's). This patch
> updates the binding doc to match the same.
Do not use "This commit/patch".
https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/4] ASoC: sh: rz-ssi: Update interrupt handling for half duplex channels
2023-02-17 18:52 [PATCH 0/4] RZ/G2L SSI: Update interrupt numbers Prabhakar
2023-02-17 18:52 ` [PATCH 1/4] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties Prabhakar
@ 2023-02-17 18:52 ` Prabhakar
2023-02-18 8:15 ` Biju Das
2023-02-17 18:52 ` [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels Prabhakar
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: Prabhakar @ 2023-02-17 18:52 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai
Cc: alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar, Biju Das, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
For half duplex channels we dont have separate interrupts for Tx and Rx
instead we have single interrupt Rt (where the signal for Rx and Tx is
muxed). To handle such a case install a handler in case we have a dma_rt
interrupt specified in the DT for the PIO mode.
Note, for backward compatibility we check if the Rx and Tx interrupts
are present first instead of checking Rt interrupt.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
sound/soc/sh/rz-ssi.c | 63 ++++++++++++++++++++++++++++++-------------
1 file changed, 44 insertions(+), 19 deletions(-)
diff --git a/sound/soc/sh/rz-ssi.c b/sound/soc/sh/rz-ssi.c
index 5d6bae33ae34..d502aa55c5a8 100644
--- a/sound/soc/sh/rz-ssi.c
+++ b/sound/soc/sh/rz-ssi.c
@@ -109,6 +109,7 @@ struct rz_ssi_priv {
int irq_int;
int irq_tx;
int irq_rx;
+ int irq_rt;
spinlock_t lock;
@@ -565,6 +566,17 @@ static irqreturn_t rz_ssi_interrupt(int irq, void *data)
rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
}
+ if (irq == ssi->irq_rt) {
+ struct snd_pcm_substream *substream = strm->substream;
+
+ if (rz_ssi_stream_is_play(ssi, substream)) {
+ strm->transfer(ssi, &ssi->playback);
+ } else {
+ strm->transfer(ssi, &ssi->capture);
+ rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
+ }
+ }
+
return IRQ_HANDLED;
}
@@ -993,26 +1005,39 @@ static int rz_ssi_probe(struct platform_device *pdev)
if (!rz_ssi_is_dma_enabled(ssi)) {
/* Tx and Rx interrupts (pio only) */
ssi->irq_tx = platform_get_irq_byname(pdev, "dma_tx");
- if (ssi->irq_tx < 0)
- return ssi->irq_tx;
-
- ret = devm_request_irq(&pdev->dev, ssi->irq_tx,
- &rz_ssi_interrupt, 0,
- dev_name(&pdev->dev), ssi);
- if (ret < 0)
- return dev_err_probe(&pdev->dev, ret,
- "irq request error (dma_tx)\n");
-
ssi->irq_rx = platform_get_irq_byname(pdev, "dma_rx");
- if (ssi->irq_rx < 0)
- return ssi->irq_rx;
-
- ret = devm_request_irq(&pdev->dev, ssi->irq_rx,
- &rz_ssi_interrupt, 0,
- dev_name(&pdev->dev), ssi);
- if (ret < 0)
- return dev_err_probe(&pdev->dev, ret,
- "irq request error (dma_rx)\n");
+ if (ssi->irq_tx == -ENXIO && ssi->irq_rx == -ENXIO) {
+ ssi->irq_rt = platform_get_irq_byname(pdev, "dma_rt");
+ if (ssi->irq_rt < 0)
+ return ssi->irq_rt;
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_rt,
+ &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_tx)\n");
+ } else {
+ if (ssi->irq_tx < 0)
+ return ssi->irq_tx;
+
+ if (ssi->irq_rx < 0)
+ return ssi->irq_rx;
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_tx,
+ &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_tx)\n");
+
+ ret = devm_request_irq(&pdev->dev, ssi->irq_rx,
+ &rz_ssi_interrupt, 0,
+ dev_name(&pdev->dev), ssi);
+ if (ret < 0)
+ return dev_err_probe(&pdev->dev, ret,
+ "irq request error (dma_rx)\n");
+ }
}
ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* RE: [PATCH 2/4] ASoC: sh: rz-ssi: Update interrupt handling for half duplex channels
2023-02-17 18:52 ` [PATCH 2/4] ASoC: sh: rz-ssi: Update interrupt handling for half duplex channels Prabhakar
@ 2023-02-18 8:15 ` Biju Das
0 siblings, 0 replies; 12+ messages in thread
From: Biju Das @ 2023-02-18 8:15 UTC (permalink / raw)
To: Prabhakar, Liam Girdwood, Mark Brown, Rob Herring,
Krzysztof Kozlowski, Geert Uytterhoeven, Magnus Damm,
Jaroslav Kysela, Takashi Iwai
Cc: alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar Mahadev Lad
Hi Prabhakar,
Thanks for the patch.
> Subject: [PATCH 2/4] ASoC: sh: rz-ssi: Update interrupt handling for half
> duplex channels
>
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> For half duplex channels we dont have separate interrupts for Tx and Rx
> instead we have single interrupt Rt (where the signal for Rx and Tx is
> muxed). To handle such a case install a handler in case we have a dma_rt
> interrupt specified in the DT for the PIO mode.
>
> Note, for backward compatibility we check if the Rx and Tx interrupts are
> present first instead of checking Rt interrupt.
Just a thought,
As dt-binding doc mentions, a way to distinguish half duplex and full duplex by
Counting the number of interrupts. Maybe we could use that property for
detecting channel with full/half duplex mode.
See below
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> sound/soc/sh/rz-ssi.c | 63 ++++++++++++++++++++++++++++++-------------
> 1 file changed, 44 insertions(+), 19 deletions(-)
>
> diff --git a/sound/soc/sh/rz-ssi.c b/sound/soc/sh/rz-ssi.c index
> 5d6bae33ae34..d502aa55c5a8 100644
> --- a/sound/soc/sh/rz-ssi.c
> +++ b/sound/soc/sh/rz-ssi.c
> @@ -109,6 +109,7 @@ struct rz_ssi_priv {
> int irq_int;
> int irq_tx;
> int irq_rx;
> + int irq_rt;
>
> spinlock_t lock;
>
> @@ -565,6 +566,17 @@ static irqreturn_t rz_ssi_interrupt(int irq, void
> *data)
> rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
> }
>
> + if (irq == ssi->irq_rt) {
> + struct snd_pcm_substream *substream = strm->substream;
> +
> + if (rz_ssi_stream_is_play(ssi, substream)) {
> + strm->transfer(ssi, &ssi->playback);
> + } else {
> + strm->transfer(ssi, &ssi->capture);
> + rz_ssi_reg_mask_setl(ssi, SSIFSR, SSIFSR_RDF, 0);
> + }
> + }
> +
> return IRQ_HANDLED;
> }
>
> @@ -993,26 +1005,39 @@ static int rz_ssi_probe(struct platform_device *pdev)
> if (!rz_ssi_is_dma_enabled(ssi)) {
Here, Detect Half duplex or full duplex by counting number of interrupts.
If half duplex get IRQ associated with dma_rt
If full duplex get IRQ associated with dma_rx and dma_tx.
> /* Tx and Rx interrupts (pio only) */
> ssi->irq_tx = platform_get_irq_byname(pdev, "dma_tx");
> - if (ssi->irq_tx < 0)
> - return ssi->irq_tx;
> -
> - ret = devm_request_irq(&pdev->dev, ssi->irq_tx,
> - &rz_ssi_interrupt, 0,
> - dev_name(&pdev->dev), ssi);
> - if (ret < 0)
> - return dev_err_probe(&pdev->dev, ret,
> - "irq request error (dma_tx)\n");
> -
> ssi->irq_rx = platform_get_irq_byname(pdev, "dma_rx");
> - if (ssi->irq_rx < 0)
> - return ssi->irq_rx;
> -
> - ret = devm_request_irq(&pdev->dev, ssi->irq_rx,
> - &rz_ssi_interrupt, 0,
> - dev_name(&pdev->dev), ssi);
> - if (ret < 0)
> - return dev_err_probe(&pdev->dev, ret,
> - "irq request error (dma_rx)\n");
> + if (ssi->irq_tx == -ENXIO && ssi->irq_rx == -ENXIO) {
> + ssi->irq_rt = platform_get_irq_byname(pdev, "dma_rt");
> + if (ssi->irq_rt < 0)
> + return ssi->irq_rt;
> +
> + ret = devm_request_irq(&pdev->dev, ssi->irq_rt,
> + &rz_ssi_interrupt, 0,
> + dev_name(&pdev->dev), ssi);
> + if (ret < 0)
> + return dev_err_probe(&pdev->dev, ret,
> + "irq request error (dma_tx)\n");
Typo dma_rt??
Cheers,
Biju
> + } else {
> + if (ssi->irq_tx < 0)
> + return ssi->irq_tx;
> +
> + if (ssi->irq_rx < 0)
> + return ssi->irq_rx;
> +
> + ret = devm_request_irq(&pdev->dev, ssi->irq_tx,
> + &rz_ssi_interrupt, 0,
> + dev_name(&pdev->dev), ssi);
> + if (ret < 0)
> + return dev_err_probe(&pdev->dev, ret,
> + "irq request error (dma_tx)\n");
> +
> + ret = devm_request_irq(&pdev->dev, ssi->irq_rx,
> + &rz_ssi_interrupt, 0,
> + dev_name(&pdev->dev), ssi);
> + if (ret < 0)
> + return dev_err_probe(&pdev->dev, ret,
> + "irq request error (dma_rx)\n");
> + }
> }
>
> ssi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
> --
> 2.25.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels
2023-02-17 18:52 [PATCH 0/4] RZ/G2L SSI: Update interrupt numbers Prabhakar
2023-02-17 18:52 ` [PATCH 1/4] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties Prabhakar
2023-02-17 18:52 ` [PATCH 2/4] ASoC: sh: rz-ssi: Update interrupt handling for half duplex channels Prabhakar
@ 2023-02-17 18:52 ` Prabhakar
2023-02-20 8:15 ` Geert Uytterhoeven
2023-03-10 12:05 ` Geert Uytterhoeven
2023-02-17 18:52 ` [PATCH 4/4] arm64: dts: renesas: r9a07g043: " Prabhakar
2023-03-06 13:31 ` (subset) [PATCH 0/4] RZ/G2L SSI: Update interrupt numbers Mark Brown
4 siblings, 2 replies; 12+ messages in thread
From: Prabhakar @ 2023-02-17 18:52 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai
Cc: alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar, Biju Das, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
From R01UH0914EJ0120 Rev.1.20 HW manual the interrupt numbers for SSI
channels have been updated,
SPI 329 - SSIF0 is now marked as reserved
SPI 333 - SSIF1 is now marked as reserved
SPI 335 - SSIF2 is now marked as reserved
SPI 336 - SSIF2 is now marked as reserved
SPI 341 - SSIF3 is now marked as reserved
This patch drops the above IRQs from SoC DTSI.
Fixes: 92a341315afc9 ("arm64: dts: renesas: r9a07g044: Add SSI support")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
Hi Geert,
As this is is a fixes patch and we are still waiting for [0] to be merged
shall do the same for V2L SoC?
[0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20230131223529.11905-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
Cheers,
Prabhakar
---
arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 68bd70210d08..9945dcf38031 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -184,9 +184,8 @@ ssi0: ssi@10049c00 {
reg = <0 0x10049c00 0 0x400>;
interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 327 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 329 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD SOC_PREFIX(SSI0_PCLK2)>,
<&cpg CPG_MOD SOC_PREFIX(SSI0_PCLK_SFR)>,
<&audio_clk1>, <&audio_clk2>;
@@ -205,9 +204,8 @@ ssi1: ssi@1004a000 {
reg = <0 0x1004a000 0 0x400>;
interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 331 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 333 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <GIC_SPI 332 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD SOC_PREFIX(SSI1_PCLK2)>,
<&cpg CPG_MOD SOC_PREFIX(SSI1_PCLK_SFR)>,
<&audio_clk1>, <&audio_clk2>;
@@ -225,10 +223,8 @@ ssi2: ssi@1004a400 {
"renesas,rz-ssi";
reg = <0 0x1004a400 0 0x400>;
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 335 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 336 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 337 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ interrupt-names = "int_req", "dma_rt";
clocks = <&cpg CPG_MOD SOC_PREFIX(SSI2_PCLK2)>,
<&cpg CPG_MOD SOC_PREFIX(SSI2_PCLK_SFR)>,
<&audio_clk1>, <&audio_clk2>;
@@ -247,9 +243,8 @@ ssi3: ssi@1004a800 {
reg = <0 0x1004a800 0 0x400>;
interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 339 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 341 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD SOC_PREFIX(SSI3_PCLK2)>,
<&cpg CPG_MOD SOC_PREFIX(SSI3_PCLK_SFR)>,
<&audio_clk1>, <&audio_clk2>;
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels
2023-02-17 18:52 ` [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels Prabhakar
@ 2023-02-20 8:15 ` Geert Uytterhoeven
2023-03-10 12:05 ` Geert Uytterhoeven
1 sibling, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2023-02-20 8:15 UTC (permalink / raw)
To: Prabhakar
Cc: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai,
alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Biju Das, Lad Prabhakar
Hi Prabhakar,
On Fri, Feb 17, 2023 at 7:53 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> From R01UH0914EJ0120 Rev.1.20 HW manual the interrupt numbers for SSI
> channels have been updated,
>
> SPI 329 - SSIF0 is now marked as reserved
> SPI 333 - SSIF1 is now marked as reserved
> SPI 335 - SSIF2 is now marked as reserved
> SPI 336 - SSIF2 is now marked as reserved
> SPI 341 - SSIF3 is now marked as reserved
>
> This patch drops the above IRQs from SoC DTSI.
>
> Fixes: 92a341315afc9 ("arm64: dts: renesas: r9a07g044: Add SSI support")
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> Hi Geert,
>
> As this is is a fixes patch and we are still waiting for [0] to be merged
> shall do the same for V2L SoC?
Yes please. Thank you!
> [0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20230131223529.11905-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels
2023-02-17 18:52 ` [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels Prabhakar
2023-02-20 8:15 ` Geert Uytterhoeven
@ 2023-03-10 12:05 ` Geert Uytterhoeven
2023-03-12 20:08 ` Lad, Prabhakar
1 sibling, 1 reply; 12+ messages in thread
From: Geert Uytterhoeven @ 2023-03-10 12:05 UTC (permalink / raw)
To: Prabhakar
Cc: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai,
alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Biju Das, Lad Prabhakar
Hi Prabhakar,
On Fri, Feb 17, 2023 at 7:53 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> From R01UH0914EJ0120 Rev.1.20 HW manual the interrupt numbers for SSI
> channels have been updated,
>
> SPI 329 - SSIF0 is now marked as reserved
> SPI 333 - SSIF1 is now marked as reserved
> SPI 335 - SSIF2 is now marked as reserved
> SPI 336 - SSIF2 is now marked as reserved
> SPI 341 - SSIF3 is now marked as reserved
>
> This patch drops the above IRQs from SoC DTSI.
>
> Fixes: 92a341315afc9 ("arm64: dts: renesas: r9a07g044: Add SSI support")
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.4.
> As this is is a fixes patch and we are still waiting for [0] to be merged
> shall do the same for V2L SoC?
>
> [0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20230131223529.11905-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
No need to send, I cloned the above with
s/G2L/V2L/
s/g044/g054/
s/G044/G054/
s/R01UH0914EJ0120/R01UH0936EJ0120/
and
Fixes: cd0339ec25895c0b ("arm64: dts: renesas: r9a07g054: Add
SSI{1,2,3} nodes and fillup the SSI0 stub node")
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels
2023-03-10 12:05 ` Geert Uytterhoeven
@ 2023-03-12 20:08 ` Lad, Prabhakar
0 siblings, 0 replies; 12+ messages in thread
From: Lad, Prabhakar @ 2023-03-12 20:08 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai,
alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Biju Das, Lad Prabhakar
Hi Geert,
On Fri, Mar 10, 2023 at 12:05 PM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, Feb 17, 2023 at 7:53 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > From R01UH0914EJ0120 Rev.1.20 HW manual the interrupt numbers for SSI
> > channels have been updated,
> >
> > SPI 329 - SSIF0 is now marked as reserved
> > SPI 333 - SSIF1 is now marked as reserved
> > SPI 335 - SSIF2 is now marked as reserved
> > SPI 336 - SSIF2 is now marked as reserved
> > SPI 341 - SSIF3 is now marked as reserved
> >
> > This patch drops the above IRQs from SoC DTSI.
> >
> > Fixes: 92a341315afc9 ("arm64: dts: renesas: r9a07g044: Add SSI support")
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> i.e. will queue in renesas-devel for v6.4.
>
> > As this is is a fixes patch and we are still waiting for [0] to be merged
> > shall do the same for V2L SoC?
> >
> > [0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20230131223529.11905-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
>
> No need to send, I cloned the above with
> s/G2L/V2L/
> s/g044/g054/
> s/G044/G054/
> s/R01UH0914EJ0120/R01UH0936EJ0120/
>
> and
> Fixes: cd0339ec25895c0b ("arm64: dts: renesas: r9a07g054: Add
> SSI{1,2,3} nodes and fillup the SSI0 stub node")
>
Thank you for taking care of this.
Cheers,
Prabhakar
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/4] arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels
2023-02-17 18:52 [PATCH 0/4] RZ/G2L SSI: Update interrupt numbers Prabhakar
` (2 preceding siblings ...)
2023-02-17 18:52 ` [PATCH 3/4] arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels Prabhakar
@ 2023-02-17 18:52 ` Prabhakar
2023-03-10 12:08 ` Geert Uytterhoeven
2023-03-06 13:31 ` (subset) [PATCH 0/4] RZ/G2L SSI: Update interrupt numbers Mark Brown
4 siblings, 1 reply; 12+ messages in thread
From: Prabhakar @ 2023-02-17 18:52 UTC (permalink / raw)
To: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai
Cc: alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Prabhakar, Biju Das, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
From R01UH0968EJ0100 Rev.1.00 HW manual the interrupt numbers for SSI
channels have been updated,
SPI 329 - SSIF0 is now marked as reserved
SPI 333 - SSIF1 is now marked as reserved
SPI 335 - SSIF2 is now marked as reserved
SPI 336 - SSIF2 is now marked as reserved
SPI 341 - SSIF3 is now marked as reserved
This patch drops the above IRQs from SoC DTSI.
Fixes: 559f2b0708c70 ("arm64: dts: renesas: r9a07g043: Add SSI{1,2,3} nodes and fillup the SSI0 stub node")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
---
arch/arm64/boot/dts/renesas/r9a07g043.dtsi | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
index c8a83e42c4f3..a9700654b421 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043.dtsi
@@ -80,9 +80,8 @@ ssi0: ssi@10049c00 {
reg = <0 0x10049c00 0 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(326) IRQ_TYPE_LEVEL_HIGH>,
<SOC_PERIPHERAL_IRQ(327) IRQ_TYPE_EDGE_RISING>,
- <SOC_PERIPHERAL_IRQ(328) IRQ_TYPE_EDGE_RISING>,
- <SOC_PERIPHERAL_IRQ(329) IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <SOC_PERIPHERAL_IRQ(328) IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD R9A07G043_SSI0_PCLK2>,
<&cpg CPG_MOD R9A07G043_SSI0_PCLK_SFR>,
<&audio_clk1>, <&audio_clk2>;
@@ -101,9 +100,8 @@ ssi1: ssi@1004a000 {
reg = <0 0x1004a000 0 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(330) IRQ_TYPE_LEVEL_HIGH>,
<SOC_PERIPHERAL_IRQ(331) IRQ_TYPE_EDGE_RISING>,
- <SOC_PERIPHERAL_IRQ(332) IRQ_TYPE_EDGE_RISING>,
- <SOC_PERIPHERAL_IRQ(333) IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <SOC_PERIPHERAL_IRQ(332) IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD R9A07G043_SSI1_PCLK2>,
<&cpg CPG_MOD R9A07G043_SSI1_PCLK_SFR>,
<&audio_clk1>, <&audio_clk2>;
@@ -121,10 +119,8 @@ ssi2: ssi@1004a400 {
"renesas,rz-ssi";
reg = <0 0x1004a400 0 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(334) IRQ_TYPE_LEVEL_HIGH>,
- <SOC_PERIPHERAL_IRQ(335) IRQ_TYPE_EDGE_RISING>,
- <SOC_PERIPHERAL_IRQ(336) IRQ_TYPE_EDGE_RISING>,
<SOC_PERIPHERAL_IRQ(337) IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ interrupt-names = "int_req", "dma_rt";
clocks = <&cpg CPG_MOD R9A07G043_SSI2_PCLK2>,
<&cpg CPG_MOD R9A07G043_SSI2_PCLK_SFR>,
<&audio_clk1>, <&audio_clk2>;
@@ -143,9 +139,8 @@ ssi3: ssi@1004a800 {
reg = <0 0x1004a800 0 0x400>;
interrupts = <SOC_PERIPHERAL_IRQ(338) IRQ_TYPE_LEVEL_HIGH>,
<SOC_PERIPHERAL_IRQ(339) IRQ_TYPE_EDGE_RISING>,
- <SOC_PERIPHERAL_IRQ(340) IRQ_TYPE_EDGE_RISING>,
- <SOC_PERIPHERAL_IRQ(341) IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";
+ <SOC_PERIPHERAL_IRQ(340) IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "int_req", "dma_rx", "dma_tx";
clocks = <&cpg CPG_MOD R9A07G043_SSI3_PCLK2>,
<&cpg CPG_MOD R9A07G043_SSI3_PCLK_SFR>,
<&audio_clk1>, <&audio_clk2>;
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/4] arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels
2023-02-17 18:52 ` [PATCH 4/4] arm64: dts: renesas: r9a07g043: " Prabhakar
@ 2023-03-10 12:08 ` Geert Uytterhoeven
0 siblings, 0 replies; 12+ messages in thread
From: Geert Uytterhoeven @ 2023-03-10 12:08 UTC (permalink / raw)
To: Prabhakar
Cc: Liam Girdwood, Mark Brown, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai,
alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Biju Das, Lad Prabhakar
On Fri, Feb 17, 2023 at 7:54 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> From R01UH0968EJ0100 Rev.1.00 HW manual the interrupt numbers for SSI
> channels have been updated,
>
> SPI 329 - SSIF0 is now marked as reserved
> SPI 333 - SSIF1 is now marked as reserved
> SPI 335 - SSIF2 is now marked as reserved
> SPI 336 - SSIF2 is now marked as reserved
> SPI 341 - SSIF3 is now marked as reserved
>
> This patch drops the above IRQs from SoC DTSI.
>
> Fixes: 559f2b0708c70 ("arm64: dts: renesas: r9a07g043: Add SSI{1,2,3} nodes and fillup the SSI0 stub node")
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.4.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: (subset) [PATCH 0/4] RZ/G2L SSI: Update interrupt numbers
2023-02-17 18:52 [PATCH 0/4] RZ/G2L SSI: Update interrupt numbers Prabhakar
` (3 preceding siblings ...)
2023-02-17 18:52 ` [PATCH 4/4] arm64: dts: renesas: r9a07g043: " Prabhakar
@ 2023-03-06 13:31 ` Mark Brown
4 siblings, 0 replies; 12+ messages in thread
From: Mark Brown @ 2023-03-06 13:31 UTC (permalink / raw)
To: Liam Girdwood, Rob Herring, Krzysztof Kozlowski,
Geert Uytterhoeven, Magnus Damm, Jaroslav Kysela, Takashi Iwai,
Prabhakar
Cc: alsa-devel, linux-renesas-soc, devicetree, linux-kernel,
Biju Das, Lad Prabhakar
On Fri, 17 Feb 2023 18:52:21 +0000, Prabhakar wrote:
> This patch series aims to fix interrupt numbers for SSI channels and updates
> the DT binding and the driver accordingly.
>
> Note, this patch series applies on top of [0].
>
> [0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/20230131223529.11905-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
>
> [...]
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/4] ASoC: dt-bindings: renesas,rz-ssi: Update interrupts and interrupt-names properties
commit: 56a3840486ae22c42176828e25d4073712837bfd
[2/4] ASoC: sh: rz-ssi: Update interrupt handling for half duplex channels
commit: 38c042b59af0248a8b13f01b1a09d890997c9f6e
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
^ permalink raw reply [flat|nested] 12+ messages in thread