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From: "Reddy, MallikarjunaX" <mallikarjunax.reddy@linux.intel.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, andriy.shevchenko@intel.com,
	cheol.yong.kim@intel.com, qi-ming.wu@intel.com,
	chuanhua.lei@linux.intel.com, malliamireddy009@gmail.com
Subject: Re: [PATCH v5 1/2] dt-bindings: dma: Add bindings for intel LGM SOC
Date: Mon, 31 Aug 2020 16:06:10 +0800	[thread overview]
Message-ID: <09547b0e-1c2e-d916-d4c0-f66b0110e173@linux.intel.com> (raw)
In-Reply-To: <20200828104530.GT2639@vkoul-mobl>

Hi Vinod,

Thanks for the review. Please see my comment inline.

On 8/28/2020 6:45 PM, Vinod Koul wrote:
> On 27-08-20, 17:54, Reddy, MallikarjunaX wrote:
>> Hi Vinod,
>> Thanks for the review comments.
>>
>> On 8/25/2020 7:21 PM, Vinod Koul wrote:
>>> On 18-08-20, 15:00, Reddy, MallikarjunaX wrote:
>>>
>>>>>> +
>>>>>> +            intel,chans:
>>>>>> +              $ref: /schemas/types.yaml#/definitions/uint32-array
>>>>>> +              description:
>>>>>> +                 The channels included on this port. Format is channel start
>>>>>> +                 number and how many channels on this port.
>>>>> Why does this need to be in DT? This all seems like it can be in the dma
>>>>> cells for each client.
>>>> (*ABC)
>>>> Yes. We need this.
>>>> for dma0(lgm-cdma) old SOC supports 16 channels and the new SOC supports 22
>>>> channels. and the logical channel mapping for the peripherals also differ
>>>> b/w old and new SOCs.
>>>>
>>>> Because of this hardware limitation we are trying to configure the total
>>>> channels and port-channel mapping dynamically from device tree.
>>>>
>>>> based on port name we are trying to configure the default values for
>>>> different peripherals(ports).
>>>> Example: burst length is not same for all ports, so using port name to do
>>>> default configurations.
>>> Sorry that does not make sense to me, why not specify the values to be
>>> used here instead of defining your own name scheme!
>> OK. Agreed. I will remove port name from DT and only use intel,chans
> what is intel,chans, why not use dma-channels?
  The intel,chans says about the channels included on the correspondng 
port. Format is channel start number and how many channels on this port.
  The reasong behind using this attribute instead of standrad 
dma-channels is...


DMA_VER22 HW supports 22 channels. But there is a hole in HW, total it 
can use only 16.

Old soc supports 4ports and 16 channels.
New soc supports 6ports and 22 channels.
(old and new soc carry the same version VER22)

port channel mapping for the old and new soc also not the same.
old soc: logical channels:(Rx, Tx)
0, 1 - SPI0
2, 3 - SPI1
4, 5 - HSNAND
12, 14, 13, 15 - Memcopy

New soc: Logical channels(Rx, Tx)
0, 1 - SPI0
2, 3 - SPI1
4, 5 - SPI2
6, 7 - SPI3
8, 9 - HSNAND
10 to 21 - Mcopy

Because of these reasons we are trying to use "intel,chans" attribute, 
and reading then number of channels from the dt.
Advantaage:
1. we can map the channels correspondign to port
2. Dynamically configure the channels (due to hw limitation)

If this is not ok, please suggest us the better way to handle this.
>

  reply	other threads:[~2020-08-31  8:06 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-14  5:26 [PATCH v5 0/2] Add Intel LGM soc DMA support Amireddy Mallikarjuna reddy
2020-08-14  5:26 ` [PATCH v5 1/2] dt-bindings: dma: Add bindings for intel LGM SOC Amireddy Mallikarjuna reddy
2020-08-14 20:32   ` Rob Herring
2020-08-18  7:00     ` Reddy, MallikarjunaX
2020-08-25 11:21       ` Vinod Koul
2020-08-27  9:54         ` Reddy, MallikarjunaX
2020-08-28 10:45           ` Vinod Koul
2020-08-31  8:06             ` Reddy, MallikarjunaX [this message]
2020-08-31 11:00               ` Vinod Koul
2020-09-01 15:03                 ` Reddy, MallikarjunaX
2020-09-04  6:31       ` Peter Ujfalusi
2020-09-07  7:25         ` Reddy, MallikarjunaX
2020-08-14  5:26 ` [PATCH v5 2/2] Add Intel LGM soc DMA support Amireddy Mallikarjuna reddy
2020-08-14  8:47   ` kernel test robot
2020-08-18 10:16   ` Peter Ujfalusi
2020-08-18 10:29     ` Peter Ujfalusi
2020-08-24  2:30     ` Reddy, MallikarjunaX
2020-08-24 11:24       ` Peter Ujfalusi
2020-08-27 14:41         ` Reddy, MallikarjunaX
2020-08-28 11:17           ` Peter Ujfalusi
2020-08-31  8:07             ` Reddy, MallikarjunaX
2020-09-04  6:31               ` Peter Ujfalusi
2020-09-07  7:32                 ` Reddy, MallikarjunaX

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