Re: [PATCH 01/10] dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl

[Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>]

On 1/25/2023 4:40 PM, Krzysztof Kozlowski wrote:
> On 25/01/2023 11:45, Kathiravan Thirumoorthy wrote:
>> From: Kathiravan T <quic_kathirav@quicinc.com>
>>
>> Add device tree bindings for IPQ5332 TLMM block.
>>
>> Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
>> ---
>>   .../pinctrl/qcom,ipq5332-pinctrl.yaml         | 134 ++++++++++++++++++
>>   1 file changed, 134 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml
>> new file mode 100644
>> index 000000000000..d101ee04b8b7
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-pinctrl.yaml
> Name matching compatible, please.


Sure, will rename it accordingly.


>
>> @@ -0,0 +1,134 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5332-pinctrl.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm IPQ5332 TLMM pin controller
>> +
>> +maintainers:
>> +  - Bjorn Andersson <andersson@kernel.org>
>> +  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> +
>> +description: |
>> +  Top Level Mode Multiplexer pin controller in Qualcomm IPQ5332 SoC.
>> +
>> +allOf:
>> +  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,ipq5332-tlmm
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  interrupts: true
> missing maxItems
>
> Rebase your patches on latest next and use the latest bindings and
> drivers as starting point.


Changes are based on v6.2-rc1.  I see the maxItems changes in 
linux-next. Will update this in V2.


>> +  interrupt-controller: true
>> +  "#interrupt-cells": true
>> +  gpio-controller: true
>> +  "#gpio-cells": true
>> +  gpio-ranges: true
>> +  wakeup-parent: true
>> +
>> +  gpio-reserved-ranges:
>> +    minItems: 1
>> +    maxItems: 27
>> +
>> +  gpio-line-names:
>> +    maxItems: 53
> You have 54 GPIOs.


Sorry, GPIO ranges are from 0-52, will update it in all places in V2.


>
>> +
>> +patternProperties:
>> +  "-state$":
>> +    oneOf:
>> +      - $ref: "#/$defs/qcom-ipq5332-tlmm-state"
>> +      - patternProperties:
>> +          "-pins$":
>> +            $ref: "#/$defs/qcom-ipq5332-tlmm-state"
>> +        additionalProperties: false
>> +
>> +$defs:
>> +  qcom-ipq5332-tlmm-state:
>> +    type: object
>> +    description:
>> +      Pinctrl node's client devices use subnodes for desired pin configuration.
>> +      Client device subnodes use below standard properties.
>> +    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
>> +
>> +    properties:
>> +      pins:
>> +        description:
>> +          List of gpio pins affected by the properties specified in this
>> +          subnode.
>> +        items:
>> +          pattern: "^gpio([0-9]|[1-4][0-9]|5[0-3])$"
>> +        minItems: 1
>> +        maxItems: 36
>> +
>> +      function:
>> +        description:
>> +          Specify the alternative function to be configured for the specified
>> +          pins.
>> +
>> +        enum: [ PTA_0, PTA_2, PTA_1, atest_char, atest_char0, atest_char1,
> 1. lowercase only
>
> 2. order all these by name


Ack.


>
>
>> +                atest_char2, atest_char3, atest_tic, audio_pri, audio_pri0,
>> +                audio_pri1, audio_sec, audio_sec0, audio_sec1, blsp0_i2c,
>> +                blsp0_spi, blsp0_uart0, blsp0_uart1, blsp1_i2c0, blsp1_i2c1,
>> +                blsp1_spi0, blsp1_spi1, blsp1_uart0, blsp1_uart1, blsp1_uart2,
>> +                blsp2_i2c0, blsp2_i2c1, blsp2_spi, blsp2_spi0, blsp2_spi1,
>> +                core_voltage, cri_trng0, cri_trng1, cri_trng2, cri_trng3,
>> +                cxc_clk, cxc_data, dbg_out, gcc_plltest, gcc_tlmm, gpio,
>> +                lock_det, mac0, mac1, mdc0, mdc1, mdio0, mdio1, pc, pcie0_clk,
> Best regards,
> Krzysztof


Thanks,

Kathiravan T.