From: Ben Dooks <ben.dooks@codethink.co.uk>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, pgaikwad@nvidia.com,
jonathanh@nvidia.co, thierry.reding@gmail.com,
linux-kernel@lists.codethink.co.uk
Subject: Re: [PATCH 2/8] clk: tegra: host1x has fractional divider
Date: Mon, 23 Jul 2018 12:32:08 +0100 [thread overview]
Message-ID: <0e52ce60b6d0aed73ca171352a56d3e7@codethink.co.uk> (raw)
In-Reply-To: <20180723111216.GM1636@tbergstrom-lnx.Nvidia.com>
On 2018-07-23 12:12, Peter De Schrijver wrote:
> On Mon, Jul 23, 2018 at 10:32:58AM +0100, Ben Dooks wrote:
>>
>>
>> On 2018-07-23 09:50, Peter De Schrijver wrote:
>> >On Fri, Jul 20, 2018 at 02:45:26PM +0100, Ben Dooks wrote:
>> >>The host1x clock according to both tegra2 and tegra3 manuals is
>> >>an 8bit divider with lsb being fractional. This is running into
>> >>an issue where the host1x is being set on a tegra20a system to
>> >>266.4MHz but ends up at 222MHz instead.
>> >>
>> >
>> >The fact the hw has a fractional divider, does not mean we're
>> >allowed to use
>> >it. Due to the non 50% duty cycle of fractional divided clocks,
>> >they are not
>> >allowed for certain peripherals. Do you have information
>> >indicating this is
>> >ok for the host1x clock?
>>
>> Only that's what was setup for the systems we're using.
>> We couldn't match the 2.6 working system without these changes.
>>
>
> On Tegra20 or Tegra30?
I'll check tomorrow when I have access to all the hw involved.
--
Ben
next prev parent reply other threads:[~2018-07-23 11:32 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-20 13:45 tegra clock updates and fixes Ben Dooks
2018-07-20 13:45 ` [PATCH 1/8] clk: tegra: implement reset status callback Ben Dooks
2018-07-20 13:45 ` [PATCH 2/8] clk: tegra: host1x has fractional divider Ben Dooks
2018-07-23 8:50 ` Peter De Schrijver
2018-07-23 9:32 ` Ben Dooks
2018-07-23 11:12 ` Peter De Schrijver
2018-07-23 11:32 ` Ben Dooks [this message]
2018-07-20 13:45 ` [PATCH 3/8] clk: tegra: fix fractional clocks for VDI, VI, EPP, MPE, 2D and 3D Ben Dooks
2018-07-23 8:50 ` Peter De Schrijver
2018-07-20 13:45 ` [PATCH 4/8] clk: tegra: fix MUX_I2S_SPDIF macro Ben Dooks
2018-07-20 13:45 ` [PATCH 5/8] clk: tegra: add mux-only clock option Ben Dooks
2018-07-20 13:45 ` [PATCH 6/8] clk: tegra30: add 2d and 3d idle clocks Ben Dooks
2018-07-22 11:55 ` Dmitry Osipenko
2018-07-23 8:28 ` Ben Dooks
2018-07-23 11:33 ` Dmitry Osipenko
2018-07-23 11:37 ` Ben Dooks
2018-07-23 13:05 ` Dmitry Osipenko
2018-07-24 11:31 ` Dmitry Osipenko
2018-07-24 12:32 ` Ben Dooks
2018-07-20 13:45 ` [PATCH 7/8] clk: tegra: replace warn on with single line Ben Dooks
2018-07-20 13:45 ` [PATCH 8/8] clk: tegra: show clock name in error from _calc_rate Ben Dooks
2018-07-26 13:32 ` [Linux-kernel] tegra clock updates and fixes Ben Dooks
2018-07-26 15:22 ` Stephen Boyd
2018-07-27 8:22 ` Ben Dooks
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