* [PATCH 0/5] ARM: qcom: add defconfig items and dts nodes
@ 2019-10-13 8:07 Brian Masney
2019-10-13 8:08 ` [PATCH 1/5] ARM: qcom_defconfig: add ocmem support Brian Masney
` (4 more replies)
0 siblings, 5 replies; 13+ messages in thread
From: Brian Masney @ 2019-10-13 8:07 UTC (permalink / raw)
To: agross, bjorn.andersson
Cc: robh+dt, mark.rutland, linux-arm-msm, devicetree, linux-kernel,
linux-arm-kernel
Here's a small patch series that adds support for the On Chip MEMory
(OCMEM) and msm8974 interconnect support to qcom_defconfig and to
qcom-msm8974.dtsi. The OCMEM driver is already in linux-next and it
looks like the interconnect support should be merged soon:
https://lore.kernel.org/lkml/20191005114605.5279-1-masneyb@onstation.org/
I have some work in progress patches for the HDMI bridge that's found
on the Nexus 5 and this series adds the necessary driver to
qcom_defconfig.
Brian Masney (5):
ARM: qcom_defconfig: add ocmem support
ARM: qcom_defconfig: add msm8974 interconnect support
ARM: qcom_defconfig: add anx78xx HDMI bridge support
ARM: dts: qcom: msm8974: add ocmem node
ARM: dts: qcom: msm8974: add interconnect nodes
arch/arm/boot/dts/qcom-msm8974.dtsi | 79 +++++++++++++++++++++++++++++
arch/arm/configs/qcom_defconfig | 5 ++
2 files changed, 84 insertions(+)
--
2.21.0
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH 1/5] ARM: qcom_defconfig: add ocmem support
2019-10-13 8:07 [PATCH 0/5] ARM: qcom: add defconfig items and dts nodes Brian Masney
@ 2019-10-13 8:08 ` Brian Masney
2019-10-13 8:08 ` [PATCH 2/5] ARM: qcom_defconfig: add msm8974 interconnect support Brian Masney
` (3 subsequent siblings)
4 siblings, 0 replies; 13+ messages in thread
From: Brian Masney @ 2019-10-13 8:08 UTC (permalink / raw)
To: agross, bjorn.andersson
Cc: robh+dt, mark.rutland, linux-arm-msm, devicetree, linux-kernel,
linux-arm-kernel
Add ocmem driver that's needed to support the GPU on a3xx and a4xx based
systems.
Signed-off-by: Brian Masney <masneyb@onstation.org>
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 02f1e7b7c8f6..b6faf6f2ddb4 100644
--- a/arch/arm/configs/qcom_defconfig
+++ b/arch/arm/configs/qcom_defconfig
@@ -226,6 +226,7 @@ CONFIG_QCOM_WCNSS_PIL=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_SMD=y
CONFIG_QCOM_GSBI=y
+CONFIG_QCOM_OCMEM=m
CONFIG_QCOM_PM=y
CONFIG_QCOM_SMEM=y
CONFIG_QCOM_SMD_RPM=y
--
2.21.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 2/5] ARM: qcom_defconfig: add msm8974 interconnect support
2019-10-13 8:07 [PATCH 0/5] ARM: qcom: add defconfig items and dts nodes Brian Masney
2019-10-13 8:08 ` [PATCH 1/5] ARM: qcom_defconfig: add ocmem support Brian Masney
@ 2019-10-13 8:08 ` Brian Masney
2019-10-23 8:16 ` Georgi Djakov
2019-10-13 8:08 ` [PATCH 3/5] ARM: qcom_defconfig: add anx78xx HDMI bridge support Brian Masney
` (2 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Brian Masney @ 2019-10-13 8:08 UTC (permalink / raw)
To: agross, bjorn.andersson
Cc: robh+dt, mark.rutland, linux-arm-msm, devicetree, linux-kernel,
linux-arm-kernel
Add interconnect support for msm8974-based SoCs in order to support the
GPU on this platform.
Signed-off-by: Brian Masney <masneyb@onstation.org>
---
arch/arm/configs/qcom_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index b6faf6f2ddb4..32fc8a24e5c7 100644
--- a/arch/arm/configs/qcom_defconfig
+++ b/arch/arm/configs/qcom_defconfig
@@ -252,6 +252,9 @@ CONFIG_PHY_QCOM_IPQ806X_SATA=y
CONFIG_PHY_QCOM_USB_HS=y
CONFIG_PHY_QCOM_USB_HSIC=y
CONFIG_QCOM_QFPROM=y
+CONFIG_INTERCONNECT=m
+CONFIG_INTERCONNECT_QCOM=y
+CONFIG_INTERCONNECT_QCOM_MSM8974=m
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT3_FS=y
--
2.21.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 3/5] ARM: qcom_defconfig: add anx78xx HDMI bridge support
2019-10-13 8:07 [PATCH 0/5] ARM: qcom: add defconfig items and dts nodes Brian Masney
2019-10-13 8:08 ` [PATCH 1/5] ARM: qcom_defconfig: add ocmem support Brian Masney
2019-10-13 8:08 ` [PATCH 2/5] ARM: qcom_defconfig: add msm8974 interconnect support Brian Masney
@ 2019-10-13 8:08 ` Brian Masney
2019-10-13 8:08 ` [PATCH 4/5] ARM: dts: qcom: msm8974: add ocmem node Brian Masney
2019-10-13 8:08 ` [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes Brian Masney
4 siblings, 0 replies; 13+ messages in thread
From: Brian Masney @ 2019-10-13 8:08 UTC (permalink / raw)
To: agross, bjorn.andersson
Cc: robh+dt, mark.rutland, linux-arm-msm, devicetree, linux-kernel,
linux-arm-kernel
Add the Analogix anx78xx driver so that the external display over HDMI
can be used on Nexus 5 phones.
Signed-off-by: Brian Masney <masneyb@onstation.org>
---
arch/arm/configs/qcom_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
index 32fc8a24e5c7..f95cc49a1ddb 100644
--- a/arch/arm/configs/qcom_defconfig
+++ b/arch/arm/configs/qcom_defconfig
@@ -149,6 +149,7 @@ CONFIG_MEDIA_SUPPORT=y
CONFIG_DRM=y
CONFIG_DRM_MSM=m
CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_ANALOGIX_ANX78XX=m
CONFIG_FB=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_LCD_CLASS_DEVICE is not set
--
2.21.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 4/5] ARM: dts: qcom: msm8974: add ocmem node
2019-10-13 8:07 [PATCH 0/5] ARM: qcom: add defconfig items and dts nodes Brian Masney
` (2 preceding siblings ...)
2019-10-13 8:08 ` [PATCH 3/5] ARM: qcom_defconfig: add anx78xx HDMI bridge support Brian Masney
@ 2019-10-13 8:08 ` Brian Masney
2019-10-13 8:08 ` [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes Brian Masney
4 siblings, 0 replies; 13+ messages in thread
From: Brian Masney @ 2019-10-13 8:08 UTC (permalink / raw)
To: agross, bjorn.andersson
Cc: robh+dt, mark.rutland, linux-arm-msm, devicetree, linux-kernel,
linux-arm-kernel
Add ocmem node that is needed in order to support the GPU upstream.
Signed-off-by: Brian Masney <masneyb@onstation.org>
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 39a3a1d63889..bdbde5125a56 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -1087,6 +1087,25 @@
};
};
+ ocmem@fdd00000 {
+ compatible = "qcom,msm8974-ocmem";
+ reg = <0xfdd00000 0x2000>,
+ <0xfec00000 0x180000>;
+ reg-names = "ctrl",
+ "mem";
+ clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
+ <&mmcc OCMEMCX_OCMEMNOC_CLK>;
+ clock-names = "core",
+ "iface";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ gmu_sram: gmu-sram@0 {
+ reg = <0x0 0x100000>;
+ };
+ };
+
mdss: mdss@fd900000 {
status = "disabled";
--
2.21.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes
2019-10-13 8:07 [PATCH 0/5] ARM: qcom: add defconfig items and dts nodes Brian Masney
` (3 preceding siblings ...)
2019-10-13 8:08 ` [PATCH 4/5] ARM: dts: qcom: msm8974: add ocmem node Brian Masney
@ 2019-10-13 8:08 ` Brian Masney
2019-10-23 11:50 ` Georgi Djakov
4 siblings, 1 reply; 13+ messages in thread
From: Brian Masney @ 2019-10-13 8:08 UTC (permalink / raw)
To: agross, bjorn.andersson
Cc: robh+dt, mark.rutland, linux-arm-msm, devicetree, linux-kernel,
linux-arm-kernel
Add interconnect nodes that's needed to support bus scaling.
Signed-off-by: Brian Masney <masneyb@onstation.org>
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index bdbde5125a56..ed98d14a88b1 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
+#include <dt-bindings/interconnect/qcom,msm8974.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-msm8974.h>
#include <dt-bindings/clock/qcom,mmcc-msm8974.h>
@@ -1106,6 +1107,60 @@
};
};
+ bimc: interconnect@fc380000 {
+ reg = <0xfc380000 0x6a000>;
+ compatible = "qcom,msm8974-bimc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
+ <&rpmcc RPM_SMD_BIMC_A_CLK>;
+ };
+
+ cnoc: interconnect@fc480000 {
+ reg = <0xfc480000 0x4000>;
+ compatible = "qcom,msm8974-cnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
+ <&rpmcc RPM_SMD_CNOC_A_CLK>;
+ };
+
+ mmssnoc: interconnect@fc478000 {
+ reg = <0xfc478000 0x4000>;
+ compatible = "qcom,msm8974-mmssnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = <&mmcc MMSS_S0_AXI_CLK>,
+ <&mmcc MMSS_S0_AXI_CLK>;
+ };
+
+ ocmemnoc: interconnect@fc470000 {
+ reg = <0xfc470000 0x4000>;
+ compatible = "qcom,msm8974-ocmemnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
+ <&rpmcc RPM_SMD_OCMEMGX_A_CLK>;
+ };
+
+ pnoc: interconnect@fc468000 {
+ reg = <0xfc468000 0x4000>;
+ compatible = "qcom,msm8974-pnoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
+ <&rpmcc RPM_SMD_PNOC_A_CLK>;
+ };
+
+ snoc: interconnect@fc460000 {
+ reg = <0xfc460000 0x4000>;
+ compatible = "qcom,msm8974-snoc";
+ #interconnect-cells = <1>;
+ clock-names = "bus", "bus_a";
+ clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
+ <&rpmcc RPM_SMD_SNOC_A_CLK>;
+ };
+
mdss: mdss@fd900000 {
status = "disabled";
@@ -1152,6 +1207,11 @@
"core",
"vsync";
+ interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
+ <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
+ interconnect-names = "mdp0-mem",
+ "mdp1-mem";
+
ports {
#address-cells = <1>;
#size-cells = <0>;
--
2.21.0
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH 2/5] ARM: qcom_defconfig: add msm8974 interconnect support
2019-10-13 8:08 ` [PATCH 2/5] ARM: qcom_defconfig: add msm8974 interconnect support Brian Masney
@ 2019-10-23 8:16 ` Georgi Djakov
0 siblings, 0 replies; 13+ messages in thread
From: Georgi Djakov @ 2019-10-23 8:16 UTC (permalink / raw)
To: Brian Masney, agross, bjorn.andersson
Cc: robh+dt, mark.rutland, linux-arm-msm, devicetree, linux-kernel,
linux-arm-kernel
Hi Brian,
Thank you for working on this!
On 13.10.19 г. 11:08 ч., Brian Masney wrote:
> Add interconnect support for msm8974-based SoCs in order to support the
> GPU on this platform.
>
> Signed-off-by: Brian Masney <masneyb@onstation.org>
> ---
> arch/arm/configs/qcom_defconfig | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig
> index b6faf6f2ddb4..32fc8a24e5c7 100644
> --- a/arch/arm/configs/qcom_defconfig
> +++ b/arch/arm/configs/qcom_defconfig
> @@ -252,6 +252,9 @@ CONFIG_PHY_QCOM_IPQ806X_SATA=y
> CONFIG_PHY_QCOM_USB_HS=y
> CONFIG_PHY_QCOM_USB_HSIC=y
> CONFIG_QCOM_QFPROM=y
> +CONFIG_INTERCONNECT=m
We want to change it from tristate to bool [1].
> +CONFIG_INTERCONNECT_QCOM=y
> +CONFIG_INTERCONNECT_QCOM_MSM8974=m
> CONFIG_EXT2_FS=y
> CONFIG_EXT2_FS_XATTR=y
> CONFIG_EXT3_FS=y
>
Otherwise looks good to me.
Thanks,
Georgi
[1]
https://lore.kernel.org/r/b789cce388dd1f2906492f307dea6780c398bc6a.1567065991.git.viresh.kumar@linaro.org
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes
2019-10-13 8:08 ` [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes Brian Masney
@ 2019-10-23 11:50 ` Georgi Djakov
2019-10-23 12:47 ` Brian Masney
0 siblings, 1 reply; 13+ messages in thread
From: Georgi Djakov @ 2019-10-23 11:50 UTC (permalink / raw)
To: Brian Masney, agross, bjorn.andersson
Cc: robh+dt, mark.rutland, linux-arm-msm, devicetree, linux-kernel,
linux-arm-kernel
Hi Brian,
Thanks for the patch!
On 13.10.19 г. 11:08 ч., Brian Masney wrote:
> Add interconnect nodes that's needed to support bus scaling.
>
> Signed-off-by: Brian Masney <masneyb@onstation.org>
> ---
> arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++
> 1 file changed, 60 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> index bdbde5125a56..ed98d14a88b1 100644
> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
> @@ -1,6 +1,7 @@
> // SPDX-License-Identifier: GPL-2.0
> /dts-v1/;
>
> +#include <dt-bindings/interconnect/qcom,msm8974.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/clock/qcom,gcc-msm8974.h>
> #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
> @@ -1106,6 +1107,60 @@
> };
> };
>
> + bimc: interconnect@fc380000 {
> + reg = <0xfc380000 0x6a000>;
> + compatible = "qcom,msm8974-bimc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
> + <&rpmcc RPM_SMD_BIMC_A_CLK>;
> + };
> +
> + cnoc: interconnect@fc480000 {
> + reg = <0xfc480000 0x4000>;
> + compatible = "qcom,msm8974-cnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
> + <&rpmcc RPM_SMD_CNOC_A_CLK>;
> + };
> +
> + mmssnoc: interconnect@fc478000 {
> + reg = <0xfc478000 0x4000>;
> + compatible = "qcom,msm8974-mmssnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = <&mmcc MMSS_S0_AXI_CLK>,
> + <&mmcc MMSS_S0_AXI_CLK>;
> + };
> +
> + ocmemnoc: interconnect@fc470000 {
> + reg = <0xfc470000 0x4000>;
> + compatible = "qcom,msm8974-ocmemnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
> + <&rpmcc RPM_SMD_OCMEMGX_A_CLK>;
> + };
> +
> + pnoc: interconnect@fc468000 {
> + reg = <0xfc468000 0x4000>;
> + compatible = "qcom,msm8974-pnoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
> + <&rpmcc RPM_SMD_PNOC_A_CLK>;
> + };
> +
> + snoc: interconnect@fc460000 {
> + reg = <0xfc460000 0x4000>;
> + compatible = "qcom,msm8974-snoc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
> + <&rpmcc RPM_SMD_SNOC_A_CLK>;
> + };
It would have been nice to have the DT nodes sorted by address, but i suppose it
doesn't make much difference, as the rest of the nodes in this file are unsorted
anyway.
> +
> mdss: mdss@fd900000 {
> status = "disabled";
>
> @@ -1152,6 +1207,11 @@
> "core",
> "vsync";
>
> + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
> + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
Who will be the requesting bandwidth to DDR and ocmem? Is it the display or GPU
or both? The above seem like GPU-related interconnects, so maybe these
properties should be in the GPU DT node.
> + interconnect-names = "mdp0-mem",
> + "mdp1-mem";
As the second path is not to DDR, but to ocmem, it might be better to call it
something like "gpu-ocmem".
Thanks,
Georgi
> +
> ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes
2019-10-23 11:50 ` Georgi Djakov
@ 2019-10-23 12:47 ` Brian Masney
2019-10-23 13:39 ` Georgi Djakov
0 siblings, 1 reply; 13+ messages in thread
From: Brian Masney @ 2019-10-23 12:47 UTC (permalink / raw)
To: Georgi Djakov
Cc: agross, bjorn.andersson, robh+dt, mark.rutland, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel
On Wed, Oct 23, 2019 at 02:50:19PM +0300, Georgi Djakov wrote:
> On 13.10.19 г. 11:08 ч., Brian Masney wrote:
> > Add interconnect nodes that's needed to support bus scaling.
> >
> > Signed-off-by: Brian Masney <masneyb@onstation.org>
> > ---
> > arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++
> > 1 file changed, 60 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> > @@ -1152,6 +1207,11 @@
> > "core",
> > "vsync";
> >
> > + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
> > + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
>
> Who will be the requesting bandwidth to DDR and ocmem? Is it the display or GPU
> or both? The above seem like GPU-related interconnects, so maybe these
> properties should be in the GPU DT node.
The display is what currently requests the interconnect path,
specifically mdp5_setup_interconnect() in
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c. The Freedreno GPU bindings
currently don't have interconnect support. Maybe this is something that
I should add to that driver as well?
> > + interconnect-names = "mdp0-mem",
> > + "mdp1-mem";
>
> As the second path is not to DDR, but to ocmem, it might be better to call it
> something like "gpu-ocmem".
I used what mdp5_kms.c expected.
Brian
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes
2019-10-23 12:47 ` Brian Masney
@ 2019-10-23 13:39 ` Georgi Djakov
2019-10-23 13:51 ` Georgi Djakov
2019-10-24 7:07 ` Brian Masney
0 siblings, 2 replies; 13+ messages in thread
From: Georgi Djakov @ 2019-10-23 13:39 UTC (permalink / raw)
To: Brian Masney
Cc: agross, bjorn.andersson, robh+dt, mark.rutland, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel
On 23.10.19 г. 15:47 ч., Brian Masney wrote:
> On Wed, Oct 23, 2019 at 02:50:19PM +0300, Georgi Djakov wrote:
>> On 13.10.19 г. 11:08 ч., Brian Masney wrote:
>>> Add interconnect nodes that's needed to support bus scaling.
>>>
>>> Signed-off-by: Brian Masney <masneyb@onstation.org>
>>> ---
>>> arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++
>>> 1 file changed, 60 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> @@ -1152,6 +1207,11 @@
>>> "core",
>>> "vsync";
>>>
>>> + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
>>> + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
>>
>> Who will be the requesting bandwidth to DDR and ocmem? Is it the display or GPU
>> or both? The above seem like GPU-related interconnects, so maybe these
>> properties should be in the GPU DT node.
>
> The display is what currently requests the interconnect path,
> specifically mdp5_setup_interconnect() in
> drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c. The Freedreno GPU bindings
> currently don't have interconnect support. Maybe this is something that
> I should add to that driver as well?
The "mdp0-mem" and "mdp1-mem" paths mentioned in the mdp5_kms.c are the two
interconnects between the display and DDR memory. There is actually a patch [1]
to add to GPU bindings, but it seems that we missed to pick it up.
>
>>> + interconnect-names = "mdp0-mem",
>>> + "mdp1-mem";
>>
>> As the second path is not to DDR, but to ocmem, it might be better to call it
>> something like "gpu-ocmem".
>
> I used what mdp5_kms.c expected.
This is for the display and here [2] are some patches for the GPU. Not sure how
the NoCs are configured on 8974 by default, but if you notice any blue/black
screens, you may need to request bandwidth for display too.
Thanks,
Georgi
[1]
https://lore.kernel.org/r/1555703787-10897-1-git-send-email-jcrouse@codeaurora.org
[2] https://lore.kernel.org/r/20181220173026.3857-1-jcrouse@codeaurora.org
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes
2019-10-23 13:39 ` Georgi Djakov
@ 2019-10-23 13:51 ` Georgi Djakov
2019-10-24 7:07 ` Brian Masney
1 sibling, 0 replies; 13+ messages in thread
From: Georgi Djakov @ 2019-10-23 13:51 UTC (permalink / raw)
To: Brian Masney
Cc: agross, bjorn.andersson, robh+dt, mark.rutland, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel
On 23.10.19 г. 16:39 ч., Georgi Djakov wrote:
> On 23.10.19 г. 15:47 ч., Brian Masney wrote:
>> On Wed, Oct 23, 2019 at 02:50:19PM +0300, Georgi Djakov wrote:
>>> On 13.10.19 г. 11:08 ч., Brian Masney wrote:
>>>> Add interconnect nodes that's needed to support bus scaling.
>>>>
>>>> Signed-off-by: Brian Masney <masneyb@onstation.org>
>>>> ---
>>>> arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++
>>>> 1 file changed, 60 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>> @@ -1152,6 +1207,11 @@
>>>> "core",
>>>> "vsync";
>>>>
>>>> + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
>>>> + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
>>>
>>> Who will be the requesting bandwidth to DDR and ocmem? Is it the display or GPU
>>> or both? The above seem like GPU-related interconnects, so maybe these
>>> properties should be in the GPU DT node.
>>
>> The display is what currently requests the interconnect path,
>> specifically mdp5_setup_interconnect() in
>> drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c. The Freedreno GPU bindings
>> currently don't have interconnect support. Maybe this is something that
>> I should add to that driver as well?
>
> The "mdp0-mem" and "mdp1-mem" paths mentioned in the mdp5_kms.c are the two
> interconnects between the display and DDR memory. There is actually a patch [1]
> to add to GPU bindings, but it seems that we missed to pick it up.
It was actually merged in v5.2.
BR,
Georgi
>>>> + interconnect-names = "mdp0-mem",
>>>> + "mdp1-mem";
>>>
>>> As the second path is not to DDR, but to ocmem, it might be better to call it
>>> something like "gpu-ocmem".
>>
>> I used what mdp5_kms.c expected.
>
> This is for the display and here [2] are some patches for the GPU. Not sure how
> the NoCs are configured on 8974 by default, but if you notice any blue/black
> screens, you may need to request bandwidth for display too.
>
> Thanks,
> Georgi
>
> [1]
> https://lore.kernel.org/r/1555703787-10897-1-git-send-email-jcrouse@codeaurora.org
> [2] https://lore.kernel.org/r/20181220173026.3857-1-jcrouse@codeaurora.org
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes
2019-10-23 13:39 ` Georgi Djakov
2019-10-23 13:51 ` Georgi Djakov
@ 2019-10-24 7:07 ` Brian Masney
2019-10-24 8:27 ` Georgi Djakov
1 sibling, 1 reply; 13+ messages in thread
From: Brian Masney @ 2019-10-24 7:07 UTC (permalink / raw)
To: Georgi Djakov
Cc: agross, bjorn.andersson, robh+dt, mark.rutland, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel
On Wed, Oct 23, 2019 at 04:39:21PM +0300, Georgi Djakov wrote:
> On 23.10.19 г. 15:47 ч., Brian Masney wrote:
> > On Wed, Oct 23, 2019 at 02:50:19PM +0300, Georgi Djakov wrote:
> >> On 13.10.19 г. 11:08 ч., Brian Masney wrote:
> >>> Add interconnect nodes that's needed to support bus scaling.
> >>>
> >>> Signed-off-by: Brian Masney <masneyb@onstation.org>
> >>> ---
> >>> arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++
> >>> 1 file changed, 60 insertions(+)
> >>>
> >>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> >>> @@ -1152,6 +1207,11 @@
> >>> "core",
> >>> "vsync";
> >>>
> >>> + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
> >>> + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
> >>
> >> Who will be the requesting bandwidth to DDR and ocmem? Is it the display or GPU
> >> or both? The above seem like GPU-related interconnects, so maybe these
> >> properties should be in the GPU DT node.
> >
> > The display is what currently requests the interconnect path,
> > specifically mdp5_setup_interconnect() in
> > drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c. The Freedreno GPU bindings
> > currently don't have interconnect support. Maybe this is something that
> > I should add to that driver as well?
>
> The "mdp0-mem" and "mdp1-mem" paths mentioned in the mdp5_kms.c are the two
> interconnects between the display and DDR memory.
OK, I see. Most of the interconnect paths in the downstream MSM 3.4
sources are configured in device tree using the
qcom,msm-bus,vectors-KBps property, which is what I was only looking at
before. The interconnect path for the display is configured directly in
code (drivers/video/msm/mdss/mdss_mdp.c) to setup a path between
MSM_BUS_MASTER_MDP_PORT0 and MSM_BUS_SLAVE_EBI_CH0.
In the upstream kernel, it looks like I'll need to
1) add support for an optional second interconnect path for ocmem to
drivers/gpu/drm/msm/adreno/adreno_gpu.c.
2) add implementations of gpu_get_freq and gpu_get_freq to the
adreno_gpu_funcs struct in drivers/gpu/drm/msm/adreno/a3xx_gpu.c.
Brian
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes
2019-10-24 7:07 ` Brian Masney
@ 2019-10-24 8:27 ` Georgi Djakov
0 siblings, 0 replies; 13+ messages in thread
From: Georgi Djakov @ 2019-10-24 8:27 UTC (permalink / raw)
To: Brian Masney
Cc: agross, bjorn.andersson, robh+dt, mark.rutland, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel, freedreno
On 24.10.19 г. 10:07 ч., Brian Masney wrote:
> On Wed, Oct 23, 2019 at 04:39:21PM +0300, Georgi Djakov wrote:
>> On 23.10.19 г. 15:47 ч., Brian Masney wrote:
>>> On Wed, Oct 23, 2019 at 02:50:19PM +0300, Georgi Djakov wrote:
>>>> On 13.10.19 г. 11:08 ч., Brian Masney wrote:
>>>>> Add interconnect nodes that's needed to support bus scaling.
>>>>>
>>>>> Signed-off-by: Brian Masney <masneyb@onstation.org>
>>>>> ---
>>>>> arch/arm/boot/dts/qcom-msm8974.dtsi | 60 +++++++++++++++++++++++++++++
>>>>> 1 file changed, 60 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>>> @@ -1152,6 +1207,11 @@
>>>>> "core",
>>>>> "vsync";
>>>>>
>>>>> + interconnects = <&mmssnoc MNOC_MAS_GRAPHICS_3D &bimc BIMC_SLV_EBI_CH0>,
>>>>> + <&ocmemnoc OCMEM_VNOC_MAS_GFX3D &ocmemnoc OCMEM_SLV_OCMEM>;
>>>>
>>>> Who will be the requesting bandwidth to DDR and ocmem? Is it the display or GPU
>>>> or both? The above seem like GPU-related interconnects, so maybe these
>>>> properties should be in the GPU DT node.
>>>
>>> The display is what currently requests the interconnect path,
>>> specifically mdp5_setup_interconnect() in
>>> drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c. The Freedreno GPU bindings
>>> currently don't have interconnect support. Maybe this is something that
>>> I should add to that driver as well?
>>
>> The "mdp0-mem" and "mdp1-mem" paths mentioned in the mdp5_kms.c are the two
>> interconnects between the display and DDR memory.
>
> OK, I see. Most of the interconnect paths in the downstream MSM 3.4
> sources are configured in device tree using the
> qcom,msm-bus,vectors-KBps property, which is what I was only looking at
> before. The interconnect path for the display is configured directly in
> code (drivers/video/msm/mdss/mdss_mdp.c) to setup a path between
> MSM_BUS_MASTER_MDP_PORT0 and MSM_BUS_SLAVE_EBI_CH0.
Correct!
>
> In the upstream kernel, it looks like I'll need to
>
> 1) add support for an optional second interconnect path for ocmem to
> drivers/gpu/drm/msm/adreno/adreno_gpu.c.
Yes, just check if there is a "gpu-ocmem" path in DT and scale it when needed.
>
> 2) add implementations of gpu_get_freq and gpu_get_freq to the
> adreno_gpu_funcs struct in drivers/gpu/drm/msm/adreno/a3xx_gpu.c.
>
Maybe, i am not very familiar with adreno stuff. It might be good to CC the
freedreno guys.
Thanks,
Georgi
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2019-10-24 8:27 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-13 8:07 [PATCH 0/5] ARM: qcom: add defconfig items and dts nodes Brian Masney
2019-10-13 8:08 ` [PATCH 1/5] ARM: qcom_defconfig: add ocmem support Brian Masney
2019-10-13 8:08 ` [PATCH 2/5] ARM: qcom_defconfig: add msm8974 interconnect support Brian Masney
2019-10-23 8:16 ` Georgi Djakov
2019-10-13 8:08 ` [PATCH 3/5] ARM: qcom_defconfig: add anx78xx HDMI bridge support Brian Masney
2019-10-13 8:08 ` [PATCH 4/5] ARM: dts: qcom: msm8974: add ocmem node Brian Masney
2019-10-13 8:08 ` [PATCH 5/5] ARM: dts: qcom: msm8974: add interconnect nodes Brian Masney
2019-10-23 11:50 ` Georgi Djakov
2019-10-23 12:47 ` Brian Masney
2019-10-23 13:39 ` Georgi Djakov
2019-10-23 13:51 ` Georgi Djakov
2019-10-24 7:07 ` Brian Masney
2019-10-24 8:27 ` Georgi Djakov
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