From: Jiucheng Xu <jiucheng.xu@amlogic.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-amlogic@lists.infradead.org>, <devicetree@vger.kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Chris Healy <cphealy@gmail.com>
Subject: Re: [PATCH v4 3/4] arm64: dts: meson: Add DDR PMU node
Date: Fri, 5 Aug 2022 17:57:43 +0800 [thread overview]
Message-ID: <0fac4541-0d05-1076-487b-86a7b92da71e@amlogic.com> (raw)
In-Reply-To: <e963157e-5ff0-f0c1-2299-50528cf291c3@linaro.org>
On 2022/8/5 16:22, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On 05/08/2022 09:14, Jiucheng Xu wrote:
>> Add DDR PMU device node for G12 series SoC
>>
>> Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com>
>> ---
>> Changes v3 -> v4:
>> - No change
>>
>> Changes v2 -> v3:
>> - No change
>>
>> Changes v1 -> v2:
>> - Remove model, dmc_nr, chann_nr properties
>> - Add g12a-ddr-pmu, g12b-ddr-pmu, sm1-ddr-pmu compatibles as
>> identifier
>> ---
>> arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 7 +++++++
>> arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 4 ++++
>> arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++
>> arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++
>> 4 files changed, 19 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> index 45947c1031c4..7e556fe575be 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
>> @@ -2146,6 +2146,13 @@ hdmi_tx_out: endpoint {
>> };
>> };
>>
>> + ddr_pmu: ddr_pmu@ff638000 {
> No underscores in node names.
>
> Node names should be generic, so pmu.
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
Okay, I will modify it.
>
>> + compatible = "amlogic,g12-ddr-pmu";
>> + reg = <0x0 0xff638000 0x0 0x100
>> + 0x0 0xff638c00 0x0 0x100>;
>> + interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
>> + };
>> +
>> gic: interrupt-controller@ffc01000 {
>> compatible = "arm,gic-400";
>> reg = <0x0 0xffc01000 0 0x1000>,
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> index fb0ab27d1f64..4a32e081e70e 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
>> @@ -133,3 +133,7 @@ map1 {
>> };
>> };
>> };
>> +
>> +&ddr_pmu {
>> + compatible = "amlogic,g12a-ddr-pmu";
>> +};
> Adding nodes at the end causes conflicts. They should be added in some
> order...
Is alphabetical order okay?
>
> Best regards,
> Krzysztof
>
--
Thanks,
Jiucheng
next prev parent reply other threads:[~2022-08-05 9:57 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-05 7:14 [PATCH v4 1/4] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver Jiucheng Xu
2022-08-05 7:14 ` [PATCH v4 2/4] docs/perf: Add documentation for the Amlogic G12 DDR PMU Jiucheng Xu
2022-08-08 12:58 ` kernel test robot
2022-08-13 0:27 ` kernel test robot
2022-08-05 7:14 ` [PATCH v4 3/4] arm64: dts: meson: Add DDR PMU node Jiucheng Xu
2022-08-05 8:22 ` Krzysztof Kozlowski
2022-08-05 9:57 ` Jiucheng Xu [this message]
2022-08-08 6:14 ` Krzysztof Kozlowski
2022-08-05 7:14 ` [PATCH v4 4/4] dt-binding: perf: Add Amlogic DDR PMU Jiucheng Xu
2022-08-05 8:21 ` Krzysztof Kozlowski
2022-08-05 10:00 ` Jiucheng Xu
2022-08-15 9:04 ` Jiucheng Xu
2022-08-16 5:57 ` Krzysztof Kozlowski
2022-08-05 8:38 ` [PATCH v4 1/4] perf/amlogic: Add support for Amlogic meson G12 SoC DDR PMU driver Krzysztof Kozlowski
2022-08-05 9:55 ` Jiucheng Xu
2022-08-08 5:42 ` Krzysztof Kozlowski
2022-08-08 7:36 ` Jiucheng Xu
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