Re: [PATCH] Define wc_wmb, a write barrier for PCI write combining

From: "Bryan O'Sullivan" <bos@pathscale.com>
To: Andi Kleen <ak@suse.de>
Cc: Andrew Morton <akpm@osdl.org>,
	linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] Define wc_wmb, a write barrier for PCI write combining
Date: Sat, 25 Feb 2006 11:01:23 -0800	[thread overview]
Message-ID: <1140894083.9852.30.camel@localhost.localdomain> (raw)
In-Reply-To: <200602251428.01767.ak@suse.de>

On Sat, 2006-02-25 at 14:28 +0100, Andi Kleen wrote:

> Before we can add such a macro I suspect you would first 
> need to provide some spec how that "portable write combining"
> is supposed to work and get feedback from the other architectures.

It seems like we'd need a function that tries to enable or disable write
combining on an MMIO memory range.  This would be implemented by arches
that support it, and would fail on others.  Drivers could then try to
enable write combining, and if it failed, either bail, print a warning
message, or do something else appropriate.

So on i386 and x86_64, this function would fiddle with the MTRRs.  On
powerpc, it would either configure the northbridge appropriately or
fail.  On other arches, I don't know enough to say, so the default would
be to fail.

Is this reasonable?  I can code a strawman implementation up, if the
basic idea looks sane.

	<b