[PATCH 1/1] [x86] Configuration options to compile out x86 CPU support code

[PATCH 1/1] [x86] Configuration options to compile out x86 CPU support code

[Thomas Petazzoni]

This patch adds some configuration options that allow to compile out
CPU vendor-specific code in x86 kernels (in arch/x86/kernel/cpu). The
new configuration options are only visible when CONFIG_EMBEDDED is
selected, as they are mostly interesting for space savings reasons.

An example of size saving, on x86 with only Intel CPU support:

   text	   data	    bss	    dec	    hex	filename
1125479	 118760	 212992	1457231	 163c4f	vmlinux.old
1121355	 116536	 212992	1450883	 162383	vmlinux
  -4124   -2224       0   -6348   -18CC +/-

However, I'm not exactly sure that the Kconfig wording is correct with
regard to !64BIT / 64BIT.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: michael@free-electrons.com
---
 arch/x86/Kconfig.cpu         |   70 ++++++++++++++++++++++++++++++++++++++++++
 arch/x86/kernel/cpu/Makefile |   19 ++++++-----
 include/asm-x86/bugs.h       |    5 +++
 3 files changed, 85 insertions(+), 9 deletions(-)

diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 2c518fb..6156ac2 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -415,3 +415,73 @@ config X86_MINIMUM_CPU_FAMILY
 config X86_DEBUGCTLMSR
 	def_bool y
 	depends on !(MK6 || MWINCHIPC6 || MWINCHIP2 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386)
+
+menuconfig PROCESSOR_SELECT
+	default y
+	bool "Supported processor vendors" if EMBEDDED
+	help
+	  This lets you choose what x86 vendor support code your kernel
+	  will include.
+
+config CPU_SUP_INTEL_32
+	default y
+	bool "Support Intel processors" if PROCESSOR_SELECT
+	depends on !64BIT
+	help
+	  This enables extended support for Intel processors
+
+config CPU_SUP_INTEL_64
+	default y
+	bool "Support Intel processors" if PROCESSOR_SELECT
+	depends on 64BIT
+	help
+	  This enables extended support for Intel processors
+
+config CPU_SUP_CYRIX_32
+	default y
+	bool "Support Cyrix processors" if PROCESSOR_SELECT
+	depends on !64BIT
+	help
+	  This enables extended support for Cyrix processors
+
+config CPU_SUP_AMD_32
+	default y
+	bool "Support AMD processors" if PROCESSOR_SELECT
+	depends on !64BIT
+	help
+	  This enables extended support for AMD processors
+
+config CPU_SUP_AMD_64
+	default y
+	bool "Support AMD processors" if PROCESSOR_SELECT
+	depends on 64BIT
+	help
+	  This enables extended support for AMD processors
+
+config CPU_SUP_CENTAUR_32
+	default y
+	bool "Support Centaur processors" if PROCESSOR_SELECT
+	depends on !64BIT
+	help
+	  This enables extended support for Centaur processors
+
+config CPU_SUP_CENTAUR_64
+	default y
+	bool "Support Centaur processors" if PROCESSOR_SELECT
+	depends on 64BIT
+	help
+	  This enables extended support for Centaur processors
+
+config CPU_SUP_TRANSMETA_32
+	default y
+	bool "Support Transmeta processors" if PROCESSOR_SELECT
+	depends on !64BIT
+	help
+	  This enables extended support for Transmeta processors
+
+config CPU_SUP_UMC_32
+	default y
+	bool "Support UMC processors" if PROCESSOR_SELECT
+	depends on !64BIT
+	help
+	  This enables extended support for UMC processors
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index ee76eaa..a35ee92 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -7,15 +7,16 @@ obj-y			+= proc.o feature_names.o
 
 obj-$(CONFIG_X86_32)	+= common.o bugs.o
 obj-$(CONFIG_X86_64)	+= common_64.o bugs_64.o
-obj-$(CONFIG_X86_32)	+= amd.o
-obj-$(CONFIG_X86_64)	+= amd_64.o
-obj-$(CONFIG_X86_32)	+= cyrix.o
-obj-$(CONFIG_X86_32)	+= centaur.o
-obj-$(CONFIG_X86_64)	+= centaur_64.o
-obj-$(CONFIG_X86_32)	+= transmeta.o
-obj-$(CONFIG_X86_32)	+= intel.o
-obj-$(CONFIG_X86_64)	+= intel_64.o
-obj-$(CONFIG_X86_32)	+= umc.o
+
+obj-$(CONFIG_CPU_SUP_AMD_32)		+= amd.o
+obj-$(CONFIG_CPU_SUP_AMD_64)		+= amd_64.o
+obj-$(CONFIG_CPU_SUP_CYRIX_32)		+= cyrix.o
+obj-$(CONFIG_CPU_SUP_CENTAUR_32)	+= centaur.o
+obj-$(CONFIG_CPU_SUP_CENTAUR_64)	+= centaur_64.o
+obj-$(CONFIG_CPU_SUP_TRANSMETA_32)	+= transmeta.o
+obj-$(CONFIG_CPU_SUP_INTEL_32)		+= intel.o
+obj-$(CONFIG_CPU_SUP_INTEL_64)		+= intel_64.o
+obj-$(CONFIG_CPU_SUP_UMC_32)		+= umc.o
 
 obj-$(CONFIG_X86_MCE)	+= mcheck/
 obj-$(CONFIG_MTRR)	+= mtrr/
diff --git a/include/asm-x86/bugs.h b/include/asm-x86/bugs.h
index 021cbdd..66cf8c9 100644
--- a/include/asm-x86/bugs.h
+++ b/include/asm-x86/bugs.h
@@ -2,6 +2,11 @@
 #define _ASM_X86_BUGS_H
 
 extern void check_bugs(void);
+
+#ifdef CONFIG_CPU_SUP_INTEL_32
 int ppro_with_ram_bug(void);
+#else
+#define ppro_with_ram_bug() (0)
+#endif
 
 #endif /* _ASM_X86_BUGS_H */
-- 
1.5.4.3

Re: [PATCH 1/1] [x86] Configuration options to compile out x86 CPU support code

[Ingo Molnar]

* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:

> This patch adds some configuration options that allow to compile out 
> CPU vendor-specific code in x86 kernels (in arch/x86/kernel/cpu). The 
> new configuration options are only visible when CONFIG_EMBEDDED is 
> selected, as they are mostly interesting for space savings reasons.
> 
> An example of size saving, on x86 with only Intel CPU support:
> 
>    text	   data	    bss	    dec	    hex	filename
> 1125479	 118760	 212992	1457231	 163c4f	vmlinux.old
> 1121355	 116536	 212992	1450883	 162383	vmlinux
>   -4124   -2224       0   -6348   -18CC +/-
> 
> However, I'm not exactly sure that the Kconfig wording is correct with 
> regard to !64BIT / 64BIT.

applied to tip/x86/cpu, thanks Thomas. (I've done a trivial cleanup: 
converted the macro to an inline.)

Peter, do you like this version of the patch or would you like further 
improvements?

	Ingo

Re: [PATCH 1/1] [x86] Configuration options to compile out x86 CPU support code

[Ingo Molnar]

-tip testing found a couple of build failures:

  LD      .tmp_vmlinux1
arch/x86/lib/lib.a(usercopy_32.o): In function `__copy_to_user_ll':
(.text+0x11e): undefined reference to `movsl_mask'
arch/x86/lib/lib.a(usercopy_32.o): In function `__copy_from_user_ll':
(.text+0x1fa): undefined reference to `movsl_mask'
arch/x86/lib/lib.a(usercopy_32.o): In function 
`__copy_from_user_ll_nozero':
(.text+0x2d6): undefined reference to `movsl_mask'
arch/x86/lib/lib.a(usercopy_32.o): In function `copy_from_user':
(.text+0x5ac): undefined reference to `movsl_mask'
arch/x86/lib/lib.a(usercopy_32.o): In function `copy_to_user':
(.text+0x6bf): undefined reference to `movsl_mask'
make: *** [.tmp_vmlinux1] Error 1

with:

  http://redhat.com/~mingo/misc/config-Fri_Aug_15_16_35_03_CEST_2008.bad

and:

arch/x86/kvm/built-in.o: In function `paging64_cmpxchg_gpte':
mmu.c:(.text+0xa80d): undefined reference to `cmpxchg_486_u64'

with:

  http://redhat.com/~mingo/misc/config-Fri_Aug_15_16_27_47_CEST_2008.bad

reverting your change solved both of them.

i still have the commit in tip/x86/cpu so please send a delta fix ontop 
of your previous patch once you figure out the problem. Thanks,

	Ingo

[PATCH] [x86] Make movsl_mask definition non-CPU specific

[Thomas Petazzoni]

movsl_mask is currently defined in arch/x86/kernel/cpu/intel.c, which
contains code specific to Intel CPUs. However, movsl_mask is used in
the non-CPU specific code in arch/x86/lib/usercopy_32.c, which breaks
the compilation when support for Intel CPUs is compiled out.

This patch solves this problem by moving movsl_mask's definition close
to its users in arch/x86/lib/usercopy_32.c.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/x86/kernel/cpu/intel.c |    7 -------
 arch/x86/lib/usercopy_32.c  |    7 +++++++
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index b75f256..5c8959b 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -23,13 +23,6 @@
 #include <mach_apic.h>
 #endif
 
-#ifdef CONFIG_X86_INTEL_USERCOPY
-/*
- * Alignment at which movsl is preferred for bulk memory copies.
- */
-struct movsl_mask movsl_mask __read_mostly;
-#endif
-
 static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 {
 	/* Netburst reports 64 bytes clflush size, but does IO in 128 bytes */
diff --git a/arch/x86/lib/usercopy_32.c b/arch/x86/lib/usercopy_32.c
index 24e6094..9e68075 100644
--- a/arch/x86/lib/usercopy_32.c
+++ b/arch/x86/lib/usercopy_32.c
@@ -14,6 +14,13 @@
 #include <asm/uaccess.h>
 #include <asm/mmx.h>
 
+#ifdef CONFIG_X86_INTEL_USERCOPY
+/*
+ * Alignment at which movsl is preferred for bulk memory copies.
+ */
+struct movsl_mask movsl_mask __read_mostly;
+#endif
+
 static inline int __movsl_is_ok(unsigned long a1, unsigned long a2, unsigned long n)
 {
 #ifdef CONFIG_X86_INTEL_USERCOPY
-- 
1.5.4.3

[PATCH] [x86] Move cmpxchg fallbacks to a generic place

[Thomas Petazzoni]

arch/x86/kernel/cpu/intel.c defines a few fallback functions
(cmpxchg_*()) that are used when the CPU doesn't support cmpxchg
and/or cmpxchg64 natively. However, while defined in an Intel-specific
file, these functions are also used for CPUs from other vendors when
they don't support cmpxchg and/or cmpxchg64. This breaks the
compilation when support for Intel CPUs is disabled.

This patch moves these functions to a new
arch/x86/kernel/cpu/cmpxchg.c file, unconditionally compiled when
X86_32 is enabled.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
---
 arch/x86/kernel/cpu/Makefile  |    2 +-
 arch/x86/kernel/cpu/cmpxchg.c |   72 +++++++++++++++++++++++++++++++++++++++++
 arch/x86/kernel/cpu/intel.c   |   64 ------------------------------------
 3 files changed, 73 insertions(+), 65 deletions(-)
 create mode 100644 arch/x86/kernel/cpu/cmpxchg.c

diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index a35ee92..a0fc6c1 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -5,7 +5,7 @@
 obj-y			:= intel_cacheinfo.o addon_cpuid_features.o
 obj-y			+= proc.o feature_names.o
 
-obj-$(CONFIG_X86_32)	+= common.o bugs.o
+obj-$(CONFIG_X86_32)	+= common.o bugs.o cmpxchg.o
 obj-$(CONFIG_X86_64)	+= common_64.o bugs_64.o
 
 obj-$(CONFIG_CPU_SUP_AMD_32)		+= amd.o
diff --git a/arch/x86/kernel/cpu/cmpxchg.c b/arch/x86/kernel/cpu/cmpxchg.c
new file mode 100644
index 0000000..2056ccf
--- /dev/null
+++ b/arch/x86/kernel/cpu/cmpxchg.c
@@ -0,0 +1,72 @@
+/*
+ * cmpxchg*() fallbacks for CPU not supporting these instructions
+ */
+
+#include <linux/kernel.h>
+#include <linux/smp.h>
+#include <linux/module.h>
+
+#ifndef CONFIG_X86_CMPXCHG
+unsigned long cmpxchg_386_u8(volatile void *ptr, u8 old, u8 new)
+{
+	u8 prev;
+	unsigned long flags;
+
+	/* Poor man's cmpxchg for 386. Unsuitable for SMP */
+	local_irq_save(flags);
+	prev = *(u8 *)ptr;
+	if (prev == old)
+		*(u8 *)ptr = new;
+	local_irq_restore(flags);
+	return prev;
+}
+EXPORT_SYMBOL(cmpxchg_386_u8);
+
+unsigned long cmpxchg_386_u16(volatile void *ptr, u16 old, u16 new)
+{
+	u16 prev;
+	unsigned long flags;
+
+	/* Poor man's cmpxchg for 386. Unsuitable for SMP */
+	local_irq_save(flags);
+	prev = *(u16 *)ptr;
+	if (prev == old)
+		*(u16 *)ptr = new;
+	local_irq_restore(flags);
+	return prev;
+}
+EXPORT_SYMBOL(cmpxchg_386_u16);
+
+unsigned long cmpxchg_386_u32(volatile void *ptr, u32 old, u32 new)
+{
+	u32 prev;
+	unsigned long flags;
+
+	/* Poor man's cmpxchg for 386. Unsuitable for SMP */
+	local_irq_save(flags);
+	prev = *(u32 *)ptr;
+	if (prev == old)
+		*(u32 *)ptr = new;
+	local_irq_restore(flags);
+	return prev;
+}
+EXPORT_SYMBOL(cmpxchg_386_u32);
+#endif
+
+#ifndef CONFIG_X86_CMPXCHG64
+unsigned long long cmpxchg_486_u64(volatile void *ptr, u64 old, u64 new)
+{
+	u64 prev;
+	unsigned long flags;
+
+	/* Poor man's cmpxchg8b for 386 and 486. Unsuitable for SMP */
+	local_irq_save(flags);
+	prev = *(u64 *)ptr;
+	if (prev == old)
+		*(u64 *)ptr = new;
+	local_irq_restore(flags);
+	return prev;
+}
+EXPORT_SYMBOL(cmpxchg_486_u64);
+#endif
+
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 5c8959b..77618c7 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -307,69 +307,5 @@ static struct cpu_dev intel_cpu_dev __cpuinitdata = {
 
 cpu_vendor_dev_register(X86_VENDOR_INTEL, &intel_cpu_dev);
 
-#ifndef CONFIG_X86_CMPXCHG
-unsigned long cmpxchg_386_u8(volatile void *ptr, u8 old, u8 new)
-{
-	u8 prev;
-	unsigned long flags;
-
-	/* Poor man's cmpxchg for 386. Unsuitable for SMP */
-	local_irq_save(flags);
-	prev = *(u8 *)ptr;
-	if (prev == old)
-		*(u8 *)ptr = new;
-	local_irq_restore(flags);
-	return prev;
-}
-EXPORT_SYMBOL(cmpxchg_386_u8);
-
-unsigned long cmpxchg_386_u16(volatile void *ptr, u16 old, u16 new)
-{
-	u16 prev;
-	unsigned long flags;
-
-	/* Poor man's cmpxchg for 386. Unsuitable for SMP */
-	local_irq_save(flags);
-	prev = *(u16 *)ptr;
-	if (prev == old)
-		*(u16 *)ptr = new;
-	local_irq_restore(flags);
-	return prev;
-}
-EXPORT_SYMBOL(cmpxchg_386_u16);
-
-unsigned long cmpxchg_386_u32(volatile void *ptr, u32 old, u32 new)
-{
-	u32 prev;
-	unsigned long flags;
-
-	/* Poor man's cmpxchg for 386. Unsuitable for SMP */
-	local_irq_save(flags);
-	prev = *(u32 *)ptr;
-	if (prev == old)
-		*(u32 *)ptr = new;
-	local_irq_restore(flags);
-	return prev;
-}
-EXPORT_SYMBOL(cmpxchg_386_u32);
-#endif
-
-#ifndef CONFIG_X86_CMPXCHG64
-unsigned long long cmpxchg_486_u64(volatile void *ptr, u64 old, u64 new)
-{
-	u64 prev;
-	unsigned long flags;
-
-	/* Poor man's cmpxchg8b for 386 and 486. Unsuitable for SMP */
-	local_irq_save(flags);
-	prev = *(u64 *)ptr;
-	if (prev == old)
-		*(u64 *)ptr = new;
-	local_irq_restore(flags);
-	return prev;
-}
-EXPORT_SYMBOL(cmpxchg_486_u64);
-#endif
-
 /* arch_initcall(intel_cpu_init); */
 
-- 
1.5.4.3

Re: [PATCH] [x86] Move cmpxchg fallbacks to a generic place

[Ingo Molnar]

* Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:

> arch/x86/kernel/cpu/intel.c defines a few fallback functions
> (cmpxchg_*()) that are used when the CPU doesn't support cmpxchg
> and/or cmpxchg64 natively. However, while defined in an Intel-specific
> file, these functions are also used for CPUs from other vendors when
> they don't support cmpxchg and/or cmpxchg64. This breaks the
> compilation when support for Intel CPUs is disabled.
> 
> This patch moves these functions to a new
> arch/x86/kernel/cpu/cmpxchg.c file, unconditionally compiled when
> X86_32 is enabled.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

applied both fixes to tip/x86/cpu, thanks Thomas.

I also flipped it around with the cpu-id reduction patch, so that it 
remains bisectable. The new commit IDs in -tip are:

8bfcb39: x86: make movsl_mask definition non-CPU specific
774400a: x86: move cmpxchg fallbacks to a generic place
8d02c21: x86: configuration options to compile out x86 CPU support code

	Ingo

Re: [PATCH 1/1] [x86] Configuration options to compile out x86 CPU support code

[H. Peter Anvin]

Ingo Molnar wrote:
> * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:
> 
>> This patch adds some configuration options that allow to compile out 
>> CPU vendor-specific code in x86 kernels (in arch/x86/kernel/cpu). The 
>> new configuration options are only visible when CONFIG_EMBEDDED is 
>> selected, as they are mostly interesting for space savings reasons.
>>
>> An example of size saving, on x86 with only Intel CPU support:
>>
>>    text	   data	    bss	    dec	    hex	filename
>> 1125479	 118760	 212992	1457231	 163c4f	vmlinux.old
>> 1121355	 116536	 212992	1450883	 162383	vmlinux
>>   -4124   -2224       0   -6348   -18CC +/-
>>
>> However, I'm not exactly sure that the Kconfig wording is correct with 
>> regard to !64BIT / 64BIT.
> 
> applied to tip/x86/cpu, thanks Thomas. (I've done a trivial cleanup: 
> converted the macro to an inline.)
> 
> Peter, do you like this version of the patch or would you like further 
> improvements?
> 

I'm fine with it.

I think there might still be cross-dependencies, but it doesn't break 
anything old, so we can deal with that via bug reports.

The other thing that probably should be done is breaking out the 
Intel-specific versus generic parts of intel_cacheinfo.c.

	-hpa

Re: [PATCH 1/1] [x86] Configuration options to compile out x86 CPU support code

[Bodo Eggert]

Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:

> This patch adds some configuration options that allow to compile out
> CPU vendor-specific code in x86 kernels (in arch/x86/kernel/cpu). The
> new configuration options are only visible when CONFIG_EMBEDDED is
> selected, as they are mostly interesting for space savings reasons.

> +menuconfig PROCESSOR_SELECT
> +     default y
> +     bool "Supported processor vendors" if EMBEDDED
> +     help
> +       This lets you choose what x86 vendor support code your kernel
> +       will include.
> +
> +config CPU_SUP_INTEL_32
> +     default y
> +     bool "Support Intel processors" if PROCESSOR_SELECT
> +     depends on !64BIT
> +     help
> +       This enables extended support for Intel processors
> +

I don't think having a generic kernel for only Intel CPUs makes much sense,
and OTOH, if you optimize for e.g. Athlon CPUs, you're likely to not need
Intel code on that machine - even on desktop systems.

What about an option to "Include code for CPUs from all supported vendors",
invisible and y for generic kernels?