* [patch]pageattr: cache flush before tlb flush
@ 2008-08-18 2:27 Shaohua Li
2008-08-19 5:09 ` H. Peter Anvin
2008-08-19 6:38 ` Andi Kleen
0 siblings, 2 replies; 4+ messages in thread
From: Shaohua Li @ 2008-08-18 2:27 UTC (permalink / raw)
To: lkml; +Cc: Andrew Morton, Ingo Molnar, Pallipadi, Venkatesh
clflush uses a virtual address but cache line is physical indexed in
x86. In my understanding, clflush will do some pagetable walk, so doing
cache flush first should reduce some pagetable walk.
Signed-off-by: Shaohua Li <shaohua.li@intel.com>
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index f5f5154..d8b24df 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -168,10 +168,8 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache)
BUG_ON(irqs_disabled());
WARN_ON(PAGE_ALIGN(start) != start);
- on_each_cpu(__cpa_flush_range, NULL, 1);
-
if (!cache)
- return;
+ goto tlb_flush;
/*
* We only need to flush on one CPU,
@@ -188,6 +186,9 @@ static void cpa_flush_range(unsigned long start, int numpages, int cache)
if (pte && (pte_val(*pte) & _PAGE_PRESENT))
clflush_cache_range((void *) addr, PAGE_SIZE);
}
+
+tlb_flush:
+ on_each_cpu(__cpa_flush_range, NULL, 1);
}
/*
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [patch]pageattr: cache flush before tlb flush
2008-08-18 2:27 [patch]pageattr: cache flush before tlb flush Shaohua Li
@ 2008-08-19 5:09 ` H. Peter Anvin
2008-08-19 5:24 ` Li, Shaohua
2008-08-19 6:38 ` Andi Kleen
1 sibling, 1 reply; 4+ messages in thread
From: H. Peter Anvin @ 2008-08-19 5:09 UTC (permalink / raw)
To: Shaohua Li; +Cc: lkml, Andrew Morton, Ingo Molnar, Pallipadi, Venkatesh
Shaohua Li wrote:
> clflush uses a virtual address but cache line is physical indexed in
> x86. In my understanding, clflush will do some pagetable walk, so doing
> cache flush first should reduce some pagetable walk.
>
> Signed-off-by: Shaohua Li <shaohua.li@intel.com>
I would say NAK on this.
Doing the CLFLUSH first does cut down on page table walking, but opens a
hole in the sequencing: first set PAT to an uncachable mode, then flush.
If an unlucky prefetch comes in during this window, then you will have a
dirty cache again.
So no, this is not a good idea.
-hpa
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [patch]pageattr: cache flush before tlb flush
2008-08-19 5:09 ` H. Peter Anvin
@ 2008-08-19 5:24 ` Li, Shaohua
0 siblings, 0 replies; 4+ messages in thread
From: Li, Shaohua @ 2008-08-19 5:24 UTC (permalink / raw)
To: H. Peter Anvin; +Cc: lkml, Andrew Morton, Ingo Molnar, Pallipadi, Venkatesh
>-----Original Message-----
>From: H. Peter Anvin [mailto:hpa@zytor.com]
>Sent: Tuesday, August 19, 2008 1:10 PM
>To: Li, Shaohua
>Cc: lkml; Andrew Morton; Ingo Molnar; Pallipadi, Venkatesh
>Subject: Re: [patch]pageattr: cache flush before tlb flush
>
>Shaohua Li wrote:
>> clflush uses a virtual address but cache line is physical indexed in
>> x86. In my understanding, clflush will do some pagetable walk, so doing
>> cache flush first should reduce some pagetable walk.
>>
>> Signed-off-by: Shaohua Li <shaohua.li@intel.com>
>
>I would say NAK on this.
>
>Doing the CLFLUSH first does cut down on page table walking, but opens a
>hole in the sequencing: first set PAT to an uncachable mode, then flush.
>
>If an unlucky prefetch comes in during this window, then you will have a
>dirty cache again.
>
>So no, this is not a good idea.
Ok, looks possible in theory.
Thanks,
Shaohua
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [patch]pageattr: cache flush before tlb flush
2008-08-18 2:27 [patch]pageattr: cache flush before tlb flush Shaohua Li
2008-08-19 5:09 ` H. Peter Anvin
@ 2008-08-19 6:38 ` Andi Kleen
1 sibling, 0 replies; 4+ messages in thread
From: Andi Kleen @ 2008-08-19 6:38 UTC (permalink / raw)
To: Shaohua Li; +Cc: lkml, Andrew Morton, Ingo Molnar, Pallipadi, Venkatesh
Shaohua Li <shaohua.li@intel.com> writes:
> clflush uses a virtual address but cache line is physical indexed in
> x86. In my understanding, clflush will do some pagetable walk, so doing
> cache flush first should reduce some pagetable walk.
The SDM describes the exact sequence how this should be done.
Linux unfortunately skips one step currently, but it's not a good
idea to diverge even more.
-Andi
^ permalink raw reply [flat|nested] 4+ messages in thread
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2008-08-18 2:27 [patch]pageattr: cache flush before tlb flush Shaohua Li
2008-08-19 5:09 ` H. Peter Anvin
2008-08-19 5:24 ` Li, Shaohua
2008-08-19 6:38 ` Andi Kleen
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