* [PATCH v3 1/3] gpio: gpio-mxs: copy mach-mxs/gpio.c into drivers/gpio
2011-06-04 10:55 [PATCH v3 0/3] Move Freescale MXS gpio driver into drivers/gpio Shawn Guo
@ 2011-06-04 10:55 ` Shawn Guo
2011-06-04 22:29 ` Grant Likely
2011-06-04 10:55 ` [PATCH v3 2/3] gpio: gpio-mxs: make it work for Freescale MXS architecture Shawn Guo
2011-06-04 10:55 ` [PATCH v3 3/3] ARM: mxs: use gpio-mxs driver by adding platform device Shawn Guo
2 siblings, 1 reply; 8+ messages in thread
From: Shawn Guo @ 2011-06-04 10:55 UTC (permalink / raw)
To: linux-kernel
Cc: grant.likely, arnd, kernel, linux-arm-kernel, patches, Shawn Guo
As the first patch of the series that moves mach-mxc gpio driver into
drivers/gpio, it copies arch/arm/mach-mxs/gpio.c into
drivers/gpio/gpio-mxs.c. The later patches will make necessary
changes to the driver, migrate the existing users to it, and lastly
deletes mach-mxs gpio driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/gpio/gpio-mxs.c | 331 +++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 331 insertions(+), 0 deletions(-)
create mode 100644 drivers/gpio/gpio-mxs.c
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
new file mode 100644
index 0000000..2c950fe
--- /dev/null
+++ b/drivers/gpio/gpio-mxs.c
@@ -0,0 +1,331 @@
+/*
+ * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de>
+ * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
+ *
+ * Based on code from Freescale,
+ * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301, USA.
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <mach/mx23.h>
+#include <mach/mx28.h>
+#include <asm-generic/bug.h>
+
+#include "gpio.h"
+
+static struct mxs_gpio_port *mxs_gpio_ports;
+static int gpio_table_size;
+
+#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10)
+#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10)
+#define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10)
+#define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10)
+#define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10)
+#define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10)
+#define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10)
+#define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10)
+
+#define GPIO_INT_FALL_EDGE 0x0
+#define GPIO_INT_LOW_LEV 0x1
+#define GPIO_INT_RISE_EDGE 0x2
+#define GPIO_INT_HIGH_LEV 0x3
+#define GPIO_INT_LEV_MASK (1 << 0)
+#define GPIO_INT_POL_MASK (1 << 1)
+
+/* Note: This driver assumes 32 GPIOs are handled in one register */
+
+static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index)
+{
+ __mxs_clrl(1 << index, port->base + PINCTRL_IRQSTAT(port->id));
+}
+
+static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index,
+ int enable)
+{
+ if (enable) {
+ __mxs_setl(1 << index, port->base + PINCTRL_IRQEN(port->id));
+ __mxs_setl(1 << index, port->base + PINCTRL_PIN2IRQ(port->id));
+ } else {
+ __mxs_clrl(1 << index, port->base + PINCTRL_IRQEN(port->id));
+ }
+}
+
+static void mxs_gpio_ack_irq(struct irq_data *d)
+{
+ u32 gpio = irq_to_gpio(d->irq);
+ clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f);
+}
+
+static void mxs_gpio_mask_irq(struct irq_data *d)
+{
+ u32 gpio = irq_to_gpio(d->irq);
+ set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0);
+}
+
+static void mxs_gpio_unmask_irq(struct irq_data *d)
+{
+ u32 gpio = irq_to_gpio(d->irq);
+ set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1);
+}
+
+static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset);
+
+static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
+{
+ u32 gpio = irq_to_gpio(d->irq);
+ u32 pin_mask = 1 << (gpio & 31);
+ struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
+ void __iomem *pin_addr;
+ int edge;
+
+ switch (type) {
+ case IRQ_TYPE_EDGE_RISING:
+ edge = GPIO_INT_RISE_EDGE;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ edge = GPIO_INT_FALL_EDGE;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ edge = GPIO_INT_LOW_LEV;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ edge = GPIO_INT_HIGH_LEV;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ /* set level or edge */
+ pin_addr = port->base + PINCTRL_IRQLEV(port->id);
+ if (edge & GPIO_INT_LEV_MASK)
+ __mxs_setl(pin_mask, pin_addr);
+ else
+ __mxs_clrl(pin_mask, pin_addr);
+
+ /* set polarity */
+ pin_addr = port->base + PINCTRL_IRQPOL(port->id);
+ if (edge & GPIO_INT_POL_MASK)
+ __mxs_setl(pin_mask, pin_addr);
+ else
+ __mxs_clrl(pin_mask, pin_addr);
+
+ clear_gpio_irqstatus(port, gpio & 0x1f);
+
+ return 0;
+}
+
+/* MXS has one interrupt *per* gpio port */
+static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
+{
+ u32 irq_stat;
+ struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq);
+ u32 gpio_irq_no_base = port->virtual_irq_start;
+
+ desc->irq_data.chip->irq_ack(&desc->irq_data);
+
+ irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
+ __raw_readl(port->base + PINCTRL_IRQEN(port->id));
+
+ while (irq_stat != 0) {
+ int irqoffset = fls(irq_stat) - 1;
+ generic_handle_irq(gpio_irq_no_base + irqoffset);
+ irq_stat &= ~(1 << irqoffset);
+ }
+}
+
+/*
+ * Set interrupt number "irq" in the GPIO as a wake-up source.
+ * While system is running, all registered GPIO interrupts need to have
+ * wake-up enabled. When system is suspended, only selected GPIO interrupts
+ * need to have wake-up enabled.
+ * @param irq interrupt source number
+ * @param enable enable as wake-up if equal to non-zero
+ * @return This function returns 0 on success.
+ */
+static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
+{
+ u32 gpio = irq_to_gpio(d->irq);
+ u32 gpio_idx = gpio & 0x1f;
+ struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
+
+ if (enable) {
+ if (port->irq_high && (gpio_idx >= 16))
+ enable_irq_wake(port->irq_high);
+ else
+ enable_irq_wake(port->irq);
+ } else {
+ if (port->irq_high && (gpio_idx >= 16))
+ disable_irq_wake(port->irq_high);
+ else
+ disable_irq_wake(port->irq);
+ }
+
+ return 0;
+}
+
+static struct irq_chip gpio_irq_chip = {
+ .name = "mxs gpio",
+ .irq_ack = mxs_gpio_ack_irq,
+ .irq_mask = mxs_gpio_mask_irq,
+ .irq_unmask = mxs_gpio_unmask_irq,
+ .irq_set_type = mxs_gpio_set_irq_type,
+ .irq_set_wake = mxs_gpio_set_wake_irq,
+};
+
+static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset,
+ int dir)
+{
+ struct mxs_gpio_port *port =
+ container_of(chip, struct mxs_gpio_port, chip);
+ void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id);
+
+ if (dir)
+ __mxs_setl(1 << offset, pin_addr);
+ else
+ __mxs_clrl(1 << offset, pin_addr);
+}
+
+static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+ struct mxs_gpio_port *port =
+ container_of(chip, struct mxs_gpio_port, chip);
+
+ return (__raw_readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1;
+}
+
+static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+ struct mxs_gpio_port *port =
+ container_of(chip, struct mxs_gpio_port, chip);
+ void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id);
+
+ if (value)
+ __mxs_setl(1 << offset, pin_addr);
+ else
+ __mxs_clrl(1 << offset, pin_addr);
+}
+
+static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
+{
+ struct mxs_gpio_port *port =
+ container_of(chip, struct mxs_gpio_port, chip);
+
+ return port->virtual_irq_start + offset;
+}
+
+static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
+{
+ mxs_set_gpio_direction(chip, offset, 0);
+ return 0;
+}
+
+static int mxs_gpio_direction_output(struct gpio_chip *chip,
+ unsigned offset, int value)
+{
+ mxs_gpio_set(chip, offset, value);
+ mxs_set_gpio_direction(chip, offset, 1);
+ return 0;
+}
+
+int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt)
+{
+ int i, j;
+
+ /* save for local usage */
+ mxs_gpio_ports = port;
+ gpio_table_size = cnt;
+
+ pr_info("MXS GPIO hardware\n");
+
+ for (i = 0; i < cnt; i++) {
+ /* disable the interrupt and clear the status */
+ __raw_writel(0, port[i].base + PINCTRL_PIN2IRQ(i));
+ __raw_writel(0, port[i].base + PINCTRL_IRQEN(i));
+
+ /* clear address has to be used to clear IRQSTAT bits */
+ __mxs_clrl(~0U, port[i].base + PINCTRL_IRQSTAT(i));
+
+ for (j = port[i].virtual_irq_start;
+ j < port[i].virtual_irq_start + 32; j++) {
+ irq_set_chip_and_handler(j, &gpio_irq_chip,
+ handle_level_irq);
+ set_irq_flags(j, IRQF_VALID);
+ }
+
+ /* setup one handler for each entry */
+ irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler);
+ irq_set_handler_data(port[i].irq, &port[i]);
+
+ /* register gpio chip */
+ port[i].chip.direction_input = mxs_gpio_direction_input;
+ port[i].chip.direction_output = mxs_gpio_direction_output;
+ port[i].chip.get = mxs_gpio_get;
+ port[i].chip.set = mxs_gpio_set;
+ port[i].chip.to_irq = mxs_gpio_to_irq;
+ port[i].chip.base = i * 32;
+ port[i].chip.ngpio = 32;
+
+ /* its a serious configuration bug when it fails */
+ BUG_ON(gpiochip_add(&port[i].chip) < 0);
+ }
+
+ return 0;
+}
+
+#define MX23_GPIO_BASE MX23_IO_ADDRESS(MX23_PINCTRL_BASE_ADDR)
+#define MX28_GPIO_BASE MX28_IO_ADDRESS(MX28_PINCTRL_BASE_ADDR)
+
+#define DEFINE_MXS_GPIO_PORT(_base, _irq, _id) \
+ { \
+ .chip.label = "gpio-" #_id, \
+ .id = _id, \
+ .irq = _irq, \
+ .base = _base, \
+ .virtual_irq_start = MXS_GPIO_IRQ_START + (_id) * 32, \
+ }
+
+#ifdef CONFIG_SOC_IMX23
+static struct mxs_gpio_port mx23_gpio_ports[] = {
+ DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO0, 0),
+ DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO1, 1),
+ DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO2, 2),
+};
+
+int __init mx23_register_gpios(void)
+{
+ return mxs_gpio_init(mx23_gpio_ports, ARRAY_SIZE(mx23_gpio_ports));
+}
+#endif
+
+#ifdef CONFIG_SOC_IMX28
+static struct mxs_gpio_port mx28_gpio_ports[] = {
+ DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO0, 0),
+ DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO1, 1),
+ DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO2, 2),
+ DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO3, 3),
+ DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO4, 4),
+};
+
+int __init mx28_register_gpios(void)
+{
+ return mxs_gpio_init(mx28_gpio_ports, ARRAY_SIZE(mx28_gpio_ports));
+}
+#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 1/3] gpio: gpio-mxs: copy mach-mxs/gpio.c into drivers/gpio
2011-06-04 10:55 ` [PATCH v3 1/3] gpio: gpio-mxs: copy mach-mxs/gpio.c " Shawn Guo
@ 2011-06-04 22:29 ` Grant Likely
2011-06-05 16:23 ` Shawn Guo
0 siblings, 1 reply; 8+ messages in thread
From: Grant Likely @ 2011-06-04 22:29 UTC (permalink / raw)
To: Shawn Guo; +Cc: linux-kernel, arnd, kernel, linux-arm-kernel, patches
On Sat, Jun 04, 2011 at 06:55:38PM +0800, Shawn Guo wrote:
> As the first patch of the series that moves mach-mxc gpio driver into
> drivers/gpio, it copies arch/arm/mach-mxs/gpio.c into
> drivers/gpio/gpio-mxs.c. The later patches will make necessary
> changes to the driver, migrate the existing users to it, and lastly
> deletes mach-mxs gpio driver.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> drivers/gpio/gpio-mxs.c | 331 +++++++++++++++++++++++++++++++++++++++++++++++
[sigh] I fear we are having a communication breakdown. Since your
/moving/ a file, you need to make it easy for readers to understand
what has changed and why. That means using 1 patch to move the file
with only the changes absolutely necessary to ensure bisectability,
and then followup patches for the clean up.
Adding a new copy in one patch, and then removing the old copy in the
other patch does not make it easy for a reader to understand what
changed. Below is what you're first patch should look like (using the
-M flag to show the actual changes which are only #include differences).
I've build tested this patch and have it sitting in the gpio/next
branch of git://git.secretlab.ca/git/linux-2.6 at the moment if you
want to build the rest of your series on top of it.
g.
---
commit e084f5b06ca7f3d94d9d042d288a3311398e5c49
Author: Grant Likely <grant.likely@secretlab.ca>
Date: Sat Jun 4 16:18:59 2011 -0600
gpio/mxs: Move Freescale mxs gpio driver to drivers/gpio
GPIO drivers are getting moved to drivers/gpio for cleanup and
consolidation. This patch moves the mxs driver. Follow up patches
will clean it up and make it a fine upstanding example of a gpio
driver.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
arch/arm/mach-mxs/Makefile | 2 +-
.../mach-mxs/{gpio.h => include/mach/gpio-mxs.h} | 0
arch/arm/mach-mxs/mach-mx28evk.c | 2 +-
drivers/gpio/Kconfig | 4 ++++
drivers/gpio/Makefile | 1 +
.../arm/mach-mxs/gpio.c => drivers/gpio/gpio-mxs.c | 3 +--
6 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index 58e8923..6c38262 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -1,5 +1,5 @@
# Common support
-obj-y := clock.o devices.o gpio.o icoll.o iomux.o system.o timer.o
+obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o
obj-$(CONFIG_MXS_OCOTP) += ocotp.o
obj-$(CONFIG_PM) += pm.o
diff --git a/arch/arm/mach-mxs/gpio.h b/arch/arm/mach-mxs/include/mach/gpio-mxs.h
similarity index 100%
rename from arch/arm/mach-mxs/gpio.h
rename to arch/arm/mach-mxs/include/mach/gpio-mxs.h
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index eacdc6b..347cf35 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -24,9 +24,9 @@
#include <mach/common.h>
#include <mach/iomux-mx28.h>
+#include <mach/gpio-mxs.h>
#include "devices-mx28.h"
-#include "gpio.h"
#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 21271a5..afe44aa 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -94,6 +94,10 @@ config GPIO_EXYNOS4
def_bool y
depends on CPU_EXYNOS4210
+config GPIO_MXS
+ def_bool y
+ depends on ARCH_MXS
+
config GPIO_PLAT_SAMSUNG
def_bool y
depends on SAMSUNG_GPIOLIB_4BIT
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index e6e5032..8733d02 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_GPIO_BASIC_MMIO_CORE) += basic_mmio_gpio.o
obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o
obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
obj-$(CONFIG_GPIO_EXYNOS4) += gpio-exynos4.o
+obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o
obj-$(CONFIG_GPIO_PLAT_SAMSUNG) += gpio-plat-samsung.o
obj-$(CONFIG_GPIO_S5PC100) += gpio-s5pc100.o
obj-$(CONFIG_GPIO_S5PV210) += gpio-s5pv210.o
diff --git a/arch/arm/mach-mxs/gpio.c b/drivers/gpio/gpio-mxs.c
similarity index 99%
rename from arch/arm/mach-mxs/gpio.c
rename to drivers/gpio/gpio-mxs.c
index 2c950fe..bac7b6b 100644
--- a/arch/arm/mach-mxs/gpio.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -27,10 +27,9 @@
#include <linux/gpio.h>
#include <mach/mx23.h>
#include <mach/mx28.h>
+#include <mach/gpio-mxs.h>
#include <asm-generic/bug.h>
-#include "gpio.h"
-
static struct mxs_gpio_port *mxs_gpio_ports;
static int gpio_table_size;
> 1 files changed, 331 insertions(+), 0 deletions(-)
> create mode 100644 drivers/gpio/gpio-mxs.c
>
> diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
> new file mode 100644
> index 0000000..2c950fe
> --- /dev/null
> +++ b/drivers/gpio/gpio-mxs.c
> @@ -0,0 +1,331 @@
> +/*
> + * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de>
> + * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
> + *
> + * Based on code from Freescale,
> + * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version 2
> + * of the License, or (at your option) any later version.
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301, USA.
> + */
> +
> +#include <linux/init.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/irq.h>
> +#include <linux/gpio.h>
> +#include <mach/mx23.h>
> +#include <mach/mx28.h>
> +#include <asm-generic/bug.h>
> +
> +#include "gpio.h"
> +
> +static struct mxs_gpio_port *mxs_gpio_ports;
> +static int gpio_table_size;
> +
> +#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10)
> +#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10)
> +#define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10)
> +#define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10)
> +#define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10)
> +#define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10)
> +#define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10)
> +#define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10)
> +
> +#define GPIO_INT_FALL_EDGE 0x0
> +#define GPIO_INT_LOW_LEV 0x1
> +#define GPIO_INT_RISE_EDGE 0x2
> +#define GPIO_INT_HIGH_LEV 0x3
> +#define GPIO_INT_LEV_MASK (1 << 0)
> +#define GPIO_INT_POL_MASK (1 << 1)
> +
> +/* Note: This driver assumes 32 GPIOs are handled in one register */
> +
> +static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index)
> +{
> + __mxs_clrl(1 << index, port->base + PINCTRL_IRQSTAT(port->id));
> +}
> +
> +static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index,
> + int enable)
> +{
> + if (enable) {
> + __mxs_setl(1 << index, port->base + PINCTRL_IRQEN(port->id));
> + __mxs_setl(1 << index, port->base + PINCTRL_PIN2IRQ(port->id));
> + } else {
> + __mxs_clrl(1 << index, port->base + PINCTRL_IRQEN(port->id));
> + }
> +}
> +
> +static void mxs_gpio_ack_irq(struct irq_data *d)
> +{
> + u32 gpio = irq_to_gpio(d->irq);
> + clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f);
> +}
> +
> +static void mxs_gpio_mask_irq(struct irq_data *d)
> +{
> + u32 gpio = irq_to_gpio(d->irq);
> + set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0);
> +}
> +
> +static void mxs_gpio_unmask_irq(struct irq_data *d)
> +{
> + u32 gpio = irq_to_gpio(d->irq);
> + set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1);
> +}
> +
> +static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset);
> +
> +static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
> +{
> + u32 gpio = irq_to_gpio(d->irq);
> + u32 pin_mask = 1 << (gpio & 31);
> + struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
> + void __iomem *pin_addr;
> + int edge;
> +
> + switch (type) {
> + case IRQ_TYPE_EDGE_RISING:
> + edge = GPIO_INT_RISE_EDGE;
> + break;
> + case IRQ_TYPE_EDGE_FALLING:
> + edge = GPIO_INT_FALL_EDGE;
> + break;
> + case IRQ_TYPE_LEVEL_LOW:
> + edge = GPIO_INT_LOW_LEV;
> + break;
> + case IRQ_TYPE_LEVEL_HIGH:
> + edge = GPIO_INT_HIGH_LEV;
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + /* set level or edge */
> + pin_addr = port->base + PINCTRL_IRQLEV(port->id);
> + if (edge & GPIO_INT_LEV_MASK)
> + __mxs_setl(pin_mask, pin_addr);
> + else
> + __mxs_clrl(pin_mask, pin_addr);
> +
> + /* set polarity */
> + pin_addr = port->base + PINCTRL_IRQPOL(port->id);
> + if (edge & GPIO_INT_POL_MASK)
> + __mxs_setl(pin_mask, pin_addr);
> + else
> + __mxs_clrl(pin_mask, pin_addr);
> +
> + clear_gpio_irqstatus(port, gpio & 0x1f);
> +
> + return 0;
> +}
> +
> +/* MXS has one interrupt *per* gpio port */
> +static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
> +{
> + u32 irq_stat;
> + struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq);
> + u32 gpio_irq_no_base = port->virtual_irq_start;
> +
> + desc->irq_data.chip->irq_ack(&desc->irq_data);
> +
> + irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
> + __raw_readl(port->base + PINCTRL_IRQEN(port->id));
> +
> + while (irq_stat != 0) {
> + int irqoffset = fls(irq_stat) - 1;
> + generic_handle_irq(gpio_irq_no_base + irqoffset);
> + irq_stat &= ~(1 << irqoffset);
> + }
> +}
> +
> +/*
> + * Set interrupt number "irq" in the GPIO as a wake-up source.
> + * While system is running, all registered GPIO interrupts need to have
> + * wake-up enabled. When system is suspended, only selected GPIO interrupts
> + * need to have wake-up enabled.
> + * @param irq interrupt source number
> + * @param enable enable as wake-up if equal to non-zero
> + * @return This function returns 0 on success.
> + */
> +static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
> +{
> + u32 gpio = irq_to_gpio(d->irq);
> + u32 gpio_idx = gpio & 0x1f;
> + struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
> +
> + if (enable) {
> + if (port->irq_high && (gpio_idx >= 16))
> + enable_irq_wake(port->irq_high);
> + else
> + enable_irq_wake(port->irq);
> + } else {
> + if (port->irq_high && (gpio_idx >= 16))
> + disable_irq_wake(port->irq_high);
> + else
> + disable_irq_wake(port->irq);
> + }
> +
> + return 0;
> +}
> +
> +static struct irq_chip gpio_irq_chip = {
> + .name = "mxs gpio",
> + .irq_ack = mxs_gpio_ack_irq,
> + .irq_mask = mxs_gpio_mask_irq,
> + .irq_unmask = mxs_gpio_unmask_irq,
> + .irq_set_type = mxs_gpio_set_irq_type,
> + .irq_set_wake = mxs_gpio_set_wake_irq,
> +};
> +
> +static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset,
> + int dir)
> +{
> + struct mxs_gpio_port *port =
> + container_of(chip, struct mxs_gpio_port, chip);
> + void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id);
> +
> + if (dir)
> + __mxs_setl(1 << offset, pin_addr);
> + else
> + __mxs_clrl(1 << offset, pin_addr);
> +}
> +
> +static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset)
> +{
> + struct mxs_gpio_port *port =
> + container_of(chip, struct mxs_gpio_port, chip);
> +
> + return (__raw_readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1;
> +}
> +
> +static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
> +{
> + struct mxs_gpio_port *port =
> + container_of(chip, struct mxs_gpio_port, chip);
> + void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id);
> +
> + if (value)
> + __mxs_setl(1 << offset, pin_addr);
> + else
> + __mxs_clrl(1 << offset, pin_addr);
> +}
> +
> +static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
> +{
> + struct mxs_gpio_port *port =
> + container_of(chip, struct mxs_gpio_port, chip);
> +
> + return port->virtual_irq_start + offset;
> +}
> +
> +static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
> +{
> + mxs_set_gpio_direction(chip, offset, 0);
> + return 0;
> +}
> +
> +static int mxs_gpio_direction_output(struct gpio_chip *chip,
> + unsigned offset, int value)
> +{
> + mxs_gpio_set(chip, offset, value);
> + mxs_set_gpio_direction(chip, offset, 1);
> + return 0;
> +}
> +
> +int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt)
> +{
> + int i, j;
> +
> + /* save for local usage */
> + mxs_gpio_ports = port;
> + gpio_table_size = cnt;
> +
> + pr_info("MXS GPIO hardware\n");
> +
> + for (i = 0; i < cnt; i++) {
> + /* disable the interrupt and clear the status */
> + __raw_writel(0, port[i].base + PINCTRL_PIN2IRQ(i));
> + __raw_writel(0, port[i].base + PINCTRL_IRQEN(i));
> +
> + /* clear address has to be used to clear IRQSTAT bits */
> + __mxs_clrl(~0U, port[i].base + PINCTRL_IRQSTAT(i));
> +
> + for (j = port[i].virtual_irq_start;
> + j < port[i].virtual_irq_start + 32; j++) {
> + irq_set_chip_and_handler(j, &gpio_irq_chip,
> + handle_level_irq);
> + set_irq_flags(j, IRQF_VALID);
> + }
> +
> + /* setup one handler for each entry */
> + irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler);
> + irq_set_handler_data(port[i].irq, &port[i]);
> +
> + /* register gpio chip */
> + port[i].chip.direction_input = mxs_gpio_direction_input;
> + port[i].chip.direction_output = mxs_gpio_direction_output;
> + port[i].chip.get = mxs_gpio_get;
> + port[i].chip.set = mxs_gpio_set;
> + port[i].chip.to_irq = mxs_gpio_to_irq;
> + port[i].chip.base = i * 32;
> + port[i].chip.ngpio = 32;
> +
> + /* its a serious configuration bug when it fails */
> + BUG_ON(gpiochip_add(&port[i].chip) < 0);
> + }
> +
> + return 0;
> +}
> +
> +#define MX23_GPIO_BASE MX23_IO_ADDRESS(MX23_PINCTRL_BASE_ADDR)
> +#define MX28_GPIO_BASE MX28_IO_ADDRESS(MX28_PINCTRL_BASE_ADDR)
> +
> +#define DEFINE_MXS_GPIO_PORT(_base, _irq, _id) \
> + { \
> + .chip.label = "gpio-" #_id, \
> + .id = _id, \
> + .irq = _irq, \
> + .base = _base, \
> + .virtual_irq_start = MXS_GPIO_IRQ_START + (_id) * 32, \
> + }
> +
> +#ifdef CONFIG_SOC_IMX23
> +static struct mxs_gpio_port mx23_gpio_ports[] = {
> + DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO0, 0),
> + DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO1, 1),
> + DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO2, 2),
> +};
> +
> +int __init mx23_register_gpios(void)
> +{
> + return mxs_gpio_init(mx23_gpio_ports, ARRAY_SIZE(mx23_gpio_ports));
> +}
> +#endif
> +
> +#ifdef CONFIG_SOC_IMX28
> +static struct mxs_gpio_port mx28_gpio_ports[] = {
> + DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO0, 0),
> + DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO1, 1),
> + DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO2, 2),
> + DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO3, 3),
> + DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO4, 4),
> +};
> +
> +int __init mx28_register_gpios(void)
> +{
> + return mxs_gpio_init(mx28_gpio_ports, ARRAY_SIZE(mx28_gpio_ports));
> +}
> +#endif
> --
> 1.7.4.1
>
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 1/3] gpio: gpio-mxs: copy mach-mxs/gpio.c into drivers/gpio
2011-06-04 22:29 ` Grant Likely
@ 2011-06-05 16:23 ` Shawn Guo
2011-06-06 8:10 ` Grant Likely
0 siblings, 1 reply; 8+ messages in thread
From: Shawn Guo @ 2011-06-05 16:23 UTC (permalink / raw)
To: Grant Likely
Cc: Shawn Guo, linux-kernel, arnd, kernel, linux-arm-kernel, patches
On Sat, Jun 04, 2011 at 04:29:46PM -0600, Grant Likely wrote:
> On Sat, Jun 04, 2011 at 06:55:38PM +0800, Shawn Guo wrote:
> > As the first patch of the series that moves mach-mxc gpio driver into
> > drivers/gpio, it copies arch/arm/mach-mxs/gpio.c into
> > drivers/gpio/gpio-mxs.c. The later patches will make necessary
> > changes to the driver, migrate the existing users to it, and lastly
> > deletes mach-mxs gpio driver.
> >
> > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > ---
> > drivers/gpio/gpio-mxs.c | 331 +++++++++++++++++++++++++++++++++++++++++++++++
>
> [sigh] I fear we are having a communication breakdown. Since your
> /moving/ a file, you need to make it easy for readers to understand
> what has changed and why. That means using 1 patch to move the file
> with only the changes absolutely necessary to ensure bisectability,
> and then followup patches for the clean up.
>
> Adding a new copy in one patch, and then removing the old copy in the
> other patch does not make it easy for a reader to understand what
> changed. Below is what you're first patch should look like (using the
> -M flag to show the actual changes which are only #include differences).
>
Oops, I misunderstood your point. But one thing I have been trying
hard is to keep changes for driver and subarch in separate patches,
which is something I was asked to do when I started working with
community. As you will anyway pick up the patch set as a whole,
this is not a problem then. I just sent the updates of gpio-mxs
and gpio-mxc with you approach. As a side effect, you will see
patch #2 of gpio-mxc becomes a very big patch in term of number of
files it changes.
> I've build tested this patch and have it sitting in the gpio/next
> branch of git://git.secretlab.ca/git/linux-2.6 at the moment if you
> want to build the rest of your series on top of it.
>
Thanks for the patch demonstrating. I have one minor comment below.
> g.
>
> ---
>
> commit e084f5b06ca7f3d94d9d042d288a3311398e5c49
> Author: Grant Likely <grant.likely@secretlab.ca>
> Date: Sat Jun 4 16:18:59 2011 -0600
>
> gpio/mxs: Move Freescale mxs gpio driver to drivers/gpio
>
> GPIO drivers are getting moved to drivers/gpio for cleanup and
> consolidation. This patch moves the mxs driver. Follow up patches
> will clean it up and make it a fine upstanding example of a gpio
> driver.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
>
> arch/arm/mach-mxs/Makefile | 2 +-
> .../mach-mxs/{gpio.h => include/mach/gpio-mxs.h} | 0
> arch/arm/mach-mxs/mach-mx28evk.c | 2 +-
> drivers/gpio/Kconfig | 4 ++++
> drivers/gpio/Makefile | 1 +
> .../arm/mach-mxs/gpio.c => drivers/gpio/gpio-mxs.c | 3 +--
> 6 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
> index 58e8923..6c38262 100644
> --- a/arch/arm/mach-mxs/Makefile
> +++ b/arch/arm/mach-mxs/Makefile
> @@ -1,5 +1,5 @@
> # Common support
> -obj-y := clock.o devices.o gpio.o icoll.o iomux.o system.o timer.o
> +obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o
>
> obj-$(CONFIG_MXS_OCOTP) += ocotp.o
> obj-$(CONFIG_PM) += pm.o
> diff --git a/arch/arm/mach-mxs/gpio.h b/arch/arm/mach-mxs/include/mach/gpio-mxs.h
> similarity index 100%
> rename from arch/arm/mach-mxs/gpio.h
> rename to arch/arm/mach-mxs/include/mach/gpio-mxs.h
> diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
> index eacdc6b..347cf35 100644
> --- a/arch/arm/mach-mxs/mach-mx28evk.c
> +++ b/arch/arm/mach-mxs/mach-mx28evk.c
> @@ -24,9 +24,9 @@
>
> #include <mach/common.h>
> #include <mach/iomux-mx28.h>
> +#include <mach/gpio-mxs.h>
>
This is the problem of existing code. The gpio.h (in turn gpio-mxs.h)
does not need to be included here. So we can simply drop it in this
patch. I have incorporated it when sending the patch within my series.
> #include "devices-mx28.h"
> -#include "gpio.h"
>
> #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
> #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
> diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> index 21271a5..afe44aa 100644
> --- a/drivers/gpio/Kconfig
> +++ b/drivers/gpio/Kconfig
> @@ -94,6 +94,10 @@ config GPIO_EXYNOS4
> def_bool y
> depends on CPU_EXYNOS4210
>
> +config GPIO_MXS
> + def_bool y
> + depends on ARCH_MXS
> +
> config GPIO_PLAT_SAMSUNG
> def_bool y
> depends on SAMSUNG_GPIOLIB_4BIT
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index e6e5032..8733d02 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -10,6 +10,7 @@ obj-$(CONFIG_GPIO_BASIC_MMIO_CORE) += basic_mmio_gpio.o
> obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o
> obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
> obj-$(CONFIG_GPIO_EXYNOS4) += gpio-exynos4.o
> +obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o
> obj-$(CONFIG_GPIO_PLAT_SAMSUNG) += gpio-plat-samsung.o
> obj-$(CONFIG_GPIO_S5PC100) += gpio-s5pc100.o
> obj-$(CONFIG_GPIO_S5PV210) += gpio-s5pv210.o
> diff --git a/arch/arm/mach-mxs/gpio.c b/drivers/gpio/gpio-mxs.c
> similarity index 99%
> rename from arch/arm/mach-mxs/gpio.c
> rename to drivers/gpio/gpio-mxs.c
> index 2c950fe..bac7b6b 100644
> --- a/arch/arm/mach-mxs/gpio.c
> +++ b/drivers/gpio/gpio-mxs.c
> @@ -27,10 +27,9 @@
> #include <linux/gpio.h>
> #include <mach/mx23.h>
> #include <mach/mx28.h>
> +#include <mach/gpio-mxs.h>
> #include <asm-generic/bug.h>
>
> -#include "gpio.h"
> -
> static struct mxs_gpio_port *mxs_gpio_ports;
> static int gpio_table_size;
>
--
Regards,
Shawn
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v3 1/3] gpio: gpio-mxs: copy mach-mxs/gpio.c into drivers/gpio
2011-06-05 16:23 ` Shawn Guo
@ 2011-06-06 8:10 ` Grant Likely
0 siblings, 0 replies; 8+ messages in thread
From: Grant Likely @ 2011-06-06 8:10 UTC (permalink / raw)
To: Shawn Guo
Cc: Shawn Guo, linux-kernel, arnd, kernel, linux-arm-kernel, patches
On Mon, Jun 06, 2011 at 12:23:14AM +0800, Shawn Guo wrote:
> On Sat, Jun 04, 2011 at 04:29:46PM -0600, Grant Likely wrote:
> > On Sat, Jun 04, 2011 at 06:55:38PM +0800, Shawn Guo wrote:
> > > As the first patch of the series that moves mach-mxc gpio driver into
> > > drivers/gpio, it copies arch/arm/mach-mxs/gpio.c into
> > > drivers/gpio/gpio-mxs.c. The later patches will make necessary
> > > changes to the driver, migrate the existing users to it, and lastly
> > > deletes mach-mxs gpio driver.
> > >
> > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> > > ---
> > > drivers/gpio/gpio-mxs.c | 331 +++++++++++++++++++++++++++++++++++++++++++++++
> >
> > [sigh] I fear we are having a communication breakdown. Since your
> > /moving/ a file, you need to make it easy for readers to understand
> > what has changed and why. That means using 1 patch to move the file
> > with only the changes absolutely necessary to ensure bisectability,
> > and then followup patches for the clean up.
> >
> > Adding a new copy in one patch, and then removing the old copy in the
> > other patch does not make it easy for a reader to understand what
> > changed. Below is what you're first patch should look like (using the
> > -M flag to show the actual changes which are only #include differences).
> >
> Oops, I misunderstood your point. But one thing I have been trying
> hard is to keep changes for driver and subarch in separate patches,
> which is something I was asked to do when I started working with
> community.
Heh, and sometimes those of us actually maintaining stuff just plain
change our mind when we see what something actually looks like in
practise. :-)
In this case, the changes were intertwined enough that there wasn't
much benefit in keeping the arch and drivers stuff in separate
patches.
> As you will anyway pick up the patch set as a whole,
> this is not a problem then. I just sent the updates of gpio-mxs
> and gpio-mxc with you approach. As a side effect, you will see
> patch #2 of gpio-mxc becomes a very big patch in term of number of
> files it changes.
Thanks. It's actually not that big. I've seen (and created) much
worse.
>
> > I've build tested this patch and have it sitting in the gpio/next
> > branch of git://git.secretlab.ca/git/linux-2.6 at the moment if you
> > want to build the rest of your series on top of it.
> >
> Thanks for the patch demonstrating. I have one minor comment below.
>
> > g.
> >
> > ---
> >
> > commit e084f5b06ca7f3d94d9d042d288a3311398e5c49
> > Author: Grant Likely <grant.likely@secretlab.ca>
> > Date: Sat Jun 4 16:18:59 2011 -0600
> >
> > gpio/mxs: Move Freescale mxs gpio driver to drivers/gpio
> >
> > GPIO drivers are getting moved to drivers/gpio for cleanup and
> > consolidation. This patch moves the mxs driver. Follow up patches
> > will clean it up and make it a fine upstanding example of a gpio
> > driver.
> >
> > Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> >
> > arch/arm/mach-mxs/Makefile | 2 +-
> > .../mach-mxs/{gpio.h => include/mach/gpio-mxs.h} | 0
> > arch/arm/mach-mxs/mach-mx28evk.c | 2 +-
> > drivers/gpio/Kconfig | 4 ++++
> > drivers/gpio/Makefile | 1 +
> > .../arm/mach-mxs/gpio.c => drivers/gpio/gpio-mxs.c | 3 +--
> > 6 files changed, 8 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
> > index 58e8923..6c38262 100644
> > --- a/arch/arm/mach-mxs/Makefile
> > +++ b/arch/arm/mach-mxs/Makefile
> > @@ -1,5 +1,5 @@
> > # Common support
> > -obj-y := clock.o devices.o gpio.o icoll.o iomux.o system.o timer.o
> > +obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o
> >
> > obj-$(CONFIG_MXS_OCOTP) += ocotp.o
> > obj-$(CONFIG_PM) += pm.o
> > diff --git a/arch/arm/mach-mxs/gpio.h b/arch/arm/mach-mxs/include/mach/gpio-mxs.h
> > similarity index 100%
> > rename from arch/arm/mach-mxs/gpio.h
> > rename to arch/arm/mach-mxs/include/mach/gpio-mxs.h
> > diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
> > index eacdc6b..347cf35 100644
> > --- a/arch/arm/mach-mxs/mach-mx28evk.c
> > +++ b/arch/arm/mach-mxs/mach-mx28evk.c
> > @@ -24,9 +24,9 @@
> >
> > #include <mach/common.h>
> > #include <mach/iomux-mx28.h>
> > +#include <mach/gpio-mxs.h>
> >
> This is the problem of existing code. The gpio.h (in turn gpio-mxs.h)
> does not need to be included here. So we can simply drop it in this
> patch. I have incorporated it when sending the patch within my series.
Oops, I missed you comment here and replied to one of your patches
with a nonsensical comment about missing a header. Sorry. Everything
should be in order in my tree now.
>
> > #include "devices-mx28.h"
> > -#include "gpio.h"
> >
> > #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
> > #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
> > diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
> > index 21271a5..afe44aa 100644
> > --- a/drivers/gpio/Kconfig
> > +++ b/drivers/gpio/Kconfig
> > @@ -94,6 +94,10 @@ config GPIO_EXYNOS4
> > def_bool y
> > depends on CPU_EXYNOS4210
> >
> > +config GPIO_MXS
> > + def_bool y
> > + depends on ARCH_MXS
> > +
> > config GPIO_PLAT_SAMSUNG
> > def_bool y
> > depends on SAMSUNG_GPIOLIB_4BIT
> > diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> > index e6e5032..8733d02 100644
> > --- a/drivers/gpio/Makefile
> > +++ b/drivers/gpio/Makefile
> > @@ -10,6 +10,7 @@ obj-$(CONFIG_GPIO_BASIC_MMIO_CORE) += basic_mmio_gpio.o
> > obj-$(CONFIG_GPIO_BASIC_MMIO) += basic_mmio_gpio.o
> > obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
> > obj-$(CONFIG_GPIO_EXYNOS4) += gpio-exynos4.o
> > +obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o
> > obj-$(CONFIG_GPIO_PLAT_SAMSUNG) += gpio-plat-samsung.o
> > obj-$(CONFIG_GPIO_S5PC100) += gpio-s5pc100.o
> > obj-$(CONFIG_GPIO_S5PV210) += gpio-s5pv210.o
> > diff --git a/arch/arm/mach-mxs/gpio.c b/drivers/gpio/gpio-mxs.c
> > similarity index 99%
> > rename from arch/arm/mach-mxs/gpio.c
> > rename to drivers/gpio/gpio-mxs.c
> > index 2c950fe..bac7b6b 100644
> > --- a/arch/arm/mach-mxs/gpio.c
> > +++ b/drivers/gpio/gpio-mxs.c
> > @@ -27,10 +27,9 @@
> > #include <linux/gpio.h>
> > #include <mach/mx23.h>
> > #include <mach/mx28.h>
> > +#include <mach/gpio-mxs.h>
> > #include <asm-generic/bug.h>
> >
> > -#include "gpio.h"
> > -
> > static struct mxs_gpio_port *mxs_gpio_ports;
> > static int gpio_table_size;
> >
>
> --
> Regards,
> Shawn
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 2/3] gpio: gpio-mxs: make it work for Freescale MXS architecture
2011-06-04 10:55 [PATCH v3 0/3] Move Freescale MXS gpio driver into drivers/gpio Shawn Guo
2011-06-04 10:55 ` [PATCH v3 1/3] gpio: gpio-mxs: copy mach-mxs/gpio.c " Shawn Guo
@ 2011-06-04 10:55 ` Shawn Guo
2011-06-04 10:55 ` [PATCH v3 3/3] ARM: mxs: use gpio-mxs driver by adding platform device Shawn Guo
2 siblings, 0 replies; 8+ messages in thread
From: Shawn Guo @ 2011-06-04 10:55 UTC (permalink / raw)
To: linux-kernel
Cc: grant.likely, arnd, kernel, linux-arm-kernel, patches, Shawn Guo
The patch makes necessary changes as below to make gpio-mxs work
for i.MX23 and i.MX28.
* Use readl/writel to replace mach-specific accessors
__raw_readl/__raw_writel
* Migrate to platform driver by adding .probe function
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
drivers/gpio/Makefile | 1 +
drivers/gpio/gpio-mxs.c | 227 +++++++++++++++++++++++++++-------------------
2 files changed, 134 insertions(+), 94 deletions(-)
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b605f8e..bbab341 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -47,4 +47,5 @@ obj-$(CONFIG_GPIO_SX150X) += sx150x.o
obj-$(CONFIG_GPIO_VX855) += vx855_gpio.o
obj-$(CONFIG_GPIO_ML_IOH) += ml_ioh_gpio.o
obj-$(CONFIG_AB8500_GPIO) += ab8500-gpio.o
+obj-$(CONFIG_ARCH_MXS) += gpio-mxs.o
obj-$(CONFIG_GPIO_TPS65910) += tps65910-gpio.o
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index 2c950fe..ab440ab 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -25,14 +25,21 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/gpio.h>
-#include <mach/mx23.h>
-#include <mach/mx28.h>
-#include <asm-generic/bug.h>
-
-#include "gpio.h"
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <mach/mxs.h>
+
+struct mxs_gpio_port {
+ void __iomem *base;
+ int id;
+ int irq;
+ int irq_high;
+ int virtual_irq_start;
+ struct gpio_chip chip;
+};
-static struct mxs_gpio_port *mxs_gpio_ports;
-static int gpio_table_size;
+#define MXS_SET 0x4
+#define MXS_CLR 0x8
#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10)
#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10)
@@ -54,36 +61,42 @@ static int gpio_table_size;
static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index)
{
- __mxs_clrl(1 << index, port->base + PINCTRL_IRQSTAT(port->id));
+ writel(1 << index, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR);
}
static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index,
int enable)
{
if (enable) {
- __mxs_setl(1 << index, port->base + PINCTRL_IRQEN(port->id));
- __mxs_setl(1 << index, port->base + PINCTRL_PIN2IRQ(port->id));
+ writel(1 << index,
+ port->base + PINCTRL_IRQEN(port->id) + MXS_SET);
+ writel(1 << index,
+ port->base + PINCTRL_PIN2IRQ(port->id) + MXS_SET);
} else {
- __mxs_clrl(1 << index, port->base + PINCTRL_IRQEN(port->id));
+ writel(1 << index,
+ port->base + PINCTRL_IRQEN(port->id) + MXS_CLR);
}
}
static void mxs_gpio_ack_irq(struct irq_data *d)
{
+ struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d);
u32 gpio = irq_to_gpio(d->irq);
- clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f);
+ clear_gpio_irqstatus(port, gpio & 0x1f);
}
static void mxs_gpio_mask_irq(struct irq_data *d)
{
+ struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d);
u32 gpio = irq_to_gpio(d->irq);
- set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0);
+ set_gpio_irqenable(port, gpio & 0x1f, 0);
}
static void mxs_gpio_unmask_irq(struct irq_data *d)
{
+ struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d);
u32 gpio = irq_to_gpio(d->irq);
- set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1);
+ set_gpio_irqenable(port, gpio & 0x1f, 1);
}
static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset);
@@ -92,7 +105,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
{
u32 gpio = irq_to_gpio(d->irq);
u32 pin_mask = 1 << (gpio & 31);
- struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
+ struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d);
void __iomem *pin_addr;
int edge;
@@ -116,16 +129,16 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
/* set level or edge */
pin_addr = port->base + PINCTRL_IRQLEV(port->id);
if (edge & GPIO_INT_LEV_MASK)
- __mxs_setl(pin_mask, pin_addr);
+ writel(pin_mask, pin_addr + MXS_SET);
else
- __mxs_clrl(pin_mask, pin_addr);
+ writel(pin_mask, pin_addr + MXS_CLR);
/* set polarity */
pin_addr = port->base + PINCTRL_IRQPOL(port->id);
if (edge & GPIO_INT_POL_MASK)
- __mxs_setl(pin_mask, pin_addr);
+ writel(pin_mask, pin_addr + MXS_SET);
else
- __mxs_clrl(pin_mask, pin_addr);
+ writel(pin_mask, pin_addr + MXS_CLR);
clear_gpio_irqstatus(port, gpio & 0x1f);
@@ -136,13 +149,13 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
{
u32 irq_stat;
- struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq);
+ struct mxs_gpio_port *port = irq_get_handler_data(irq);
u32 gpio_irq_no_base = port->virtual_irq_start;
desc->irq_data.chip->irq_ack(&desc->irq_data);
- irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
- __raw_readl(port->base + PINCTRL_IRQEN(port->id));
+ irq_stat = readl(port->base + PINCTRL_IRQSTAT(port->id)) &
+ readl(port->base + PINCTRL_IRQEN(port->id));
while (irq_stat != 0) {
int irqoffset = fls(irq_stat) - 1;
@@ -164,7 +177,7 @@ static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
{
u32 gpio = irq_to_gpio(d->irq);
u32 gpio_idx = gpio & 0x1f;
- struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
+ struct mxs_gpio_port *port = irq_data_get_irq_chip_data(d);
if (enable) {
if (port->irq_high && (gpio_idx >= 16))
@@ -198,9 +211,9 @@ static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset,
void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id);
if (dir)
- __mxs_setl(1 << offset, pin_addr);
+ writel(1 << offset, pin_addr + MXS_SET);
else
- __mxs_clrl(1 << offset, pin_addr);
+ writel(1 << offset, pin_addr + MXS_CLR);
}
static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset)
@@ -208,7 +221,7 @@ static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset)
struct mxs_gpio_port *port =
container_of(chip, struct mxs_gpio_port, chip);
- return (__raw_readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1;
+ return (readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1;
}
static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -218,9 +231,9 @@ static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id);
if (value)
- __mxs_setl(1 << offset, pin_addr);
+ writel(1 << offset, pin_addr + MXS_SET);
else
- __mxs_clrl(1 << offset, pin_addr);
+ writel(1 << offset, pin_addr + MXS_CLR);
}
static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
@@ -245,87 +258,113 @@ static int mxs_gpio_direction_output(struct gpio_chip *chip,
return 0;
}
-int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt)
+static int __devinit mxs_gpio_probe(struct platform_device *pdev)
{
- int i, j;
+ static void __iomem *base;
+ struct mxs_gpio_port *port;
+ struct resource *iores = NULL;
+ int err, i;
+
+ port = kzalloc(sizeof(struct mxs_gpio_port), GFP_KERNEL);
+ if (!port)
+ return -ENOMEM;
+
+ port->id = pdev->id;
+ port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32;
+
+ /*
+ * map memory region only once, as all the gpio ports
+ * share the same one
+ */
+ if (!base) {
+ iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!iores) {
+ err = -ENODEV;
+ goto out_kfree;
+ }
- /* save for local usage */
- mxs_gpio_ports = port;
- gpio_table_size = cnt;
+ if (!request_mem_region(iores->start, resource_size(iores),
+ pdev->name)) {
+ err = -EBUSY;
+ goto out_kfree;
+ }
- pr_info("MXS GPIO hardware\n");
+ base = ioremap(iores->start, resource_size(iores));
+ if (!base) {
+ err = -ENOMEM;
+ goto out_release_mem;
+ }
+ }
+ port->base = base;
- for (i = 0; i < cnt; i++) {
- /* disable the interrupt and clear the status */
- __raw_writel(0, port[i].base + PINCTRL_PIN2IRQ(i));
- __raw_writel(0, port[i].base + PINCTRL_IRQEN(i));
+ port->irq = platform_get_irq(pdev, 0);
+ if (port->irq < 0) {
+ err = -EINVAL;
+ goto out_iounmap;
+ }
- /* clear address has to be used to clear IRQSTAT bits */
- __mxs_clrl(~0U, port[i].base + PINCTRL_IRQSTAT(i));
+ /* disable the interrupt and clear the status */
+ writel(0, port->base + PINCTRL_PIN2IRQ(port->id));
+ writel(0, port->base + PINCTRL_IRQEN(port->id));
- for (j = port[i].virtual_irq_start;
- j < port[i].virtual_irq_start + 32; j++) {
- irq_set_chip_and_handler(j, &gpio_irq_chip,
- handle_level_irq);
- set_irq_flags(j, IRQF_VALID);
- }
+ /* clear address has to be used to clear IRQSTAT bits */
+ writel(~0U, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR);
- /* setup one handler for each entry */
- irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler);
- irq_set_handler_data(port[i].irq, &port[i]);
-
- /* register gpio chip */
- port[i].chip.direction_input = mxs_gpio_direction_input;
- port[i].chip.direction_output = mxs_gpio_direction_output;
- port[i].chip.get = mxs_gpio_get;
- port[i].chip.set = mxs_gpio_set;
- port[i].chip.to_irq = mxs_gpio_to_irq;
- port[i].chip.base = i * 32;
- port[i].chip.ngpio = 32;
-
- /* its a serious configuration bug when it fails */
- BUG_ON(gpiochip_add(&port[i].chip) < 0);
+ for (i = port->virtual_irq_start;
+ i < port->virtual_irq_start + 32; i++) {
+ irq_set_chip_and_handler(i, &gpio_irq_chip,
+ handle_level_irq);
+ set_irq_flags(i, IRQF_VALID);
+ irq_set_chip_data(i, port);
}
- return 0;
-}
+ /* setup one handler for each entry */
+ irq_set_chained_handler(port->irq, mxs_gpio_irq_handler);
+ irq_set_handler_data(port->irq, port);
-#define MX23_GPIO_BASE MX23_IO_ADDRESS(MX23_PINCTRL_BASE_ADDR)
-#define MX28_GPIO_BASE MX28_IO_ADDRESS(MX28_PINCTRL_BASE_ADDR)
+ /* register gpio chip */
+ port->chip.direction_input = mxs_gpio_direction_input;
+ port->chip.direction_output = mxs_gpio_direction_output;
+ port->chip.get = mxs_gpio_get;
+ port->chip.set = mxs_gpio_set;
+ port->chip.to_irq = mxs_gpio_to_irq;
+ port->chip.base = port->id * 32;
+ port->chip.ngpio = 32;
-#define DEFINE_MXS_GPIO_PORT(_base, _irq, _id) \
- { \
- .chip.label = "gpio-" #_id, \
- .id = _id, \
- .irq = _irq, \
- .base = _base, \
- .virtual_irq_start = MXS_GPIO_IRQ_START + (_id) * 32, \
- }
+ err = gpiochip_add(&port->chip);
+ if (err)
+ goto out_iounmap;
-#ifdef CONFIG_SOC_IMX23
-static struct mxs_gpio_port mx23_gpio_ports[] = {
- DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO0, 0),
- DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO1, 1),
- DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO2, 2),
-};
+ return 0;
-int __init mx23_register_gpios(void)
-{
- return mxs_gpio_init(mx23_gpio_ports, ARRAY_SIZE(mx23_gpio_ports));
+out_iounmap:
+ if (iores)
+ iounmap(port->base);
+out_release_mem:
+ if (iores)
+ release_mem_region(iores->start, resource_size(iores));
+out_kfree:
+ kfree(port);
+ dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err);
+ return err;
}
-#endif
-
-#ifdef CONFIG_SOC_IMX28
-static struct mxs_gpio_port mx28_gpio_ports[] = {
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO0, 0),
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO1, 1),
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO2, 2),
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO3, 3),
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO4, 4),
+
+static struct platform_driver mxs_gpio_driver = {
+ .driver = {
+ .name = "gpio-mxs",
+ .owner = THIS_MODULE,
+ },
+ .probe = mxs_gpio_probe,
};
-int __init mx28_register_gpios(void)
+static int __init mxs_gpio_init(void)
{
- return mxs_gpio_init(mx28_gpio_ports, ARRAY_SIZE(mx28_gpio_ports));
+ return platform_driver_register(&mxs_gpio_driver);
}
-#endif
+postcore_initcall(mxs_gpio_init);
+
+MODULE_AUTHOR("Freescale Semiconductor, "
+ "Daniel Mack <danielncaiaq.de>, "
+ "Juergen Beisert <kernel@pengutronix.de>");
+MODULE_DESCRIPTION("Freescale MXS GPIO");
+MODULE_LICENSE("GPL");
--
1.7.4.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v3 3/3] ARM: mxs: use gpio-mxs driver by adding platform device
2011-06-04 10:55 [PATCH v3 0/3] Move Freescale MXS gpio driver into drivers/gpio Shawn Guo
2011-06-04 10:55 ` [PATCH v3 1/3] gpio: gpio-mxs: copy mach-mxs/gpio.c " Shawn Guo
2011-06-04 10:55 ` [PATCH v3 2/3] gpio: gpio-mxs: make it work for Freescale MXS architecture Shawn Guo
@ 2011-06-04 10:55 ` Shawn Guo
2011-06-04 22:34 ` Grant Likely
2 siblings, 1 reply; 8+ messages in thread
From: Shawn Guo @ 2011-06-04 10:55 UTC (permalink / raw)
To: linux-kernel
Cc: grant.likely, arnd, kernel, linux-arm-kernel, patches, Shawn Guo
It replaces mach-mxs/gpio with gpio-mxs driver by adding platform
device for drivers/gpio/gpio-mxs, and then remove the mach-mxs/gpio
driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/mach-mxs/Makefile | 2 +-
arch/arm/mach-mxs/devices.c | 11 +
arch/arm/mach-mxs/devices/Makefile | 1 +
arch/arm/mach-mxs/devices/platform-gpio-mxs.c | 53 ++++
arch/arm/mach-mxs/gpio.c | 331 -----------------------
arch/arm/mach-mxs/gpio.h | 34 ---
arch/arm/mach-mxs/include/mach/devices-common.h | 2 +
arch/arm/mach-mxs/mach-mx28evk.c | 1 -
arch/arm/mach-mxs/mm-mx23.c | 1 -
arch/arm/mach-mxs/mm-mx28.c | 1 -
10 files changed, 68 insertions(+), 369 deletions(-)
create mode 100644 arch/arm/mach-mxs/devices/platform-gpio-mxs.c
delete mode 100644 arch/arm/mach-mxs/gpio.c
delete mode 100644 arch/arm/mach-mxs/gpio.h
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index 58e8923..6c38262 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -1,5 +1,5 @@
# Common support
-obj-y := clock.o devices.o gpio.o icoll.o iomux.o system.o timer.o
+obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o
obj-$(CONFIG_MXS_OCOTP) += ocotp.o
obj-$(CONFIG_PM) += pm.o
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c
index cfdb6b2..fe3e847 100644
--- a/arch/arm/mach-mxs/devices.c
+++ b/arch/arm/mach-mxs/devices.c
@@ -88,3 +88,14 @@ int __init mxs_add_amba_device(const struct amba_device *dev)
return amba_device_register(adev, &iomem_resource);
}
+
+struct device mxs_apbh_bus = {
+ .init_name = "mxs_apbh",
+ .parent = &platform_bus,
+};
+
+static int __init mxs_device_init(void)
+{
+ return device_register(&mxs_apbh_bus);
+}
+core_initcall(mxs_device_init);
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile
index 324f282..351915c 100644
--- a/arch/arm/mach-mxs/devices/Makefile
+++ b/arch/arm/mach-mxs/devices/Makefile
@@ -6,4 +6,5 @@ obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o
+obj-y += platform-gpio-mxs.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o
diff --git a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
new file mode 100644
index 0000000..ed0885e
--- /dev/null
+++ b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it under
+ * the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation.
+ */
+#include <linux/compiler.h>
+#include <linux/err.h>
+#include <linux/init.h>
+
+#include <mach/mx23.h>
+#include <mach/mx28.h>
+#include <mach/devices-common.h>
+
+struct platform_device *__init mxs_add_gpio(
+ int id, resource_size_t iobase, int irq)
+{
+ struct resource res[] = {
+ {
+ .start = iobase,
+ .end = iobase + SZ_8K - 1,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .start = irq,
+ .end = irq,
+ .flags = IORESOURCE_IRQ,
+ },
+ };
+
+ return platform_device_register_resndata(&mxs_apbh_bus,
+ "gpio-mxs", id, res, ARRAY_SIZE(res), NULL, 0);
+}
+
+static int __init mxs_add_mxs_gpio(void)
+{
+ if (cpu_is_mx23()) {
+ mxs_add_gpio(0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0);
+ mxs_add_gpio(1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1);
+ mxs_add_gpio(2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2);
+ }
+
+ if (cpu_is_mx28()) {
+ mxs_add_gpio(0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0);
+ mxs_add_gpio(1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1);
+ mxs_add_gpio(2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2);
+ mxs_add_gpio(3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3);
+ mxs_add_gpio(4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4);
+ }
+
+ return 0;
+}
+postcore_initcall(mxs_add_mxs_gpio);
diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c
deleted file mode 100644
index 2c950fe..0000000
--- a/arch/arm/mach-mxs/gpio.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/*
- * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de>
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- *
- * Based on code from Freescale,
- * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/gpio.h>
-#include <mach/mx23.h>
-#include <mach/mx28.h>
-#include <asm-generic/bug.h>
-
-#include "gpio.h"
-
-static struct mxs_gpio_port *mxs_gpio_ports;
-static int gpio_table_size;
-
-#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10)
-#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10)
-#define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10)
-#define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10)
-#define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10)
-#define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10)
-#define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10)
-#define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10)
-
-#define GPIO_INT_FALL_EDGE 0x0
-#define GPIO_INT_LOW_LEV 0x1
-#define GPIO_INT_RISE_EDGE 0x2
-#define GPIO_INT_HIGH_LEV 0x3
-#define GPIO_INT_LEV_MASK (1 << 0)
-#define GPIO_INT_POL_MASK (1 << 1)
-
-/* Note: This driver assumes 32 GPIOs are handled in one register */
-
-static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index)
-{
- __mxs_clrl(1 << index, port->base + PINCTRL_IRQSTAT(port->id));
-}
-
-static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index,
- int enable)
-{
- if (enable) {
- __mxs_setl(1 << index, port->base + PINCTRL_IRQEN(port->id));
- __mxs_setl(1 << index, port->base + PINCTRL_PIN2IRQ(port->id));
- } else {
- __mxs_clrl(1 << index, port->base + PINCTRL_IRQEN(port->id));
- }
-}
-
-static void mxs_gpio_ack_irq(struct irq_data *d)
-{
- u32 gpio = irq_to_gpio(d->irq);
- clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f);
-}
-
-static void mxs_gpio_mask_irq(struct irq_data *d)
-{
- u32 gpio = irq_to_gpio(d->irq);
- set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0);
-}
-
-static void mxs_gpio_unmask_irq(struct irq_data *d)
-{
- u32 gpio = irq_to_gpio(d->irq);
- set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1);
-}
-
-static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset);
-
-static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
-{
- u32 gpio = irq_to_gpio(d->irq);
- u32 pin_mask = 1 << (gpio & 31);
- struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
- void __iomem *pin_addr;
- int edge;
-
- switch (type) {
- case IRQ_TYPE_EDGE_RISING:
- edge = GPIO_INT_RISE_EDGE;
- break;
- case IRQ_TYPE_EDGE_FALLING:
- edge = GPIO_INT_FALL_EDGE;
- break;
- case IRQ_TYPE_LEVEL_LOW:
- edge = GPIO_INT_LOW_LEV;
- break;
- case IRQ_TYPE_LEVEL_HIGH:
- edge = GPIO_INT_HIGH_LEV;
- break;
- default:
- return -EINVAL;
- }
-
- /* set level or edge */
- pin_addr = port->base + PINCTRL_IRQLEV(port->id);
- if (edge & GPIO_INT_LEV_MASK)
- __mxs_setl(pin_mask, pin_addr);
- else
- __mxs_clrl(pin_mask, pin_addr);
-
- /* set polarity */
- pin_addr = port->base + PINCTRL_IRQPOL(port->id);
- if (edge & GPIO_INT_POL_MASK)
- __mxs_setl(pin_mask, pin_addr);
- else
- __mxs_clrl(pin_mask, pin_addr);
-
- clear_gpio_irqstatus(port, gpio & 0x1f);
-
- return 0;
-}
-
-/* MXS has one interrupt *per* gpio port */
-static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
-{
- u32 irq_stat;
- struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq);
- u32 gpio_irq_no_base = port->virtual_irq_start;
-
- desc->irq_data.chip->irq_ack(&desc->irq_data);
-
- irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
- __raw_readl(port->base + PINCTRL_IRQEN(port->id));
-
- while (irq_stat != 0) {
- int irqoffset = fls(irq_stat) - 1;
- generic_handle_irq(gpio_irq_no_base + irqoffset);
- irq_stat &= ~(1 << irqoffset);
- }
-}
-
-/*
- * Set interrupt number "irq" in the GPIO as a wake-up source.
- * While system is running, all registered GPIO interrupts need to have
- * wake-up enabled. When system is suspended, only selected GPIO interrupts
- * need to have wake-up enabled.
- * @param irq interrupt source number
- * @param enable enable as wake-up if equal to non-zero
- * @return This function returns 0 on success.
- */
-static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
-{
- u32 gpio = irq_to_gpio(d->irq);
- u32 gpio_idx = gpio & 0x1f;
- struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
-
- if (enable) {
- if (port->irq_high && (gpio_idx >= 16))
- enable_irq_wake(port->irq_high);
- else
- enable_irq_wake(port->irq);
- } else {
- if (port->irq_high && (gpio_idx >= 16))
- disable_irq_wake(port->irq_high);
- else
- disable_irq_wake(port->irq);
- }
-
- return 0;
-}
-
-static struct irq_chip gpio_irq_chip = {
- .name = "mxs gpio",
- .irq_ack = mxs_gpio_ack_irq,
- .irq_mask = mxs_gpio_mask_irq,
- .irq_unmask = mxs_gpio_unmask_irq,
- .irq_set_type = mxs_gpio_set_irq_type,
- .irq_set_wake = mxs_gpio_set_wake_irq,
-};
-
-static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset,
- int dir)
-{
- struct mxs_gpio_port *port =
- container_of(chip, struct mxs_gpio_port, chip);
- void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id);
-
- if (dir)
- __mxs_setl(1 << offset, pin_addr);
- else
- __mxs_clrl(1 << offset, pin_addr);
-}
-
-static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset)
-{
- struct mxs_gpio_port *port =
- container_of(chip, struct mxs_gpio_port, chip);
-
- return (__raw_readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1;
-}
-
-static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
-{
- struct mxs_gpio_port *port =
- container_of(chip, struct mxs_gpio_port, chip);
- void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id);
-
- if (value)
- __mxs_setl(1 << offset, pin_addr);
- else
- __mxs_clrl(1 << offset, pin_addr);
-}
-
-static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
-{
- struct mxs_gpio_port *port =
- container_of(chip, struct mxs_gpio_port, chip);
-
- return port->virtual_irq_start + offset;
-}
-
-static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
-{
- mxs_set_gpio_direction(chip, offset, 0);
- return 0;
-}
-
-static int mxs_gpio_direction_output(struct gpio_chip *chip,
- unsigned offset, int value)
-{
- mxs_gpio_set(chip, offset, value);
- mxs_set_gpio_direction(chip, offset, 1);
- return 0;
-}
-
-int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt)
-{
- int i, j;
-
- /* save for local usage */
- mxs_gpio_ports = port;
- gpio_table_size = cnt;
-
- pr_info("MXS GPIO hardware\n");
-
- for (i = 0; i < cnt; i++) {
- /* disable the interrupt and clear the status */
- __raw_writel(0, port[i].base + PINCTRL_PIN2IRQ(i));
- __raw_writel(0, port[i].base + PINCTRL_IRQEN(i));
-
- /* clear address has to be used to clear IRQSTAT bits */
- __mxs_clrl(~0U, port[i].base + PINCTRL_IRQSTAT(i));
-
- for (j = port[i].virtual_irq_start;
- j < port[i].virtual_irq_start + 32; j++) {
- irq_set_chip_and_handler(j, &gpio_irq_chip,
- handle_level_irq);
- set_irq_flags(j, IRQF_VALID);
- }
-
- /* setup one handler for each entry */
- irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler);
- irq_set_handler_data(port[i].irq, &port[i]);
-
- /* register gpio chip */
- port[i].chip.direction_input = mxs_gpio_direction_input;
- port[i].chip.direction_output = mxs_gpio_direction_output;
- port[i].chip.get = mxs_gpio_get;
- port[i].chip.set = mxs_gpio_set;
- port[i].chip.to_irq = mxs_gpio_to_irq;
- port[i].chip.base = i * 32;
- port[i].chip.ngpio = 32;
-
- /* its a serious configuration bug when it fails */
- BUG_ON(gpiochip_add(&port[i].chip) < 0);
- }
-
- return 0;
-}
-
-#define MX23_GPIO_BASE MX23_IO_ADDRESS(MX23_PINCTRL_BASE_ADDR)
-#define MX28_GPIO_BASE MX28_IO_ADDRESS(MX28_PINCTRL_BASE_ADDR)
-
-#define DEFINE_MXS_GPIO_PORT(_base, _irq, _id) \
- { \
- .chip.label = "gpio-" #_id, \
- .id = _id, \
- .irq = _irq, \
- .base = _base, \
- .virtual_irq_start = MXS_GPIO_IRQ_START + (_id) * 32, \
- }
-
-#ifdef CONFIG_SOC_IMX23
-static struct mxs_gpio_port mx23_gpio_ports[] = {
- DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO0, 0),
- DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO1, 1),
- DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO2, 2),
-};
-
-int __init mx23_register_gpios(void)
-{
- return mxs_gpio_init(mx23_gpio_ports, ARRAY_SIZE(mx23_gpio_ports));
-}
-#endif
-
-#ifdef CONFIG_SOC_IMX28
-static struct mxs_gpio_port mx28_gpio_ports[] = {
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO0, 0),
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO1, 1),
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO2, 2),
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO3, 3),
- DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO4, 4),
-};
-
-int __init mx28_register_gpios(void)
-{
- return mxs_gpio_init(mx28_gpio_ports, ARRAY_SIZE(mx28_gpio_ports));
-}
-#endif
diff --git a/arch/arm/mach-mxs/gpio.h b/arch/arm/mach-mxs/gpio.h
deleted file mode 100644
index 005bb06..0000000
--- a/arch/arm/mach-mxs/gpio.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
- * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301, USA.
- */
-
-#ifndef __MXS_GPIO_H__
-#define __MXS_GPIO_H__
-
-struct mxs_gpio_port {
- void __iomem *base;
- int id;
- int irq;
- int irq_high;
- int virtual_irq_start;
- struct gpio_chip chip;
-};
-
-int mxs_gpio_init(struct mxs_gpio_port*, int);
-
-#endif /* __MXS_GPIO_H__ */
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index 7a37469..812d7a8 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -11,6 +11,8 @@
#include <linux/init.h>
#include <linux/amba/bus.h>
+extern struct device mxs_apbh_bus;
+
struct platform_device *mxs_add_platform_device_dmamask(
const char *name, int id,
const struct resource *res, unsigned int num_resources,
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index eacdc6b..56767a5 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -26,7 +26,6 @@
#include <mach/iomux-mx28.h>
#include "devices-mx28.h"
-#include "gpio.h"
#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
diff --git a/arch/arm/mach-mxs/mm-mx23.c b/arch/arm/mach-mxs/mm-mx23.c
index 5148cd6..1b2345a 100644
--- a/arch/arm/mach-mxs/mm-mx23.c
+++ b/arch/arm/mach-mxs/mm-mx23.c
@@ -41,5 +41,4 @@ void __init mx23_map_io(void)
void __init mx23_init_irq(void)
{
icoll_init_irq();
- mx23_register_gpios();
}
diff --git a/arch/arm/mach-mxs/mm-mx28.c b/arch/arm/mach-mxs/mm-mx28.c
index 7e4cea3..b6e18dd 100644
--- a/arch/arm/mach-mxs/mm-mx28.c
+++ b/arch/arm/mach-mxs/mm-mx28.c
@@ -41,5 +41,4 @@ void __init mx28_map_io(void)
void __init mx28_init_irq(void)
{
icoll_init_irq();
- mx28_register_gpios();
}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v3 3/3] ARM: mxs: use gpio-mxs driver by adding platform device
2011-06-04 10:55 ` [PATCH v3 3/3] ARM: mxs: use gpio-mxs driver by adding platform device Shawn Guo
@ 2011-06-04 22:34 ` Grant Likely
0 siblings, 0 replies; 8+ messages in thread
From: Grant Likely @ 2011-06-04 22:34 UTC (permalink / raw)
To: Shawn Guo; +Cc: linux-kernel, arnd, kernel, linux-arm-kernel, patches
On Sat, Jun 04, 2011 at 06:55:40PM +0800, Shawn Guo wrote:
> It replaces mach-mxs/gpio with gpio-mxs driver by adding platform
> device for drivers/gpio/gpio-mxs, and then remove the mach-mxs/gpio
> driver.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
After changing to the way I asked for the gpio driver to be moved in
patch 1/3, you'll need to integrate the platform device registrations in this
patch with patch #2 so that the series remains bisectable.
g.
> ---
> arch/arm/mach-mxs/Makefile | 2 +-
> arch/arm/mach-mxs/devices.c | 11 +
> arch/arm/mach-mxs/devices/Makefile | 1 +
> arch/arm/mach-mxs/devices/platform-gpio-mxs.c | 53 ++++
> arch/arm/mach-mxs/gpio.c | 331 -----------------------
> arch/arm/mach-mxs/gpio.h | 34 ---
> arch/arm/mach-mxs/include/mach/devices-common.h | 2 +
> arch/arm/mach-mxs/mach-mx28evk.c | 1 -
> arch/arm/mach-mxs/mm-mx23.c | 1 -
> arch/arm/mach-mxs/mm-mx28.c | 1 -
> 10 files changed, 68 insertions(+), 369 deletions(-)
> create mode 100644 arch/arm/mach-mxs/devices/platform-gpio-mxs.c
> delete mode 100644 arch/arm/mach-mxs/gpio.c
> delete mode 100644 arch/arm/mach-mxs/gpio.h
>
> diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
> index 58e8923..6c38262 100644
> --- a/arch/arm/mach-mxs/Makefile
> +++ b/arch/arm/mach-mxs/Makefile
> @@ -1,5 +1,5 @@
> # Common support
> -obj-y := clock.o devices.o gpio.o icoll.o iomux.o system.o timer.o
> +obj-y := clock.o devices.o icoll.o iomux.o system.o timer.o
>
> obj-$(CONFIG_MXS_OCOTP) += ocotp.o
> obj-$(CONFIG_PM) += pm.o
> diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c
> index cfdb6b2..fe3e847 100644
> --- a/arch/arm/mach-mxs/devices.c
> +++ b/arch/arm/mach-mxs/devices.c
> @@ -88,3 +88,14 @@ int __init mxs_add_amba_device(const struct amba_device *dev)
>
> return amba_device_register(adev, &iomem_resource);
> }
> +
> +struct device mxs_apbh_bus = {
> + .init_name = "mxs_apbh",
> + .parent = &platform_bus,
> +};
> +
> +static int __init mxs_device_init(void)
> +{
> + return device_register(&mxs_apbh_bus);
> +}
> +core_initcall(mxs_device_init);
> diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile
> index 324f282..351915c 100644
> --- a/arch/arm/mach-mxs/devices/Makefile
> +++ b/arch/arm/mach-mxs/devices/Makefile
> @@ -6,4 +6,5 @@ obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
> obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o
> obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o
> obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o
> +obj-y += platform-gpio-mxs.o
> obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o
> diff --git a/arch/arm/mach-mxs/devices/platform-gpio-mxs.c b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
> new file mode 100644
> index 0000000..ed0885e
> --- /dev/null
> +++ b/arch/arm/mach-mxs/devices/platform-gpio-mxs.c
> @@ -0,0 +1,53 @@
> +/*
> + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify it under
> + * the terms of the GNU General Public License version 2 as published by the
> + * Free Software Foundation.
> + */
> +#include <linux/compiler.h>
> +#include <linux/err.h>
> +#include <linux/init.h>
> +
> +#include <mach/mx23.h>
> +#include <mach/mx28.h>
> +#include <mach/devices-common.h>
> +
> +struct platform_device *__init mxs_add_gpio(
> + int id, resource_size_t iobase, int irq)
> +{
> + struct resource res[] = {
> + {
> + .start = iobase,
> + .end = iobase + SZ_8K - 1,
> + .flags = IORESOURCE_MEM,
> + }, {
> + .start = irq,
> + .end = irq,
> + .flags = IORESOURCE_IRQ,
> + },
> + };
> +
> + return platform_device_register_resndata(&mxs_apbh_bus,
> + "gpio-mxs", id, res, ARRAY_SIZE(res), NULL, 0);
> +}
> +
> +static int __init mxs_add_mxs_gpio(void)
> +{
> + if (cpu_is_mx23()) {
> + mxs_add_gpio(0, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO0);
> + mxs_add_gpio(1, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO1);
> + mxs_add_gpio(2, MX23_PINCTRL_BASE_ADDR, MX23_INT_GPIO2);
> + }
> +
> + if (cpu_is_mx28()) {
> + mxs_add_gpio(0, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO0);
> + mxs_add_gpio(1, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO1);
> + mxs_add_gpio(2, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO2);
> + mxs_add_gpio(3, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO3);
> + mxs_add_gpio(4, MX28_PINCTRL_BASE_ADDR, MX28_INT_GPIO4);
> + }
> +
> + return 0;
> +}
> +postcore_initcall(mxs_add_mxs_gpio);
> diff --git a/arch/arm/mach-mxs/gpio.c b/arch/arm/mach-mxs/gpio.c
> deleted file mode 100644
> index 2c950fe..0000000
> --- a/arch/arm/mach-mxs/gpio.c
> +++ /dev/null
> @@ -1,331 +0,0 @@
> -/*
> - * MXC GPIO support. (c) 2008 Daniel Mack <daniel@caiaq.de>
> - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
> - *
> - * Based on code from Freescale,
> - * Copyright (C) 2004-2010 Freescale Semiconductor, Inc. All Rights Reserved.
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License
> - * as published by the Free Software Foundation; either version 2
> - * of the License, or (at your option) any later version.
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - *
> - * You should have received a copy of the GNU General Public License
> - * along with this program; if not, write to the Free Software
> - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> - * MA 02110-1301, USA.
> - */
> -
> -#include <linux/init.h>
> -#include <linux/interrupt.h>
> -#include <linux/io.h>
> -#include <linux/irq.h>
> -#include <linux/gpio.h>
> -#include <mach/mx23.h>
> -#include <mach/mx28.h>
> -#include <asm-generic/bug.h>
> -
> -#include "gpio.h"
> -
> -static struct mxs_gpio_port *mxs_gpio_ports;
> -static int gpio_table_size;
> -
> -#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10)
> -#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10)
> -#define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10)
> -#define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10)
> -#define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10)
> -#define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10)
> -#define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10)
> -#define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10)
> -
> -#define GPIO_INT_FALL_EDGE 0x0
> -#define GPIO_INT_LOW_LEV 0x1
> -#define GPIO_INT_RISE_EDGE 0x2
> -#define GPIO_INT_HIGH_LEV 0x3
> -#define GPIO_INT_LEV_MASK (1 << 0)
> -#define GPIO_INT_POL_MASK (1 << 1)
> -
> -/* Note: This driver assumes 32 GPIOs are handled in one register */
> -
> -static void clear_gpio_irqstatus(struct mxs_gpio_port *port, u32 index)
> -{
> - __mxs_clrl(1 << index, port->base + PINCTRL_IRQSTAT(port->id));
> -}
> -
> -static void set_gpio_irqenable(struct mxs_gpio_port *port, u32 index,
> - int enable)
> -{
> - if (enable) {
> - __mxs_setl(1 << index, port->base + PINCTRL_IRQEN(port->id));
> - __mxs_setl(1 << index, port->base + PINCTRL_PIN2IRQ(port->id));
> - } else {
> - __mxs_clrl(1 << index, port->base + PINCTRL_IRQEN(port->id));
> - }
> -}
> -
> -static void mxs_gpio_ack_irq(struct irq_data *d)
> -{
> - u32 gpio = irq_to_gpio(d->irq);
> - clear_gpio_irqstatus(&mxs_gpio_ports[gpio / 32], gpio & 0x1f);
> -}
> -
> -static void mxs_gpio_mask_irq(struct irq_data *d)
> -{
> - u32 gpio = irq_to_gpio(d->irq);
> - set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 0);
> -}
> -
> -static void mxs_gpio_unmask_irq(struct irq_data *d)
> -{
> - u32 gpio = irq_to_gpio(d->irq);
> - set_gpio_irqenable(&mxs_gpio_ports[gpio / 32], gpio & 0x1f, 1);
> -}
> -
> -static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset);
> -
> -static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
> -{
> - u32 gpio = irq_to_gpio(d->irq);
> - u32 pin_mask = 1 << (gpio & 31);
> - struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
> - void __iomem *pin_addr;
> - int edge;
> -
> - switch (type) {
> - case IRQ_TYPE_EDGE_RISING:
> - edge = GPIO_INT_RISE_EDGE;
> - break;
> - case IRQ_TYPE_EDGE_FALLING:
> - edge = GPIO_INT_FALL_EDGE;
> - break;
> - case IRQ_TYPE_LEVEL_LOW:
> - edge = GPIO_INT_LOW_LEV;
> - break;
> - case IRQ_TYPE_LEVEL_HIGH:
> - edge = GPIO_INT_HIGH_LEV;
> - break;
> - default:
> - return -EINVAL;
> - }
> -
> - /* set level or edge */
> - pin_addr = port->base + PINCTRL_IRQLEV(port->id);
> - if (edge & GPIO_INT_LEV_MASK)
> - __mxs_setl(pin_mask, pin_addr);
> - else
> - __mxs_clrl(pin_mask, pin_addr);
> -
> - /* set polarity */
> - pin_addr = port->base + PINCTRL_IRQPOL(port->id);
> - if (edge & GPIO_INT_POL_MASK)
> - __mxs_setl(pin_mask, pin_addr);
> - else
> - __mxs_clrl(pin_mask, pin_addr);
> -
> - clear_gpio_irqstatus(port, gpio & 0x1f);
> -
> - return 0;
> -}
> -
> -/* MXS has one interrupt *per* gpio port */
> -static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
> -{
> - u32 irq_stat;
> - struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq);
> - u32 gpio_irq_no_base = port->virtual_irq_start;
> -
> - desc->irq_data.chip->irq_ack(&desc->irq_data);
> -
> - irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
> - __raw_readl(port->base + PINCTRL_IRQEN(port->id));
> -
> - while (irq_stat != 0) {
> - int irqoffset = fls(irq_stat) - 1;
> - generic_handle_irq(gpio_irq_no_base + irqoffset);
> - irq_stat &= ~(1 << irqoffset);
> - }
> -}
> -
> -/*
> - * Set interrupt number "irq" in the GPIO as a wake-up source.
> - * While system is running, all registered GPIO interrupts need to have
> - * wake-up enabled. When system is suspended, only selected GPIO interrupts
> - * need to have wake-up enabled.
> - * @param irq interrupt source number
> - * @param enable enable as wake-up if equal to non-zero
> - * @return This function returns 0 on success.
> - */
> -static int mxs_gpio_set_wake_irq(struct irq_data *d, unsigned int enable)
> -{
> - u32 gpio = irq_to_gpio(d->irq);
> - u32 gpio_idx = gpio & 0x1f;
> - struct mxs_gpio_port *port = &mxs_gpio_ports[gpio / 32];
> -
> - if (enable) {
> - if (port->irq_high && (gpio_idx >= 16))
> - enable_irq_wake(port->irq_high);
> - else
> - enable_irq_wake(port->irq);
> - } else {
> - if (port->irq_high && (gpio_idx >= 16))
> - disable_irq_wake(port->irq_high);
> - else
> - disable_irq_wake(port->irq);
> - }
> -
> - return 0;
> -}
> -
> -static struct irq_chip gpio_irq_chip = {
> - .name = "mxs gpio",
> - .irq_ack = mxs_gpio_ack_irq,
> - .irq_mask = mxs_gpio_mask_irq,
> - .irq_unmask = mxs_gpio_unmask_irq,
> - .irq_set_type = mxs_gpio_set_irq_type,
> - .irq_set_wake = mxs_gpio_set_wake_irq,
> -};
> -
> -static void mxs_set_gpio_direction(struct gpio_chip *chip, unsigned offset,
> - int dir)
> -{
> - struct mxs_gpio_port *port =
> - container_of(chip, struct mxs_gpio_port, chip);
> - void __iomem *pin_addr = port->base + PINCTRL_DOE(port->id);
> -
> - if (dir)
> - __mxs_setl(1 << offset, pin_addr);
> - else
> - __mxs_clrl(1 << offset, pin_addr);
> -}
> -
> -static int mxs_gpio_get(struct gpio_chip *chip, unsigned offset)
> -{
> - struct mxs_gpio_port *port =
> - container_of(chip, struct mxs_gpio_port, chip);
> -
> - return (__raw_readl(port->base + PINCTRL_DIN(port->id)) >> offset) & 1;
> -}
> -
> -static void mxs_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
> -{
> - struct mxs_gpio_port *port =
> - container_of(chip, struct mxs_gpio_port, chip);
> - void __iomem *pin_addr = port->base + PINCTRL_DOUT(port->id);
> -
> - if (value)
> - __mxs_setl(1 << offset, pin_addr);
> - else
> - __mxs_clrl(1 << offset, pin_addr);
> -}
> -
> -static int mxs_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
> -{
> - struct mxs_gpio_port *port =
> - container_of(chip, struct mxs_gpio_port, chip);
> -
> - return port->virtual_irq_start + offset;
> -}
> -
> -static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
> -{
> - mxs_set_gpio_direction(chip, offset, 0);
> - return 0;
> -}
> -
> -static int mxs_gpio_direction_output(struct gpio_chip *chip,
> - unsigned offset, int value)
> -{
> - mxs_gpio_set(chip, offset, value);
> - mxs_set_gpio_direction(chip, offset, 1);
> - return 0;
> -}
> -
> -int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt)
> -{
> - int i, j;
> -
> - /* save for local usage */
> - mxs_gpio_ports = port;
> - gpio_table_size = cnt;
> -
> - pr_info("MXS GPIO hardware\n");
> -
> - for (i = 0; i < cnt; i++) {
> - /* disable the interrupt and clear the status */
> - __raw_writel(0, port[i].base + PINCTRL_PIN2IRQ(i));
> - __raw_writel(0, port[i].base + PINCTRL_IRQEN(i));
> -
> - /* clear address has to be used to clear IRQSTAT bits */
> - __mxs_clrl(~0U, port[i].base + PINCTRL_IRQSTAT(i));
> -
> - for (j = port[i].virtual_irq_start;
> - j < port[i].virtual_irq_start + 32; j++) {
> - irq_set_chip_and_handler(j, &gpio_irq_chip,
> - handle_level_irq);
> - set_irq_flags(j, IRQF_VALID);
> - }
> -
> - /* setup one handler for each entry */
> - irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler);
> - irq_set_handler_data(port[i].irq, &port[i]);
> -
> - /* register gpio chip */
> - port[i].chip.direction_input = mxs_gpio_direction_input;
> - port[i].chip.direction_output = mxs_gpio_direction_output;
> - port[i].chip.get = mxs_gpio_get;
> - port[i].chip.set = mxs_gpio_set;
> - port[i].chip.to_irq = mxs_gpio_to_irq;
> - port[i].chip.base = i * 32;
> - port[i].chip.ngpio = 32;
> -
> - /* its a serious configuration bug when it fails */
> - BUG_ON(gpiochip_add(&port[i].chip) < 0);
> - }
> -
> - return 0;
> -}
> -
> -#define MX23_GPIO_BASE MX23_IO_ADDRESS(MX23_PINCTRL_BASE_ADDR)
> -#define MX28_GPIO_BASE MX28_IO_ADDRESS(MX28_PINCTRL_BASE_ADDR)
> -
> -#define DEFINE_MXS_GPIO_PORT(_base, _irq, _id) \
> - { \
> - .chip.label = "gpio-" #_id, \
> - .id = _id, \
> - .irq = _irq, \
> - .base = _base, \
> - .virtual_irq_start = MXS_GPIO_IRQ_START + (_id) * 32, \
> - }
> -
> -#ifdef CONFIG_SOC_IMX23
> -static struct mxs_gpio_port mx23_gpio_ports[] = {
> - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO0, 0),
> - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO1, 1),
> - DEFINE_MXS_GPIO_PORT(MX23_GPIO_BASE, MX23_INT_GPIO2, 2),
> -};
> -
> -int __init mx23_register_gpios(void)
> -{
> - return mxs_gpio_init(mx23_gpio_ports, ARRAY_SIZE(mx23_gpio_ports));
> -}
> -#endif
> -
> -#ifdef CONFIG_SOC_IMX28
> -static struct mxs_gpio_port mx28_gpio_ports[] = {
> - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO0, 0),
> - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO1, 1),
> - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO2, 2),
> - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO3, 3),
> - DEFINE_MXS_GPIO_PORT(MX28_GPIO_BASE, MX28_INT_GPIO4, 4),
> -};
> -
> -int __init mx28_register_gpios(void)
> -{
> - return mxs_gpio_init(mx28_gpio_ports, ARRAY_SIZE(mx28_gpio_ports));
> -}
> -#endif
> diff --git a/arch/arm/mach-mxs/gpio.h b/arch/arm/mach-mxs/gpio.h
> deleted file mode 100644
> index 005bb06..0000000
> --- a/arch/arm/mach-mxs/gpio.h
> +++ /dev/null
> @@ -1,34 +0,0 @@
> -/*
> - * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
> - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License
> - * as published by the Free Software Foundation; either version 2
> - * of the License, or (at your option) any later version.
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - *
> - * You should have received a copy of the GNU General Public License
> - * along with this program; if not, write to the Free Software
> - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> - * MA 02110-1301, USA.
> - */
> -
> -#ifndef __MXS_GPIO_H__
> -#define __MXS_GPIO_H__
> -
> -struct mxs_gpio_port {
> - void __iomem *base;
> - int id;
> - int irq;
> - int irq_high;
> - int virtual_irq_start;
> - struct gpio_chip chip;
> -};
> -
> -int mxs_gpio_init(struct mxs_gpio_port*, int);
> -
> -#endif /* __MXS_GPIO_H__ */
> diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
> index 7a37469..812d7a8 100644
> --- a/arch/arm/mach-mxs/include/mach/devices-common.h
> +++ b/arch/arm/mach-mxs/include/mach/devices-common.h
> @@ -11,6 +11,8 @@
> #include <linux/init.h>
> #include <linux/amba/bus.h>
>
> +extern struct device mxs_apbh_bus;
> +
> struct platform_device *mxs_add_platform_device_dmamask(
> const char *name, int id,
> const struct resource *res, unsigned int num_resources,
> diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
> index eacdc6b..56767a5 100644
> --- a/arch/arm/mach-mxs/mach-mx28evk.c
> +++ b/arch/arm/mach-mxs/mach-mx28evk.c
> @@ -26,7 +26,6 @@
> #include <mach/iomux-mx28.h>
>
> #include "devices-mx28.h"
> -#include "gpio.h"
>
> #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
> #define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
> diff --git a/arch/arm/mach-mxs/mm-mx23.c b/arch/arm/mach-mxs/mm-mx23.c
> index 5148cd6..1b2345a 100644
> --- a/arch/arm/mach-mxs/mm-mx23.c
> +++ b/arch/arm/mach-mxs/mm-mx23.c
> @@ -41,5 +41,4 @@ void __init mx23_map_io(void)
> void __init mx23_init_irq(void)
> {
> icoll_init_irq();
> - mx23_register_gpios();
> }
> diff --git a/arch/arm/mach-mxs/mm-mx28.c b/arch/arm/mach-mxs/mm-mx28.c
> index 7e4cea3..b6e18dd 100644
> --- a/arch/arm/mach-mxs/mm-mx28.c
> +++ b/arch/arm/mach-mxs/mm-mx28.c
> @@ -41,5 +41,4 @@ void __init mx28_map_io(void)
> void __init mx28_init_irq(void)
> {
> icoll_init_irq();
> - mx28_register_gpios();
> }
> --
> 1.7.4.1
>
^ permalink raw reply [flat|nested] 8+ messages in thread