From: Yinghai Lu <yinghai@kernel.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Tony Luck <tony.luck@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Linus Torvalds <torvalds@linux-foundation.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arch@vger.kernel.org, Yinghai Lu <yinghai@kernel.org>,
Paul Mackerras <paulus@samba.org>,
linuxppc-dev@lists.ozlabs.org
Subject: [PATCH 06/13] PCI, powerpc: Register busn_res for root buses
Date: Fri, 27 Jan 2012 18:49:24 -0800 [thread overview]
Message-ID: <1327718971-9598-7-git-send-email-yinghai@kernel.org> (raw)
In-Reply-To: <1327718971-9598-1-git-send-email-yinghai@kernel.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/kernel/pci-common.c | 7 ++++++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index cce98d7..501f29b 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1732,6 +1732,8 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
bus->secondary = hose->first_busno;
hose->bus = bus;
+ pci_bus_insert_busn_res(bus, hose->first_busno, hose->last_busno);
+
/* Get probe mode and perform scan */
mode = PCI_PROBE_NORMAL;
if (node && ppc_md.pci_probe_mode)
@@ -1742,8 +1744,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
of_scan_bus(node, bus);
}
- if (mode == PCI_PROBE_NORMAL)
+ if (mode == PCI_PROBE_NORMAL) {
+ pci_bus_update_busn_res_end(bus, 255);
hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
+ pci_bus_update_busn_res_end(bus, bus->subordinate);
+ }
/* Platform gets a chance to do some global fixups before
* we proceed to resource allocation
--
1.7.7
next prev parent reply other threads:[~2012-01-28 2:51 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-01-28 2:49 [PATCH -v2 0/13] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-01-28 2:49 ` [PATCH 01/13] PCI: Add iobusn_resource Yinghai Lu
2012-01-28 2:49 ` [PATCH 02/13] PCI: Add busn_res operation functions Yinghai Lu
2012-01-30 15:28 ` Bjorn Helgaas
2012-01-30 18:32 ` Yinghai Lu
2012-01-28 2:49 ` [PATCH 03/13] PCI: Add busn_res tracking in core Yinghai Lu
2012-01-30 15:35 ` Bjorn Helgaas
2012-01-30 18:39 ` Yinghai Lu
2012-01-28 2:49 ` [PATCH 04/13] PCI, x86: Register busn_res for root buses Yinghai Lu
2012-01-28 2:49 ` [PATCH 05/13] PCI, ia64: " Yinghai Lu
2012-01-28 2:49 ` Yinghai Lu [this message]
2012-01-30 15:44 ` [PATCH 06/13] PCI, powerpc: " Bjorn Helgaas
2012-01-28 2:49 ` [PATCH 07/13] PCI, parisc: " Yinghai Lu
2012-01-28 2:49 ` [PATCH 08/13] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-01-30 15:50 ` Bjorn Helgaas
2012-01-30 18:42 ` Yinghai Lu
2012-01-28 2:49 ` [PATCH 09/13] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-01-30 15:59 ` Bjorn Helgaas
2012-01-30 18:51 ` Yinghai Lu
2012-01-28 2:49 ` [PATCH 10/13] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-01-30 16:04 ` Bjorn Helgaas
2012-01-30 18:52 ` Yinghai Lu
2012-01-28 2:49 ` [PATCH 11/13] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-01-28 2:49 ` [PATCH 12/13] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-01-30 16:09 ` Bjorn Helgaas
2012-01-28 2:49 ` [PATCH 13/13] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
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