* [PATCH v2] ethernet driver for the WIZnet W5300 chip
@ 2012-03-19 9:23 Mike Sinkovsky
2012-03-20 18:08 ` Ben Hutchings
` (3 more replies)
0 siblings, 4 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-03-19 9:23 UTC (permalink / raw)
To: netdev, linux-kernel; +Cc: msink
Based on original driver from chip manufacturer, but with many cleanups.
Hope now it is near to mainline kernel quality.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/wiznet/Kconfig | 61 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 699 ++++++++++++++++++++++++++++++++++
5 files changed, 763 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index 3474a61..e87313f 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -173,6 +173,7 @@ source "drivers/net/ethernet/tile/Kconfig"
source "drivers/net/ethernet/toshiba/Kconfig"
source "drivers/net/ethernet/tundra/Kconfig"
source "drivers/net/ethernet/via/Kconfig"
+source "drivers/net/ethernet/wiznet/Kconfig"
source "drivers/net/ethernet/xilinx/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 08d5f03..d24db66 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -72,5 +72,6 @@ obj-$(CONFIG_TILE_NET) += tile/
obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
obj-$(CONFIG_NET_VENDOR_VIA) += via/
+obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..748fa3b
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,61 @@
+#
+# WIZnet device configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ depends on ARM || BLACKFIN
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ depends on NET_VENDOR_WIZNET
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access W5300 registers
+ after mapping to Memory-mapped I/O Space.
+ 0x400 bytes are required for memory space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers by
+ using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
+ Only 0x06 bytes are required for memory space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, you can selectied it
+ in runtime.
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..8f7adfa
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,699 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "WIZnet W5300"
+#define DRV_VERSION "2012-03-19"
+
+MODULE_DESCRIPTION(DRV_NAME "Ethernet driver v" DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:" KBUILD_MODNAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Frame size is hardwired to 1514 bytes,
+ * and MTU for 802.1Q frames must me set to 1496
+ */
+#define W5300_FRAME_SIZE 1514
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_private {
+ void __iomem *base;
+ int irq;
+ int link;
+
+ spinlock_t reg_lock;
+ bool promisc_mode;
+ u16 (*read_u16) (struct w5300_private *priv, u16 addr);
+ void (*write_u16)(struct w5300_private *priv, u16 addr, u16 data);
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-mapped I/O Space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16
+read_u16_direct(struct w5300_private *priv, u16 addr)
+{
+ return ioread16(priv->base + addr);
+}
+
+static inline void
+write_u16_direct(struct w5300_private *priv, u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + addr);
+ mmiowb();
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_MR 0x00 /* Mode Register offset */
+#define W5300_IDM_AR 0x02 /* Indirect Mode Address Register offset */
+#define W5300_IDM_DR 0x04 /* Indirect Mode Data Register offset */
+
+static inline u16
+read_u16_indirect(struct w5300_private *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ write_u16_direct(priv, W5300_IDM_AR, addr);
+ data = read_u16_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static inline void
+write_u16_indirect(struct w5300_private *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ write_u16_direct(priv, W5300_IDM_AR, addr);
+ write_u16_direct(priv, W5300_IDM_DR, data);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define detect_bus_mode(priv, mem_size) do {} while(0)
+#define read_reg_u16 read_u16_direct
+#define write_reg_u16 write_u16_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define detect_bus_mode(priv, mem_size) do {} while(0)
+#define read_reg_u16 read_u16_indirect
+#define write_reg_u16 write_u16_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+static inline void
+detect_bus_mode(struct w5300_private *priv, u16 mem_size)
+{
+ if (mem_size < 0x400) {
+ netdev_info(priv->ndev, "bus mode: indirect\n");
+ priv->read_u16 = read_u16_indirect;
+ priv->write_u16 = write_u16_indirect;
+ } else {
+ netdev_info(priv->ndev, "bus mode: direct\n");
+ priv->read_u16 = read_u16_direct;
+ priv->write_u16 = write_u16_direct;
+ }
+}
+
+static inline u16
+read_reg_u16(struct w5300_private *priv, u16 addr)
+{
+ return priv->read_u16(priv, addr);
+}
+
+static inline void
+write_reg_u16(struct w5300_private *priv, u16 addr, u16 data)
+{
+ priv->write_u16(priv, addr, data);
+}
+#endif
+
+static inline u32
+read_reg_u32(struct w5300_private *priv, u16 addr)
+{
+ u32 data;
+ data = read_reg_u16(priv, addr) << 16;
+ data |= read_reg_u16(priv, addr + 2);
+ return data;
+}
+
+static inline void
+write_reg_u32(struct w5300_private *priv, u16 addr, u32 data)
+{
+ write_reg_u16(priv, addr, data >> 16);
+ write_reg_u16(priv, addr + 2, data);
+}
+
+static inline void write_MR(struct w5300_private *priv, u16 data)
+{
+ write_u16_direct(priv, W5300_MR, data);
+}
+
+#define DEFINE_REG_RD(ADDR, TYPE, NAME) \
+static inline TYPE read_##NAME(struct w5300_private *priv) \
+{ \
+ return read_reg_##TYPE(priv, ADDR); \
+}
+#define DEFINE_REG_WR(ADDR, TYPE, NAME) \
+static inline void write_##NAME(struct w5300_private *priv, TYPE data) \
+{ \
+ write_reg_##TYPE(priv, ADDR, data); \
+}
+#define DEFINE_REG_RW(ADDR, TYPE, NAME) \
+ DEFINE_REG_RD(ADDR, TYPE, NAME) \
+ DEFINE_REG_WR(ADDR, TYPE, NAME)
+
+DEFINE_REG_RW(0x002, u16, IR) /* Interrupt Register */
+DEFINE_REG_WR(0x004, u16, IMR) /* Interrupt Mask Register */
+DEFINE_REG_WR(0x008, u32, SHARL) /* Source MAC address (0123) */
+DEFINE_REG_WR(0x00c, u16, SHARH) /* Source MAC address (45) */
+DEFINE_REG_WR(0x020, u32, TMSRL) /* Transmit Memory Size (0123) */
+DEFINE_REG_WR(0x024, u32, TMSRH) /* Transmit Memory Size (4567) */
+DEFINE_REG_WR(0x028, u32, RMSRL) /* Receive Memory Size (0123) */
+DEFINE_REG_WR(0x02c, u32, RMSRH) /* Receive Memory Size (4567) */
+DEFINE_REG_WR(0x030, u16, MTYPE) /* Memory Type */
+DEFINE_REG_RD(0x0fe, u16, IDR) /* Chip ID register (=0x5300) */
+DEFINE_REG_WR(0x200, u16, S0_MR) /* S0 Mode Register */
+DEFINE_REG_RW(0x202, u16, S0_CR) /* S0 Command Register */
+DEFINE_REG_WR(0x204, u16, S0_IMR) /* S0 Interrupt Mask Register */
+DEFINE_REG_RW(0x206, u16, S0_IR) /* S0 Interrupt Register */
+DEFINE_REG_RD(0x208, u16, S0_SSR) /* S0 Socket Status Register */
+DEFINE_REG_WR(0x220, u32, S0_TX_WRSR) /* S0 TX Write Size Register */
+DEFINE_REG_RD(0x224, u32, S0_TX_FSR) /* S0 TX Free Size Register */
+DEFINE_REG_RD(0x228, u32, S0_RX_RSR) /* S0 Received data Size */
+DEFINE_REG_WR(0x22e, u16, S0_TX_FIFO) /* S0 Transmit FIFO */
+DEFINE_REG_RD(0x230, u16, S0_RX_FIFO) /* S0 Receive FIFO */
+
+/* Mode Register values */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (n << 11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+
+#ifdef CONFIG_WIZNET_BUS_INDIRECT
+#define MR_VALUE (MR_WDF(7) | MR_PB | MR_IND)
+#else
+#define MR_VALUE (MR_WDF(7) | MR_PB)
+#endif
+
+/* IR/IMR register values */
+#define IR_S0 0x01 /* S0 interrupt */
+
+/* S0_MR register values */
+#define S0_MR_CLOSE 0x00 /* Close mode */
+#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
+
+/* S0_CR register values */
+#define S0_CR_OPEN 0x01 /* OPEN command */
+#define S0_CR_CLOSE 0x10 /* CLOSE command */
+#define S0_CR_SEND 0x20 /* SEND command */
+#define S0_CR_RECV 0x40 /* RECV command */
+
+/* S0_IR/S0_IMR register values */
+#define S0_IR_RECV 0x04 /* Receive interrupt */
+
+static void read_fifo(struct w5300_private *priv, u8 *data, int len)
+{
+ for (; len > 0; len -= 2) {
+ u16 fifo = read_S0_RX_FIFO(priv);
+ *data++ = fifo >> 8;
+ *data++ = fifo;
+ }
+}
+
+static void write_fifo(struct w5300_private *priv, u8 *data, int len)
+{
+ for (; len > 0; len -= 2) {
+ u16 fifo = *data++ << 8;
+ fifo |= *data++;
+ write_S0_TX_FIFO(priv, fifo);
+ }
+}
+
+static inline int send_command(struct w5300_private *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ write_S0_CR(priv, cmd);
+
+ while (read_S0_CR(priv) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void write_macaddr(struct w5300_private *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ write_SHARL(priv, ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ write_SHARH(priv, ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+}
+
+static void reset_chip(struct w5300_private *priv)
+{
+ write_MR(priv, MR_RST);
+ mdelay(5);
+ write_MR(priv, MR_VALUE);
+
+ write_IMR(priv, 0);
+
+ /*
+ * Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ write_RMSRL(priv, 64 << 24);
+ write_RMSRH(priv, 0);
+ write_TMSRL(priv, 64 << 24);
+ write_TMSRH(priv, 0);
+ write_MTYPE(priv, 0x00ff);
+
+ write_macaddr(priv);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+#define W5300_REGS_LEN 0x400
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case 0x22e: /* don't read TX_FIFO register! */
+ case 0x230: /* don't read RX_FIFO register! */
+ data = 0xffff;
+ break;
+ default:
+ data = read_reg_u16(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ netdev_err(ndev, "Transmit timeout!\n");
+
+ ndev->stats.tx_errors++;
+ reset_chip(priv);
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (unlikely(read_S0_TX_FSR(priv) < skb->len)) {
+ ndev->stats.tx_dropped++;
+ return NETDEV_TX_BUSY;
+ }
+
+ write_fifo(priv, skb->data, skb->len);
+ write_S0_TX_WRSR(priv, skb->len);
+ send_command(priv, S0_CR_SEND);
+
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_private *priv =
+ container_of(napi, struct w5300_private, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ u16 rx_frame_size;
+ int rx_count;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_size = read_S0_RX_RSR(priv);
+ if (rx_fifo_size == 0)
+ break;
+
+ rx_frame_size = read_S0_RX_FIFO(priv);
+
+ skb = netdev_alloc_skb(ndev, NET_IP_ALIGN +
+ roundup(rx_frame_size, 2));
+ if (unlikely(!skb)) {
+ int len = rx_frame_size + 4;
+ for (; len > 0; len -= 2)
+ read_S0_RX_FIFO(priv);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_reserve(skb, NET_IP_ALIGN);
+ skb_put(skb, rx_frame_size);
+ read_fifo(priv, skb->data, rx_frame_size);
+ read_S0_RX_FIFO(priv);
+ read_S0_RX_FIFO(priv);
+
+ skb->protocol = eth_type_trans(skb, ndev);
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_frame_size;
+ }
+
+ if (rx_count < budget) {
+ write_IMR(priv, IR_S0);
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_start_rx(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ write_S0_IR(priv, S0_IR_RECV);
+
+ if (napi_schedule_prep(&priv->napi)) {
+ write_IMR(priv, 0);
+ __napi_schedule(&priv->napi);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link) == 0)
+ netif_carrier_off(ndev);
+ else
+ netif_carrier_on(ndev);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+ int mode = set_promisc ? S0_MR_MACRAW : S0_MR_MACRAW_MF;
+
+ if (priv->promisc_mode != set_promisc) {
+ priv->promisc_mode = set_promisc;
+ write_S0_MR(priv, mode);
+ send_command(priv, S0_CR_OPEN);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ int mode = priv->promisc_mode ? S0_MR_MACRAW : S0_MR_MACRAW_MF;
+
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+
+ write_S0_IMR(priv, S0_IR_RECV);
+ write_S0_MR(priv, mode);
+ send_command(priv, S0_CR_OPEN);
+ write_IMR(priv, IR_S0);
+
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (priv->link < 0 || gpio_get_value(priv->link))
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ write_IMR(priv, 0);
+ write_S0_CR(priv, S0_CR_CLOSE);
+
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *link;
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ detect_bus_mode(priv, mem_size);
+ reset_chip(priv);
+ if (read_IDR(priv) != 0x5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(dev, irq, w5300_start_rx,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ link = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ if (!link) {
+ priv->link = -1;
+ } else {
+ char *link_name = devm_kzalloc(dev, 16, GFP_KERNEL);
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link = link->start;
+ if (request_irq(gpio_to_irq(priv->link), w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link = -1;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct net_device *ndev;
+ struct w5300_private *priv;
+ int ret;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = 2 * HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+ ret = register_netdev(ndev);
+ if (ret < 0)
+ goto fail;
+
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ ret = w5300_hw_probe(pdev);
+ if (ret < 0)
+ goto fail;
+
+ return 0;
+
+fail: netdev_info(ndev, "probe failed (%d)\n", ret);
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return ret;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ write_IMR(priv, 0);
+ send_command(priv, S0_CR_CLOSE);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+ int mode = priv->promisc_mode ? S0_MR_MACRAW : S0_MR_MACRAW_MF;
+
+ if (netif_running(ndev)) {
+ reset_chip(priv);
+ write_S0_MR(priv, mode);
+ send_command(priv, S0_CR_OPEN);
+ write_IMR(priv, IR_S0);
+
+ netif_device_attach(ndev);
+ if (priv->link < 0 || gpio_get_value(priv->link))
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static struct platform_driver wiznet_w5300_driver = {
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .owner = THIS_MODULE,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+#ifdef CONFIG_PM
+ .suspend = w5300_suspend,
+ .resume = w5300_resume,
+#endif
+};
+
+module_platform_driver(wiznet_w5300_driver);
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH v2] ethernet driver for the WIZnet W5300 chip
2012-03-19 9:23 [PATCH v2] ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
@ 2012-03-20 18:08 ` Ben Hutchings
2012-03-21 14:49 ` Florian Fainelli
` (2 subsequent siblings)
3 siblings, 0 replies; 49+ messages in thread
From: Ben Hutchings @ 2012-03-20 18:08 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Mon, 2012-03-19 at 14:23 +0500, Mike Sinkovsky wrote:
> Based on original driver from chip manufacturer, but with many cleanups.
> Hope now it is near to mainline kernel quality.
>
> Tested and used in production with Blackfin BF531 embedded processor.
[...]
> +static void w5300_get_drvinfo(struct net_device *ndev,
> + struct ethtool_drvinfo *info)
> +{
> + strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
> + strlcpy(info->version, DRV_VERSION, sizeof(info->version));
> + strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
[...]
Nitpick: if you don't have firmware, don't set fw_version at all.
Ben.
--
Ben Hutchings, Staff Engineer, Solarflare
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v2] ethernet driver for the WIZnet W5300 chip
2012-03-19 9:23 [PATCH v2] ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-03-20 18:08 ` Ben Hutchings
@ 2012-03-21 14:49 ` Florian Fainelli
2012-03-22 6:58 ` Mike Sinkovsky
2012-03-24 11:02 ` [PATCH v3] Ethernet " Mike Sinkovsky
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
3 siblings, 1 reply; 49+ messages in thread
From: Florian Fainelli @ 2012-03-21 14:49 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
Hi,
Le 03/19/12 10:23, Mike Sinkovsky a écrit :
> Based on original driver from chip manufacturer, but with many cleanups.
> Hope now it is near to mainline kernel quality.
>
> Tested and used in production with Blackfin BF531 embedded processor.
>
> Signed-off-by: Mike Sinkovsky<msink@permonline.ru>
> ---
> v2:
> - corrected handling of NET_ADDR_RANDOM flag
> - support for WIZNET_BUS_ANY mode
> - link detection using gpio
> - registers read using ethtool
> - more cleanups
>
> drivers/net/ethernet/Kconfig | 1 +
> drivers/net/ethernet/Makefile | 1 +
> drivers/net/ethernet/wiznet/Kconfig | 61 +++
> drivers/net/ethernet/wiznet/Makefile | 1 +
> drivers/net/ethernet/wiznet/w5300.c | 699 ++++++++++++++++++++++++++++++++++
> 5 files changed, 763 insertions(+), 0 deletions(-)
> create mode 100644 drivers/net/ethernet/wiznet/Kconfig
> create mode 100644 drivers/net/ethernet/wiznet/Makefile
> create mode 100644 drivers/net/ethernet/wiznet/w5300.c
>
> diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
> index 3474a61..e87313f 100644
> --- a/drivers/net/ethernet/Kconfig
> +++ b/drivers/net/ethernet/Kconfig
> @@ -173,6 +173,7 @@ source "drivers/net/ethernet/tile/Kconfig"
> source "drivers/net/ethernet/toshiba/Kconfig"
> source "drivers/net/ethernet/tundra/Kconfig"
> source "drivers/net/ethernet/via/Kconfig"
> +source "drivers/net/ethernet/wiznet/Kconfig"
> source "drivers/net/ethernet/xilinx/Kconfig"
> source "drivers/net/ethernet/xircom/Kconfig"
>
> diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
> index 08d5f03..d24db66 100644
> --- a/drivers/net/ethernet/Makefile
> +++ b/drivers/net/ethernet/Makefile
> @@ -72,5 +72,6 @@ obj-$(CONFIG_TILE_NET) += tile/
> obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
> obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
> obj-$(CONFIG_NET_VENDOR_VIA) += via/
> +obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
> obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
> obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
> diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
> new file mode 100644
> index 0000000..748fa3b
> --- /dev/null
> +++ b/drivers/net/ethernet/wiznet/Kconfig
> @@ -0,0 +1,61 @@
> +#
> +# WIZnet device configuration
> +#
> +
> +config NET_VENDOR_WIZNET
> + bool "WIZnet devices"
> + default y
> + ---help---
> + If you have a network (Ethernet) card belonging to this class, say Y
> + and read the Ethernet-HOWTO, available from
> + <http://www.tldp.org/docs.html#howto>.
> +
> + Note that the answer to this question doesn't directly affect the
> + kernel: saying N will just cause the configurator to skip all
> + the questions about WIZnet devices. If you say Y, you will be asked
> + for your specific card in the following questions.
> +
> +if NET_VENDOR_WIZNET
> +
> +config WIZNET_W5300
> + tristate "WIZnet W5300 Ethernet support"
> + depends on ARM || BLACKFIN
> + ---help---
> + Support for WIZnet W5300 chips.
> +
> + W5300 is a single chip with integrated 10/100 Ethernet MAC,
> + PHY and hardware TCP/IP stack, but this driver is limited to
> + the MAC and PHY functions only, onchip TCP/IP is unused.
> +
> + To compile this driver as a module, choose M here: the module
> + will be called w5300.
> +
> +choice
> + prompt "WIZnet interface mode"
> + depends on NET_VENDOR_WIZNET
> + default WIZNET_BUS_ANY
> +
> +config WIZNET_BUS_DIRECT
> + bool "Direct address bus mode"
> + ---help---
> + In direct address mode host system can directly access W5300 registers
> + after mapping to Memory-mapped I/O Space.
> + 0x400 bytes are required for memory space.
> +
> +config WIZNET_BUS_INDIRECT
> + bool "Indirect address bus mode"
> + ---help---
> + In indirect address mode host system indirectly accesses registers by
> + using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
> + Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
> + Only 0x06 bytes are required for memory space.
> +
> +config WIZNET_BUS_ANY
> + bool "Select interface mode in runtime"
> + ---help---
> + If interface mode is unknown in compile time, you can selectied it
> + in runtime.
> + Performance may decrease compared to explicitly selected bus mode.
> +endchoice
> +
> +endif # NET_VENDOR_WIZNET
> diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
> new file mode 100644
> index 0000000..88e0a3e
> --- /dev/null
> +++ b/drivers/net/ethernet/wiznet/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_WIZNET_W5300) += w5300.o
> diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
> new file mode 100644
> index 0000000..8f7adfa
> --- /dev/null
> +++ b/drivers/net/ethernet/wiznet/w5300.c
> @@ -0,0 +1,699 @@
> +/*
> + * Ethernet driver for the WIZnet W5300 chip.
> + *
> + * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
> + * Copyright (C) 2011 Taehun Kim<kth3321<at> gmail.com>
> + * Copyright (C) 2012 Mike Sinkovsky<msink@permonline.ru>
> + *
> + * Licensed under the GPL-2 or later.
> + */
> +
> +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +
> +#include<linux/module.h>
> +#include<linux/kernel.h>
> +#include<linux/platform_device.h>
> +#include<linux/netdevice.h>
> +#include<linux/etherdevice.h>
> +#include<linux/ethtool.h>
> +#include<linux/skbuff.h>
> +
> +#include<linux/slab.h>
> +#include<linux/types.h>
> +#include<linux/errno.h>
> +#include<linux/delay.h>
> +#include<linux/spinlock.h>
> +
> +#include<linux/io.h>
> +#include<linux/ioport.h>
> +#include<linux/interrupt.h>
> +#include<linux/gpio.h>
> +
> +#define DRV_NAME "WIZnet W5300"
> +#define DRV_VERSION "2012-03-19"
> +
> +MODULE_DESCRIPTION(DRV_NAME "Ethernet driver v" DRV_VERSION);
> +MODULE_AUTHOR("Mike Sinkovsky<msink@permonline.ru>");
> +MODULE_ALIAS("platform:" KBUILD_MODNAME);
> +MODULE_LICENSE("GPL");
> +
> +/*
> + * Frame size is hardwired to 1514 bytes,
> + * and MTU for 802.1Q frames must me set to 1496
> + */
> +#define W5300_FRAME_SIZE 1514
> +
> +/*
> + * Device driver private data structure
> + */
> +struct w5300_private {
> + void __iomem *base;
> + int irq;
> + int link;
> +
> + spinlock_t reg_lock;
> + bool promisc_mode;
> + u16 (*read_u16) (struct w5300_private *priv, u16 addr);
> + void (*write_u16)(struct w5300_private *priv, u16 addr, u16 data);
> +
> + struct napi_struct napi;
> + struct net_device *ndev;
> +};
> +
> +/************************************************************************
> + *
> + * Lowlevel I/O functions
> + *
> + ***********************************************************************/
> +
> +/*
> + * In direct address mode host system can directly access W5300 registers
> + * after mapping to Memory-mapped I/O Space.
> + *
> + * 0x400 bytes are required for memory space.
> + */
> +static inline u16
> +read_u16_direct(struct w5300_private *priv, u16 addr)
> +{
> + return ioread16(priv->base + addr);
> +}
> +
> +static inline void
> +write_u16_direct(struct w5300_private *priv, u16 addr, u16 data)
> +{
> + iowrite16(data, priv->base + addr);
> + mmiowb();
> +}
> +
> +/*
> + * In indirect address mode host system indirectly accesses registers by
> + * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
> + * Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
> + * Mode Register (MR) is directly accessible.
> + *
> + * Only 0x06 bytes are required for memory space.
> + */
> +#define W5300_MR 0x00 /* Mode Register offset */
> +#define W5300_IDM_AR 0x02 /* Indirect Mode Address Register offset */
> +#define W5300_IDM_DR 0x04 /* Indirect Mode Data Register offset */
> +
> +static inline u16
> +read_u16_indirect(struct w5300_private *priv, u16 addr)
> +{
> + unsigned long flags;
> + u16 data;
> +
> + spin_lock_irqsave(&priv->reg_lock, flags);
> + write_u16_direct(priv, W5300_IDM_AR, addr);
> + data = read_u16_direct(priv, W5300_IDM_DR);
> + spin_unlock_irqrestore(&priv->reg_lock, flags);
> +
> + return data;
> +}
> +
> +static inline void
> +write_u16_indirect(struct w5300_private *priv, u16 addr, u16 data)
> +{
> + unsigned long flags;
> +
> + spin_lock_irqsave(&priv->reg_lock, flags);
> + write_u16_direct(priv, W5300_IDM_AR, addr);
> + write_u16_direct(priv, W5300_IDM_DR, data);
> + spin_unlock_irqrestore(&priv->reg_lock, flags);
> +}
> +
> +#if defined(CONFIG_WIZNET_BUS_DIRECT)
> +#define detect_bus_mode(priv, mem_size) do {} while(0)
> +#define read_reg_u16 read_u16_direct
> +#define write_reg_u16 write_u16_direct
> +
> +#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
> +#define detect_bus_mode(priv, mem_size) do {} while(0)
> +#define read_reg_u16 read_u16_indirect
> +#define write_reg_u16 write_u16_indirect
Looks like you don't have to make such decisions at compile-time. Since
it is a platform driver, better supply this through platform_data instead.
> +
> +#else /* CONFIG_WIZNET_BUS_ANY */
> +static inline void
> +detect_bus_mode(struct w5300_private *priv, u16 mem_size)
> +{
> + if (mem_size< 0x400) {
> + netdev_info(priv->ndev, "bus mode: indirect\n");
> + priv->read_u16 = read_u16_indirect;
> + priv->write_u16 = write_u16_indirect;
> + } else {
> + netdev_info(priv->ndev, "bus mode: direct\n");
> + priv->read_u16 = read_u16_direct;
> + priv->write_u16 = write_u16_direct;
> + }
> +}
> +
> +static inline u16
> +read_reg_u16(struct w5300_private *priv, u16 addr)
> +{
> + return priv->read_u16(priv, addr);
> +}
> +
> +static inline void
> +write_reg_u16(struct w5300_private *priv, u16 addr, u16 data)
> +{
> + priv->write_u16(priv, addr, data);
> +}
> +#endif
> +
> +static inline u32
> +read_reg_u32(struct w5300_private *priv, u16 addr)
> +{
> + u32 data;
> + data = read_reg_u16(priv, addr)<< 16;
> + data |= read_reg_u16(priv, addr + 2);
> + return data;
> +}
> +
> +static inline void
> +write_reg_u32(struct w5300_private *priv, u16 addr, u32 data)
> +{
> + write_reg_u16(priv, addr, data>> 16);
> + write_reg_u16(priv, addr + 2, data);
> +}
> +
> +static inline void write_MR(struct w5300_private *priv, u16 data)
> +{
> + write_u16_direct(priv, W5300_MR, data);
> +}
> +
> +#define DEFINE_REG_RD(ADDR, TYPE, NAME) \
> +static inline TYPE read_##NAME(struct w5300_private *priv) \
> +{ \
> + return read_reg_##TYPE(priv, ADDR); \
> +}
> +#define DEFINE_REG_WR(ADDR, TYPE, NAME) \
> +static inline void write_##NAME(struct w5300_private *priv, TYPE data) \
> +{ \
> + write_reg_##TYPE(priv, ADDR, data); \
> +}
> +#define DEFINE_REG_RW(ADDR, TYPE, NAME) \
> + DEFINE_REG_RD(ADDR, TYPE, NAME) \
> + DEFINE_REG_WR(ADDR, TYPE, NAME)
> +
> +DEFINE_REG_RW(0x002, u16, IR) /* Interrupt Register */
> +DEFINE_REG_WR(0x004, u16, IMR) /* Interrupt Mask Register */
> +DEFINE_REG_WR(0x008, u32, SHARL) /* Source MAC address (0123) */
> +DEFINE_REG_WR(0x00c, u16, SHARH) /* Source MAC address (45) */
> +DEFINE_REG_WR(0x020, u32, TMSRL) /* Transmit Memory Size (0123) */
> +DEFINE_REG_WR(0x024, u32, TMSRH) /* Transmit Memory Size (4567) */
> +DEFINE_REG_WR(0x028, u32, RMSRL) /* Receive Memory Size (0123) */
> +DEFINE_REG_WR(0x02c, u32, RMSRH) /* Receive Memory Size (4567) */
> +DEFINE_REG_WR(0x030, u16, MTYPE) /* Memory Type */
> +DEFINE_REG_RD(0x0fe, u16, IDR) /* Chip ID register (=0x5300) */
> +DEFINE_REG_WR(0x200, u16, S0_MR) /* S0 Mode Register */
> +DEFINE_REG_RW(0x202, u16, S0_CR) /* S0 Command Register */
> +DEFINE_REG_WR(0x204, u16, S0_IMR) /* S0 Interrupt Mask Register */
> +DEFINE_REG_RW(0x206, u16, S0_IR) /* S0 Interrupt Register */
> +DEFINE_REG_RD(0x208, u16, S0_SSR) /* S0 Socket Status Register */
> +DEFINE_REG_WR(0x220, u32, S0_TX_WRSR) /* S0 TX Write Size Register */
> +DEFINE_REG_RD(0x224, u32, S0_TX_FSR) /* S0 TX Free Size Register */
> +DEFINE_REG_RD(0x228, u32, S0_RX_RSR) /* S0 Received data Size */
> +DEFINE_REG_WR(0x22e, u16, S0_TX_FIFO) /* S0 Transmit FIFO */
> +DEFINE_REG_RD(0x230, u16, S0_RX_FIFO) /* S0 Receive FIFO */
> +
> +/* Mode Register values */
> +#define MR_DBW (1<< 15) /* Data bus width */
> +#define MR_MPF (1<< 14) /* Mac layer pause frame */
> +#define MR_WDF(n) (n<< 11) /* Write data fetch time */
> +#define MR_RDH (1<< 10) /* Read data hold time */
> +#define MR_FS (1<< 8) /* FIFO swap */
> +#define MR_RST (1<< 7) /* S/W reset */
> +#define MR_PB (1<< 4) /* Ping block */
> +#define MR_DBS (1<< 2) /* Data bus swap */
> +#define MR_IND (1<< 0) /* Indirect mode */
> +
> +#ifdef CONFIG_WIZNET_BUS_INDIRECT
> +#define MR_VALUE (MR_WDF(7) | MR_PB | MR_IND)
> +#else
> +#define MR_VALUE (MR_WDF(7) | MR_PB)
> +#endif
> +
> +/* IR/IMR register values */
> +#define IR_S0 0x01 /* S0 interrupt */
> +
> +/* S0_MR register values */
> +#define S0_MR_CLOSE 0x00 /* Close mode */
> +#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
> +#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
> +
> +/* S0_CR register values */
> +#define S0_CR_OPEN 0x01 /* OPEN command */
> +#define S0_CR_CLOSE 0x10 /* CLOSE command */
> +#define S0_CR_SEND 0x20 /* SEND command */
> +#define S0_CR_RECV 0x40 /* RECV command */
> +
> +/* S0_IR/S0_IMR register values */
> +#define S0_IR_RECV 0x04 /* Receive interrupt */
> +
> +static void read_fifo(struct w5300_private *priv, u8 *data, int len)
> +{
> + for (; len> 0; len -= 2) {
> + u16 fifo = read_S0_RX_FIFO(priv);
> + *data++ = fifo>> 8;
> + *data++ = fifo;
> + }
> +}
> +
> +static void write_fifo(struct w5300_private *priv, u8 *data, int len)
> +{
> + for (; len> 0; len -= 2) {
> + u16 fifo = *data++<< 8;
> + fifo |= *data++;
> + write_S0_TX_FIFO(priv, fifo);
> + }
> +}
> +
> +static inline int send_command(struct w5300_private *priv, u16 cmd)
> +{
> + unsigned long timeout = jiffies + msecs_to_jiffies(100);
> +
> + write_S0_CR(priv, cmd);
> +
> + while (read_S0_CR(priv) != 0) {
> + if (time_after(jiffies, timeout))
> + return -EIO;
> + cpu_relax();
> + }
> +
> + return 0;
> +}
> +
> +static void write_macaddr(struct w5300_private *priv)
> +{
> + struct net_device *ndev = priv->ndev;
> + write_SHARL(priv, ndev->dev_addr[0]<< 24 |
> + ndev->dev_addr[1]<< 16 |
> + ndev->dev_addr[2]<< 8 |
> + ndev->dev_addr[3]);
> + write_SHARH(priv, ndev->dev_addr[4]<< 8 |
> + ndev->dev_addr[5]);
> +}
> +
> +static void reset_chip(struct w5300_private *priv)
> +{
> + write_MR(priv, MR_RST);
> + mdelay(5);
> + write_MR(priv, MR_VALUE);
> +
> + write_IMR(priv, 0);
> +
> + /*
> + * Configure 128K of internal memory
> + * as 64K RX fifo and 64K TX fifo
> + */
> + write_RMSRL(priv, 64<< 24);
> + write_RMSRH(priv, 0);
> + write_TMSRL(priv, 64<< 24);
> + write_TMSRH(priv, 0);
> + write_MTYPE(priv, 0x00ff);
> +
> + write_macaddr(priv);
> +}
> +
> +/***********************************************************************
> + *
> + * Device driver functions / callbacks
> + *
> + ***********************************************************************/
> +
> +static void w5300_get_drvinfo(struct net_device *ndev,
> + struct ethtool_drvinfo *info)
> +{
> + strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
> + strlcpy(info->version, DRV_VERSION, sizeof(info->version));
> + strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
> + strlcpy(info->bus_info, dev_name(ndev->dev.parent),
> + sizeof(info->bus_info));
> +}
> +
> +#define W5300_REGS_LEN 0x400
> +
> +static int w5300_get_regs_len(struct net_device *ndev)
> +{
> + return W5300_REGS_LEN;
> +}
> +
> +static void w5300_get_regs(struct net_device *ndev,
> + struct ethtool_regs *regs, void *_buf)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> + u8 *buf = _buf;
> + u16 addr;
> + u16 data;
> +
> + regs->version = 1;
> + for (addr = 0; addr< W5300_REGS_LEN; addr += 2) {
> + switch (addr& 0x23f) {
> + case 0x22e: /* don't read TX_FIFO register! */
> + case 0x230: /* don't read RX_FIFO register! */
> + data = 0xffff;
> + break;
> + default:
> + data = read_reg_u16(priv, addr);
> + break;
> + }
> + *buf++ = data>> 8;
> + *buf++ = data;
> + }
> +}
> +
> +static void w5300_tx_timeout(struct net_device *ndev)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + netdev_err(ndev, "Transmit timeout!\n");
> +
> + ndev->stats.tx_errors++;
> + reset_chip(priv);
> + netif_wake_queue(ndev);
> +}
> +
> +static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + if (unlikely(read_S0_TX_FSR(priv)< skb->len)) {
> + ndev->stats.tx_dropped++;
> + return NETDEV_TX_BUSY;
> + }
> +
> + write_fifo(priv, skb->data, skb->len);
> + write_S0_TX_WRSR(priv, skb->len);
> + send_command(priv, S0_CR_SEND);
> +
> + ndev->stats.tx_packets++;
> + ndev->stats.tx_bytes += skb->len;
> + dev_kfree_skb(skb);
> +
> + return NETDEV_TX_OK;
> +}
> +
> +static int w5300_napi_poll(struct napi_struct *napi, int budget)
> +{
> + struct w5300_private *priv =
> + container_of(napi, struct w5300_private, napi);
> + struct net_device *ndev = priv->ndev;
> + struct sk_buff *skb;
> + u16 rx_frame_size;
> + int rx_count;
> +
> + for (rx_count = 0; rx_count< budget; rx_count++) {
> + u32 rx_fifo_size = read_S0_RX_RSR(priv);
> + if (rx_fifo_size == 0)
> + break;
> +
> + rx_frame_size = read_S0_RX_FIFO(priv);
> +
> + skb = netdev_alloc_skb(ndev, NET_IP_ALIGN +
> + roundup(rx_frame_size, 2));
> + if (unlikely(!skb)) {
> + int len = rx_frame_size + 4;
> + for (; len> 0; len -= 2)
> + read_S0_RX_FIFO(priv);
> + ndev->stats.rx_dropped++;
> + return -ENOMEM;
> + }
> +
> + skb_reserve(skb, NET_IP_ALIGN);
> + skb_put(skb, rx_frame_size);
> + read_fifo(priv, skb->data, rx_frame_size);
> + read_S0_RX_FIFO(priv);
> + read_S0_RX_FIFO(priv);
> +
> + skb->protocol = eth_type_trans(skb, ndev);
> + netif_receive_skb(skb);
> + ndev->stats.rx_packets++;
> + ndev->stats.rx_bytes += rx_frame_size;
> + }
> +
> + if (rx_count< budget) {
> + write_IMR(priv, IR_S0);
> + napi_complete(napi);
> + }
> +
> + return rx_count;
> +}
> +
> +static irqreturn_t w5300_start_rx(int irq, void *ndev_instance)
> +{
> + struct net_device *ndev = ndev_instance;
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + write_S0_IR(priv, S0_IR_RECV);
> +
> + if (napi_schedule_prep(&priv->napi)) {
> + write_IMR(priv, 0);
> + __napi_schedule(&priv->napi);
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
> +{
> + struct net_device *ndev = ndev_instance;
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + if (netif_running(ndev)) {
> + if (gpio_get_value(priv->link) == 0)
> + netif_carrier_off(ndev);
> + else
> + netif_carrier_on(ndev);
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static void w5300_set_rx_mode(struct net_device *ndev)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> + bool set_promisc = (ndev->flags& IFF_PROMISC) != 0;
> + int mode = set_promisc ? S0_MR_MACRAW : S0_MR_MACRAW_MF;
> +
> + if (priv->promisc_mode != set_promisc) {
> + priv->promisc_mode = set_promisc;
> + write_S0_MR(priv, mode);
> + send_command(priv, S0_CR_OPEN);
> + }
> +}
> +
> +static int w5300_set_macaddr(struct net_device *ndev, void *addr)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> + struct sockaddr *sock_addr = addr;
> +
> + if (!is_valid_ether_addr(sock_addr->sa_data))
> + return -EADDRNOTAVAIL;
> + memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
> + ndev->addr_assign_type&= ~NET_ADDR_RANDOM;
> + write_macaddr(priv);
> + return 0;
> +}
> +
> +static int w5300_open(struct net_device *ndev)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> + int mode = priv->promisc_mode ? S0_MR_MACRAW : S0_MR_MACRAW_MF;
> +
> + if (!is_valid_ether_addr(ndev->dev_addr))
> + return -EINVAL;
> +
> + write_S0_IMR(priv, S0_IR_RECV);
> + write_S0_MR(priv, mode);
> + send_command(priv, S0_CR_OPEN);
> + write_IMR(priv, IR_S0);
> +
> + napi_enable(&priv->napi);
> + netif_start_queue(ndev);
> + if (priv->link< 0 || gpio_get_value(priv->link))
> + netif_carrier_on(ndev);
> + return 0;
> +}
> +
> +static int w5300_stop(struct net_device *ndev)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + write_IMR(priv, 0);
> + write_S0_CR(priv, S0_CR_CLOSE);
> +
> + netif_carrier_off(ndev);
> + netif_stop_queue(ndev);
> + napi_disable(&priv->napi);
> + return 0;
> +}
> +
> +static const struct ethtool_ops w5300_ethtool_ops = {
> + .get_drvinfo = w5300_get_drvinfo,
> + .get_regs_len = w5300_get_regs_len,
> + .get_regs = w5300_get_regs,
> +};
> +
> +static const struct net_device_ops w5300_netdev_ops = {
> + .ndo_open = w5300_open,
> + .ndo_stop = w5300_stop,
> + .ndo_start_xmit = w5300_start_tx,
> + .ndo_tx_timeout = w5300_tx_timeout,
> + .ndo_set_rx_mode = w5300_set_rx_mode,
> + .ndo_set_mac_address = w5300_set_macaddr,
> + .ndo_validate_addr = eth_validate_addr,
> + .ndo_change_mtu = eth_change_mtu,
> +};
> +
> +static int __devinit w5300_hw_probe(struct platform_device *pdev)
> +{
> + struct device *dev =&pdev->dev;
> + struct net_device *ndev = platform_get_drvdata(pdev);
> + struct w5300_private *priv = netdev_priv(ndev);
> + const char *name = netdev_name(ndev);
> + struct resource *link;
> + struct resource *mem;
> + int mem_size;
> + int irq;
> + int ret;
> +
> + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + if (!mem)
> + return -ENXIO;
> + mem_size = resource_size(mem);
> + if (!devm_request_mem_region(dev, mem->start, mem_size, name))
> + return -EBUSY;
> + priv->base = devm_ioremap(dev, mem->start, mem_size);
> + if (!priv->base)
> + return -EBUSY;
> +
> + spin_lock_init(&priv->reg_lock);
> + detect_bus_mode(priv, mem_size);
> + reset_chip(priv);
> + if (read_IDR(priv) != 0x5300)
> + return -ENODEV;
> +
> + irq = platform_get_irq(pdev, 0);
> + if (irq< 0)
> + return irq;
> + ret = devm_request_irq(dev, irq, w5300_start_rx,
> + IRQ_TYPE_LEVEL_LOW, name, ndev);
> + if (ret< 0)
> + return ret;
> + priv->irq = irq;
> +
> + link = platform_get_resource(pdev, IORESOURCE_IO, 0);
> + if (!link) {
> + priv->link = -1;
> + } else {
> + char *link_name = devm_kzalloc(dev, 16, GFP_KERNEL);
> + snprintf(link_name, 16, "%s-link", name);
> + priv->link = link->start;
> + if (request_irq(gpio_to_irq(priv->link), w5300_detect_link,
> + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
> + link_name, priv->ndev)< 0)
> + priv->link = -1;
> + }
Please implement phylib to properly report the link state to the
networking stack and ethtool.
> +
> + netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
> + return 0;
> +}
> +
> +static int __devinit w5300_probe(struct platform_device *pdev)
> +{
> + struct net_device *ndev;
> + struct w5300_private *priv;
> + int ret;
> +
> + ndev = alloc_etherdev(sizeof(*priv));
> + if (!ndev)
> + return -ENOMEM;
> + SET_NETDEV_DEV(ndev,&pdev->dev);
> + platform_set_drvdata(pdev, ndev);
> + priv = netdev_priv(ndev);
> + priv->ndev = ndev;
> +
> + ether_setup(ndev);
> + ndev->netdev_ops =&w5300_netdev_ops;
> + ndev->ethtool_ops =&w5300_ethtool_ops;
> + ndev->watchdog_timeo = 2 * HZ;
> + netif_napi_add(ndev,&priv->napi, w5300_napi_poll, 16);
> + ret = register_netdev(ndev);
> + if (ret< 0)
> + goto fail;
> +
> + random_ether_addr(ndev->dev_addr);
> + ndev->addr_assign_type |= NET_ADDR_RANDOM;
Allow platform_data to pass a valid MAC address to this driver instead
of defaulting to random unconditionnaly.
> + ret = w5300_hw_probe(pdev);
> + if (ret< 0)
> + goto fail;
> +
> + return 0;
> +
> +fail: netdev_info(ndev, "probe failed (%d)\n", ret);
> + unregister_netdev(ndev);
> + free_netdev(ndev);
> + platform_set_drvdata(pdev, NULL);
> + return ret;
> +}
> +
> +static int __devexit w5300_remove(struct platform_device *pdev)
> +{
> + struct net_device *ndev = platform_get_drvdata(pdev);
> +
> + unregister_netdev(ndev);
> + free_netdev(ndev);
> + platform_set_drvdata(pdev, NULL);
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
> +{
> + struct net_device *ndev = platform_get_drvdata(pdev);
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + if (netif_running(ndev)) {
> + netif_carrier_off(ndev);
> + netif_device_detach(ndev);
> +
> + write_IMR(priv, 0);
> + send_command(priv, S0_CR_CLOSE);
> + }
> + return 0;
> +}
> +
> +static int w5300_resume(struct platform_device *pdev)
> +{
> + struct net_device *ndev = platform_get_drvdata(pdev);
> + struct w5300_private *priv = netdev_priv(ndev);
> + int mode = priv->promisc_mode ? S0_MR_MACRAW : S0_MR_MACRAW_MF;
> +
> + if (netif_running(ndev)) {
> + reset_chip(priv);
> + write_S0_MR(priv, mode);
> + send_command(priv, S0_CR_OPEN);
> + write_IMR(priv, IR_S0);
> +
> + netif_device_attach(ndev);
> + if (priv->link< 0 || gpio_get_value(priv->link))
> + netif_carrier_on(ndev);
> + }
> + return 0;
> +}
> +#endif /* CONFIG_PM */
> +
> +static struct platform_driver wiznet_w5300_driver = {
> + .driver = {
> + .name = KBUILD_MODNAME,
> + .owner = THIS_MODULE,
> + },
> + .probe = w5300_probe,
> + .remove = __devexit_p(w5300_remove),
> +#ifdef CONFIG_PM
> + .suspend = w5300_suspend,
> + .resume = w5300_resume,
> +#endif
> +};
> +
> +module_platform_driver(wiznet_w5300_driver);
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v2] ethernet driver for the WIZnet W5300 chip
2012-03-21 14:49 ` Florian Fainelli
@ 2012-03-22 6:58 ` Mike Sinkovsky
0 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-03-22 6:58 UTC (permalink / raw)
To: Florian Fainelli; +Cc: netdev, linux-kernel, msink
21.03.2012 20:49, Florian Fainelli wrote:
>> +#if defined(CONFIG_WIZNET_BUS_DIRECT)
>> +#define detect_bus_mode(priv, mem_size) do {} while(0)
>> +#define read_reg_u16 read_u16_direct
>> +#define write_reg_u16 write_u16_direct
>> +
>> +#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
>> +#define detect_bus_mode(priv, mem_size) do {} while(0)
>> +#define read_reg_u16 read_u16_indirect
>> +#define write_reg_u16 write_u16_indirect
> Looks like you don't have to make such decisions at compile-time.
> Since it is a platform driver, better supply this through
> platform_data instead.
Interface bus mode can be selected in .config (make menuconfig etc.)
If don't selected explicitly in .config, platform_device.resource[] is
used in runtime to setup callbacks.
This hack was done for performance reasons, but may be not necessary,
I'm not sure.
> Please implement phylib to properly report the link state to the
> networking stack and ethtool.
This chip don't allow any access to phy interface, it completely hidden
for host processor.
The only way I found - to wire pin LINK from W5300 to some GPIO, then
ise RIGING/FALLING interrupt for tthat GPIO:
> +static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
> +{
> + struct net_device *ndev = ndev_instance;
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + if (netif_running(ndev)) {
> + if (gpio_get_value(priv->link) == 0)
> + netif_carrier_off(ndev);
> + else
> + netif_carrier_on(ndev);
> + }
> +
> + return IRQ_HANDLED;
> +}
Isn't it enough for networking stack?
> Allow platform_data to pass a valid MAC address to this driver instead
> of defaulting to random unconditionnaly.
>
Do you mean - create .h file in /include/linux/platform_data/ ?
Ok, will do in next version.
Thanks.
---
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v3] Ethernet driver for the WIZnet W5300 chip
2012-03-19 9:23 [PATCH v2] ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-03-20 18:08 ` Ben Hutchings
2012-03-21 14:49 ` Florian Fainelli
@ 2012-03-24 11:02 ` Mike Sinkovsky
2012-03-24 15:53 ` Joe Perches
2012-03-24 16:10 ` Eric Dumazet
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
3 siblings, 2 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-03-24 11:02 UTC (permalink / raw)
To: netdev, linux-kernel; +Cc: msink
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v3:
- reading macaddr from platform_data
- ethtool: get_link, get_msglevel, set_msglevel
- more cleanups
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/wiznet/Kconfig | 61 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 707 ++++++++++++++++++++++++++++++++++
include/linux/platform_data/wiznet.h | 16 +
6 files changed, 787 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
create mode 100644 include/linux/platform_data/wiznet.h
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index c63a64c..a11af5c 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -174,6 +174,7 @@ source "drivers/net/ethernet/tile/Kconfig"
source "drivers/net/ethernet/toshiba/Kconfig"
source "drivers/net/ethernet/tundra/Kconfig"
source "drivers/net/ethernet/via/Kconfig"
+source "drivers/net/ethernet/wiznet/Kconfig"
source "drivers/net/ethernet/xilinx/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 9676a51..878ad32 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -73,5 +73,6 @@ obj-$(CONFIG_TILE_NET) += tile/
obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
obj-$(CONFIG_NET_VENDOR_VIA) += via/
+obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..7ca5c95
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,61 @@
+#
+# WIZnet device configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ depends on ARM || BLACKFIN
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ depends on NET_VENDOR_WIZNET
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access W5300 registers
+ after mapping to Memory-mapped I/O Space.
+ 0x400 bytes are required for memory space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers by
+ using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
+ Only 0x06 bytes are required for memory space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, you can selectied it
+ in runtime.
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..d982407
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,707 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "WIZnet W5300"
+#define DRV_VERSION "2012-03-24"
+
+MODULE_DESCRIPTION(DRV_NAME" Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"KBUILD_MODNAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5300_MR 0x0000 /* Mode Register */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+#define W5300_IR 0x0002 /* Interrupt Register */
+#define W5300_IMR 0x0004 /* Interrupt Mask Register */
+#define IR_S0 0x0001 /* S0 interrupt */
+#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
+#define W5300_SHARH 0x000c /* Source MAC address (45) */
+#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
+#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
+#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
+#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
+#define W5300_MTYPE 0x0030 /* Memory Type */
+#define W5300_IDR 0x00fe /* Chip ID register */
+#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
+#define W5300_S0_MR 0x0200 /* S0 Mode Register */
+#define S0_MR_CLOSE 0x0000 /* Close mode */
+#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
+#define W5300_S0_CR 0x0202 /* S0 Command Register */
+#define S0_CR_OPEN 0x0001 /* OPEN command */
+#define S0_CR_CLOSE 0x0010 /* CLOSE command */
+#define S0_CR_SEND 0x0020 /* SEND command */
+#define S0_CR_RECV 0x0040 /* RECV command */
+#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
+#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
+#define S0_IR_RECV 0x0004 /* Receive interrupt */
+#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
+#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
+#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
+#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
+#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
+#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
+#define W5300_REGS_LEN 0x0400
+
+/*
+ * Frame size is hardwired to 1514 bytes (including header),
+ * => MTU for 802.1Q frames must me set to 1500-4 = 1496
+ */
+#define W5300_HARD_MTU 1500
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_private {
+ void __iomem *base;
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ u16 (*read) (struct w5300_private *priv, u16 addr);
+ void (*write)(struct w5300_private *priv, u16 addr, u16 data);
+ spinlock_t reg_lock;
+ bool indirect;
+ bool promisc;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-mapped I/O Space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16
+w5300_read_direct(struct w5300_private *priv, u16 addr)
+{
+ return ioread16(priv->base + addr);
+}
+
+static inline void
+w5300_write_direct(struct w5300_private *priv, u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + addr);
+ mmiowb();
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_IDM_AR 0x002 /* Indirect Mode Address Register */
+#define W5300_IDM_DR 0x004 /* Indirect Mode Data Register */
+
+static inline u16
+w5300_read_indirect(struct w5300_private *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ data = w5300_read_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static inline void
+w5300_write_indirect(struct w5300_private *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ w5300_write_direct(priv, W5300_IDM_DR, data);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5300_read w5300_read_direct
+#define w5300_write w5300_write_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5300_read w5300_read_indirect
+#define w5300_write w5300_write_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5300_read priv->read
+#define w5300_write priv->write
+#endif
+
+static inline u32
+w5300_read32(struct w5300_private *priv, u16 addr)
+{
+ u32 data;
+ data = w5300_read(priv, addr) << 16;
+ data |= w5300_read(priv, addr + 2);
+ return data;
+}
+
+static inline void
+w5300_write32(struct w5300_private *priv, u16 addr, u32 data)
+{
+ w5300_write(priv, addr, data >> 16);
+ w5300_write(priv, addr + 2, data);
+}
+
+static inline int w5300_command(struct w5300_private *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5300_write(priv, W5300_S0_CR, cmd);
+
+ while (w5300_read(priv, W5300_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5300_read_frame(struct w5300_private *priv, u8 *data, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ *data++ = fifo >> 8;
+ *data++ = fifo;
+ }
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+}
+
+static void w5300_write_frame(struct w5300_private *priv, u8 *data, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = *data++ << 8;
+ fifo |= *data++;
+ w5300_write(priv, W5300_S0_TX_FIFO, fifo);
+ }
+ w5300_write32(priv, W5300_S0_TX_WRSR, len);
+ w5300_command(priv, S0_CR_SEND);
+}
+
+static void w5300_write_macaddr(struct w5300_private *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ w5300_write32(priv, W5300_SHARL,
+ ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ w5300_write(priv, W5300_SHARH,
+ ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+}
+
+static void w5300_hw_reset(struct w5300_private *priv)
+{
+ w5300_write_direct(priv, W5300_MR, MR_RST);
+ mdelay(5);
+ w5300_write_direct(priv, W5300_MR, priv->indirect ?
+ MR_WDF(7) | MR_PB | MR_IND :
+ MR_WDF(7) | MR_PB);
+ w5300_write(priv, W5300_IMR, 0);
+
+ /*
+ * Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ w5300_write32(priv, W5300_RMSRL, 64 << 24);
+ w5300_write32(priv, W5300_RMSRH, 0);
+ w5300_write32(priv, W5300_TMSRL, 64 << 24);
+ w5300_write32(priv, W5300_TMSRH, 0);
+ w5300_write(priv, W5300_MTYPE, 0x00ff);
+
+ w5300_write_macaddr(priv);
+}
+
+static void w5300_hw_start(struct w5300_private *priv)
+{
+ w5300_write(priv, W5300_S0_MR, priv->promisc ?
+ S0_MR_MACRAW :
+ S0_MR_MACRAW_MF);
+ w5300_command(priv, S0_CR_OPEN);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV);
+ w5300_write(priv, W5300_IMR, IR_S0);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5300_get_link(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (priv->link_gpio < 0)
+ return 1;
+
+ return !!gpio_get_value(priv->link_gpio);
+}
+
+static u32 w5300_get_msglevel(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5300_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
+ case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
+ data = 0xffff;
+ break;
+ default:
+ data = w5300_read(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_msg_timer(priv))
+ netdev_err(ndev, "transmit timeout\n");
+
+ netif_stop_queue(ndev);
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (unlikely(w5300_read32(priv, W5300_S0_TX_FSR) < skb->len)) {
+ ndev->stats.tx_dropped++;
+ return NETDEV_TX_BUSY;
+ }
+
+ w5300_write_frame(priv, skb->data, skb->len);
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_private *priv =
+ container_of(napi, struct w5300_private, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_size;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_size = w5300_read32(priv, W5300_S0_RX_RSR);
+ if (rx_fifo_size == 0)
+ break;
+
+ rx_size = w5300_read(priv, W5300_S0_RX_FIFO);
+
+ skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_size, 2));
+ if (unlikely(!skb)) {
+ u32 i;
+ for (i = 0; i < rx_fifo_size; i += 2)
+ w5300_read(priv, W5300_S0_RX_FIFO);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_size);
+ w5300_read_frame(priv, skb->data, rx_size);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_size;
+ }
+
+ if (rx_count < budget) {
+ w5300_write(priv, W5300_IMR, IR_S0);
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_start_rx(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ w5300_write(priv, W5300_S0_IR, S0_IR_RECV);
+
+ if (napi_schedule_prep(&priv->napi)) {
+ w5300_write(priv, W5300_IMR, 0);
+ __napi_schedule(&priv->napi);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ if (netif_msg_link(priv))
+ netdev_info(ndev, "link is Up\n");
+ netif_carrier_on(ndev);
+ } else {
+ if (netif_msg_link(priv))
+ netdev_info(ndev, "link is Down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5300_hw_start(priv);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+
+ w5300_write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_msg_ifup(priv))
+ netdev_dbg(ndev, "enabling\n");
+
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+
+ w5300_hw_start(priv);
+
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (priv->link_gpio < 0 || gpio_get_value(priv->link_gpio))
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_msg_ifdown(priv))
+ netdev_dbg(ndev, "shutting down\n");
+
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_write(priv, W5300_S0_CR, S0_CR_CLOSE);
+
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_msglevel = w5300_get_msglevel,
+ .set_msglevel = w5300_set_msglevel,
+ .get_link = w5300_get_link,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *link;
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < 0x400;
+ if (priv->indirect) {
+ priv->read = w5300_read_indirect;
+ priv->write = w5300_write_indirect;
+ } else {
+ priv->read = w5300_read_direct;
+ priv->write = w5300_write_direct;
+ }
+ w5300_hw_reset(priv);
+ if (w5300_read(priv, W5300_IDR) != IDR_W5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(dev, irq, w5300_start_rx,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ link = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ if (!link) {
+ priv->link_gpio = -1;
+ } else {
+ char *link_name = devm_kzalloc(dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_gpio = link->start;
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_irq(priv->link_irq, w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -1;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct w5300_private *priv;
+ struct net_device *ndev;
+ int ret;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = 2 * HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+ ret = register_netdev(ndev);
+ if (ret < 0)
+ goto fail;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+ ret = w5300_hw_probe(pdev);
+ if (ret < 0)
+ goto fail;
+
+ return 0;
+
+fail: netdev_info(ndev, "probe failed (%d)\n", ret);
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return ret;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_command(priv, S0_CR_CLOSE);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (priv->link_gpio < 0 || gpio_get_value(priv->link_gpio))
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
+
+static struct platform_driver w5300_driver = {
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .owner = THIS_MODULE,
+ .pm = &w5300_pm_ops,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+};
+
+module_platform_driver(w5300_driver);
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 0000000..402a493
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,16 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef PLATFORM_DATA_WIZNET_H
+#define PLATFORM_DATA_WIZNET_H
+
+#include <linux/if_ether.h>
+
+struct wiznet_platform_data {
+ u8 mac_addr[ETH_ALEN];
+};
+
+#endif /* PLATFORM_DATA_WIZNET_H */
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH v3] Ethernet driver for the WIZnet W5300 chip
2012-03-24 11:02 ` [PATCH v3] Ethernet " Mike Sinkovsky
@ 2012-03-24 15:53 ` Joe Perches
2012-03-24 16:10 ` Eric Dumazet
1 sibling, 0 replies; 49+ messages in thread
From: Joe Perches @ 2012-03-24 15:53 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Sat, 2012-03-24 at 16:02 +0500, Mike Sinkovsky wrote:
> Based on original driver from chip manufacturer, but nearly full rewite.
> Tested and used in production with Blackfin BF531 embedded processor.
Hi Mike.
Just a trivial comment. Instead of:
if (netif_<test>(priv))
netdev_<level>(ndev, ...)
you can use
netif_<level>(priv, <test>, ndev, ,...)
> diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
[]
> +static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
> +{
> + struct net_device *ndev = ndev_instance;
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + if (netif_running(ndev)) {
> + if (gpio_get_value(priv->link_gpio) != 0) {
[]
> + if (netif_msg_link(priv))
> + netdev_info(ndev, "link is Up\n");
like:
netif_info(priv, link, ndev, "link is up\n");
> + netif_carrier_on(ndev);
> + } else {
> + if (netif_msg_link(priv))
> + netdev_info(ndev, "link is Down\n");
netif_info(priv, link, ndev, "link is down\n");
> +static int w5300_stop(struct net_device *ndev)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + if (netif_msg_ifdown(priv))
> + netdev_dbg(ndev, "shutting down\n");
netif_dbg(priv, ifdown, ndev, "shutting down\n");
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v3] Ethernet driver for the WIZnet W5300 chip
2012-03-24 11:02 ` [PATCH v3] Ethernet " Mike Sinkovsky
2012-03-24 15:53 ` Joe Perches
@ 2012-03-24 16:10 ` Eric Dumazet
2012-03-26 9:05 ` Mike Sinkovsky
1 sibling, 1 reply; 49+ messages in thread
From: Eric Dumazet @ 2012-03-24 16:10 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
Le samedi 24 mars 2012 à 16:02 +0500, Mike Sinkovsky a écrit :
> Based on original driver from chip manufacturer, but nearly full rewite.
>
> Tested and used in production with Blackfin BF531 embedded processor.
>
> Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
> ---
> +
> +static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
> +{
> + struct w5300_private *priv = netdev_priv(ndev);
> +
> + if (unlikely(w5300_read32(priv, W5300_S0_TX_FSR) < skb->len)) {
> + ndev->stats.tx_dropped++;
> + return NETDEV_TX_BUSY;
> + }
> +
> + w5300_write_frame(priv, skb->data, skb->len);
> + ndev->stats.tx_packets++;
> + ndev->stats.tx_bytes += skb->len;
> + dev_kfree_skb(skb);
> +
> + return NETDEV_TX_OK;
> +}
> +
As there is no tx interrupt at the end of transmit to eventually XON the
queue, you cant XOFF it when there it no room in transmit queue.
Of course, this means qdisc will never have a backlog, since we never
stop the dequeue process.
Returning NETDEV_TX_BUSY essentialy is going to burn cpu cycles,
spinning there is enough room in NIC.
So you must drop the frame, and return NETDEV_TX_OK instead.
static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
{
struct w5300_private *priv = netdev_priv(ndev);
if (unlikely(w5300_read32(priv, W5300_S0_TX_FSR) < skb->len)) {
ndev->stats.tx_dropped++;
dev_kfree_skb(skb);
return NETDEV_TX_OK;
}
Rule to use NETDEV_TX_BUSY is :
Before returning NETDEV_TX_BUSY, qdisc must have been stopped by
netif_stop_queue(ndev) (and tx completion might call netif_wake_queue()
later)
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v3] Ethernet driver for the WIZnet W5300 chip
2012-03-24 16:10 ` Eric Dumazet
@ 2012-03-26 9:05 ` Mike Sinkovsky
0 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-03-26 9:05 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev, linux-kernel
24.03.2012 22:10, Eric Dumazet wrote:
> As there is no tx interrupt at the end of transmit to eventually XON the
> queue, you cant XOFF it when there it no room in transmit queue.
Actually there is, but is unused in original driver, don't know why.
> Rule to use NETDEV_TX_BUSY is :
>
> Before returning NETDEV_TX_BUSY, qdisc must have been stopped by
> netif_stop_queue(ndev) (and tx completion might call netif_wake_queue()
> later)
I tried handle this situation, and it seems to work perfectly:
@@ -377,7 +377,8 @@ static int w5300_start_tx(struct sk_buff *skb,
struct net_device *ndev)
struct w5300_private *priv = netdev_priv(ndev);
if (unlikely(w5300_read32(priv, W5300_S0_TX_FSR) < skb->len)) {
- ndev->stats.tx_dropped++;
+ netif_stop_queue(ndev);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV | S0_IR_SENDOK);
return NETDEV_TX_BUSY;
}
@@ -443,6 +444,12 @@ static irqreturn_t w5300_interrupt(int irq, void
*ndev_instance)
__napi_schedule(&priv->napi);
}
+ if (unlikely(netif_queue_stopped(ndev))) {
+ w5300_write(priv, W5300_S0_IR, S0_IR_SENDOK);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV);
+ netif_wake_queue(ndev);
+ }
+
return IRQ_HANDLED;
}
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v4] Ethernet driver for the WIZnet W5300 chip
2012-03-19 9:23 [PATCH v2] ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
` (2 preceding siblings ...)
2012-03-24 11:02 ` [PATCH v3] Ethernet " Mike Sinkovsky
@ 2012-03-26 9:07 ` Mike Sinkovsky
2012-03-28 2:35 ` David Miller
` (5 more replies)
3 siblings, 6 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-03-26 9:07 UTC (permalink / raw)
To: netdev, linux-kernel, joe, eric.dumazet; +Cc: msink
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v4:
- netif_stop_queue if tx fifo is full, netif_wake_queue in interrupt
- use netif_info macro
v3:
- reading macaddr from platform_data
- ethtool: get_link, get_msglevel, set_msglevel
- more cleanups
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
---
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/wiznet/Kconfig | 61 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 708 ++++++++++++++++++++++++++++++++++
include/linux/platform_data/wiznet.h | 16 +
6 files changed, 788 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
create mode 100644 include/linux/platform_data/wiznet.h
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index c63a64c..a11af5c 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -174,6 +174,7 @@ source "drivers/net/ethernet/tile/Kconfig"
source "drivers/net/ethernet/toshiba/Kconfig"
source "drivers/net/ethernet/tundra/Kconfig"
source "drivers/net/ethernet/via/Kconfig"
+source "drivers/net/ethernet/wiznet/Kconfig"
source "drivers/net/ethernet/xilinx/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 9676a51..878ad32 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -73,5 +73,6 @@ obj-$(CONFIG_TILE_NET) += tile/
obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
obj-$(CONFIG_NET_VENDOR_VIA) += via/
+obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..7ca5c95
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,61 @@
+#
+# WIZnet device configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ depends on ARM || BLACKFIN
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ depends on NET_VENDOR_WIZNET
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access W5300 registers
+ after mapping to Memory-mapped I/O Space.
+ 0x400 bytes are required for memory space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers by
+ using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
+ Only 0x06 bytes are required for memory space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, you can selectied it
+ in runtime.
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..64c5c3a
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,708 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "WIZnet W5300"
+#define DRV_VERSION "2012-03-24"
+
+MODULE_DESCRIPTION(DRV_NAME" Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"KBUILD_MODNAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5300_MR 0x0000 /* Mode Register */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+#define W5300_IR 0x0002 /* Interrupt Register */
+#define W5300_IMR 0x0004 /* Interrupt Mask Register */
+#define IR_S0 0x0001 /* S0 interrupt */
+#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
+#define W5300_SHARH 0x000c /* Source MAC address (45) */
+#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
+#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
+#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
+#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
+#define W5300_MTYPE 0x0030 /* Memory Type */
+#define W5300_IDR 0x00fe /* Chip ID register */
+#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
+#define W5300_S0_MR 0x0200 /* S0 Mode Register */
+#define S0_MR_CLOSE 0x0000 /* Close mode */
+#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
+#define W5300_S0_CR 0x0202 /* S0 Command Register */
+#define S0_CR_OPEN 0x0001 /* OPEN command */
+#define S0_CR_CLOSE 0x0010 /* CLOSE command */
+#define S0_CR_SEND 0x0020 /* SEND command */
+#define S0_CR_RECV 0x0040 /* RECV command */
+#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
+#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
+#define S0_IR_RECV 0x0004 /* Receive interrupt */
+#define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
+#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
+#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
+#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
+#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
+#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
+#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
+#define W5300_REGS_LEN 0x0400
+
+/*
+ * Frame size is hardwired to 1514 bytes (including header),
+ * => MTU for 802.1Q frames must be set to 1500-4 = 1496
+ */
+#define W5300_HARD_MTU 1500
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_private {
+ void __iomem *base;
+ bool indirect;
+ spinlock_t reg_lock;
+ u16 (*read) (struct w5300_private *priv, u16 addr);
+ void (*write)(struct w5300_private *priv, u16 addr, u16 data);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-mapped I/O Space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16
+w5300_read_direct(struct w5300_private *priv, u16 addr)
+{
+ return ioread16(priv->base + addr);
+}
+
+static inline void
+w5300_write_direct(struct w5300_private *priv, u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + addr);
+ mmiowb();
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_IDM_AR 0x002 /* Indirect Mode Address Register */
+#define W5300_IDM_DR 0x004 /* Indirect Mode Data Register */
+
+static inline u16
+w5300_read_indirect(struct w5300_private *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ data = w5300_read_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static inline void
+w5300_write_indirect(struct w5300_private *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ w5300_write_direct(priv, W5300_IDM_DR, data);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5300_read w5300_read_direct
+#define w5300_write w5300_write_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5300_read w5300_read_indirect
+#define w5300_write w5300_write_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5300_read priv->read
+#define w5300_write priv->write
+#endif
+
+static inline u32
+w5300_read32(struct w5300_private *priv, u16 addr)
+{
+ u32 data;
+ data = w5300_read(priv, addr) << 16;
+ data |= w5300_read(priv, addr + 2);
+ return data;
+}
+
+static inline void
+w5300_write32(struct w5300_private *priv, u16 addr, u32 data)
+{
+ w5300_write(priv, addr, data >> 16);
+ w5300_write(priv, addr + 2, data);
+}
+
+static inline int w5300_command(struct w5300_private *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5300_write(priv, W5300_S0_CR, cmd);
+
+ while (w5300_read(priv, W5300_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5300_read_frame(struct w5300_private *priv, u8 *data, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ *data++ = fifo >> 8;
+ *data++ = fifo;
+ }
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+}
+
+static void w5300_write_frame(struct w5300_private *priv, u8 *data, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = *data++ << 8;
+ fifo |= *data++;
+ w5300_write(priv, W5300_S0_TX_FIFO, fifo);
+ }
+ w5300_write32(priv, W5300_S0_TX_WRSR, len);
+ w5300_command(priv, S0_CR_SEND);
+}
+
+static void w5300_write_macaddr(struct w5300_private *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ w5300_write32(priv, W5300_SHARL,
+ ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ w5300_write(priv, W5300_SHARH,
+ ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+}
+
+static void w5300_hw_reset(struct w5300_private *priv)
+{
+ w5300_write_direct(priv, W5300_MR, MR_RST);
+ mdelay(5);
+ w5300_write_direct(priv, W5300_MR, priv->indirect ?
+ MR_WDF(7) | MR_PB | MR_IND :
+ MR_WDF(7) | MR_PB);
+ w5300_write(priv, W5300_IMR, 0);
+
+ /*
+ * Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ w5300_write32(priv, W5300_RMSRL, 64 << 24);
+ w5300_write32(priv, W5300_RMSRH, 0);
+ w5300_write32(priv, W5300_TMSRL, 64 << 24);
+ w5300_write32(priv, W5300_TMSRH, 0);
+ w5300_write(priv, W5300_MTYPE, 0x00ff);
+
+ w5300_write_macaddr(priv);
+}
+
+static void w5300_hw_start(struct w5300_private *priv)
+{
+ w5300_write(priv, W5300_S0_MR, priv->promisc ?
+ S0_MR_MACRAW :
+ S0_MR_MACRAW_MF);
+ w5300_command(priv, S0_CR_OPEN);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV);
+ w5300_write(priv, W5300_IMR, IR_S0);
+}
+
+static void w5300_hw_close(struct w5300_private *priv)
+{
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5300_get_link(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (priv->link_gpio < 0)
+ return 1;
+
+ return !!gpio_get_value(priv->link_gpio);
+}
+
+static u32 w5300_get_msglevel(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5300_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
+ case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
+ data = 0xffff;
+ break;
+ default:
+ data = w5300_read(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (unlikely(w5300_read32(priv, W5300_S0_TX_FSR) < skb->len)) {
+ netif_stop_queue(ndev);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV | S0_IR_SENDOK);
+ return NETDEV_TX_BUSY;
+ }
+
+ w5300_write_frame(priv, skb->data, skb->len);
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_private *priv =
+ container_of(napi, struct w5300_private, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_size;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_size = w5300_read32(priv, W5300_S0_RX_RSR);
+ if (rx_fifo_size == 0)
+ break;
+
+ rx_size = w5300_read(priv, W5300_S0_RX_FIFO);
+
+ skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_size, 2));
+ if (unlikely(!skb)) {
+ u32 i;
+ for (i = 0; i < rx_fifo_size; i += 2)
+ w5300_read(priv, W5300_S0_RX_FIFO);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_size);
+ w5300_read_frame(priv, skb->data, rx_size);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_size;
+ }
+
+ if (rx_count < budget) {
+ w5300_write(priv, W5300_IMR, IR_S0);
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ w5300_write(priv, W5300_S0_IR, S0_IR_RECV);
+
+ if (napi_schedule_prep(&priv->napi)) {
+ w5300_write(priv, W5300_IMR, 0);
+ __napi_schedule(&priv->napi);
+ }
+
+ if (unlikely(netif_queue_stopped(ndev))) {
+ w5300_write(priv, W5300_S0_IR, S0_IR_SENDOK);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV);
+ netif_wake_queue(ndev);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5300_hw_start(priv);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+
+ w5300_write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5300_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (priv->link_gpio < 0 || gpio_get_value(priv->link_gpio))
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5300_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_msglevel = w5300_get_msglevel,
+ .set_msglevel = w5300_set_msglevel,
+ .get_link = w5300_get_link,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *link;
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < 0x400;
+ if (priv->indirect) {
+ priv->read = w5300_read_indirect;
+ priv->write = w5300_write_indirect;
+ } else {
+ priv->read = w5300_read_direct;
+ priv->write = w5300_write_direct;
+ }
+ w5300_hw_reset(priv);
+ if (w5300_read(priv, W5300_IDR) != IDR_W5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(dev, irq, w5300_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ link = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ if (!link) {
+ priv->link_gpio = -1;
+ } else {
+ char *link_name = devm_kzalloc(dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_gpio = link->start;
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_irq(priv->link_irq, w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -1;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct w5300_private *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = 2 * HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+ err = w5300_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ dev_info(&pdev->dev, "probe failed (%d)\n", err);
+ return err;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5300_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_private *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (priv->link_gpio < 0 || gpio_get_value(priv->link_gpio))
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
+
+static struct platform_driver w5300_driver = {
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .owner = THIS_MODULE,
+ .pm = &w5300_pm_ops,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+};
+
+module_platform_driver(w5300_driver);
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 0000000..402a493
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,16 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef PLATFORM_DATA_WIZNET_H
+#define PLATFORM_DATA_WIZNET_H
+
+#include <linux/if_ether.h>
+
+struct wiznet_platform_data {
+ u8 mac_addr[ETH_ALEN];
+};
+
+#endif /* PLATFORM_DATA_WIZNET_H */
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH v4] Ethernet driver for the WIZnet W5300 chip
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
@ 2012-03-28 2:35 ` David Miller
2012-03-30 7:00 ` [PATCH v5 1/2] " Mike Sinkovsky
` (4 subsequent siblings)
5 siblings, 0 replies; 49+ messages in thread
From: David Miller @ 2012-03-28 2:35 UTC (permalink / raw)
To: msink; +Cc: netdev, linux-kernel, joe, eric.dumazet
From: Mike Sinkovsky <msink@permonline.ru>
Date: Mon, 26 Mar 2012 15:07:56 +0600
> +/*
> + * Frame size is hardwired to 1514 bytes (including header),
> + * => MTU for 802.1Q frames must be set to 1500-4 = 1496
> + */
> +#define W5300_HARD_MTU 1500
I've told you that you must set the VLAN challenged feature flag
(NETIF_F_VLAN_CHALLENGED) for devices which have this restriction.
Just set that, and remove this comment, since the feature bit setting
documents this restriction fully and perfectly.
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v5 1/2] Ethernet driver for the WIZnet W5300 chip
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
2012-03-28 2:35 ` David Miller
@ 2012-03-30 7:00 ` Mike Sinkovsky
2012-03-31 21:45 ` Mark Brown
2012-03-30 7:00 ` [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
` (3 subsequent siblings)
5 siblings, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-03-30 7:00 UTC (permalink / raw)
To: netdev, linux-kernel; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v5:
- disabled VLAN (NETIF_F_VLAN_CHALLENGED)
v4:
- netif_stop_queue if tx fifo is full, netif_wake_queue in interrupt
- use netif_info macro
v3:
- reading macaddr from platform_data
- ethtool: get_link, get_msglevel, set_msglevel
- more cleanups
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
---
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/wiznet/Kconfig | 61 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 714 ++++++++++++++++++++++++++++++++++
include/linux/platform_data/wiznet.h | 23 ++
6 files changed, 801 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
create mode 100644 include/linux/platform_data/wiznet.h
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index c63a64c..a11af5c 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -174,6 +174,7 @@ source "drivers/net/ethernet/tile/Kconfig"
source "drivers/net/ethernet/toshiba/Kconfig"
source "drivers/net/ethernet/tundra/Kconfig"
source "drivers/net/ethernet/via/Kconfig"
+source "drivers/net/ethernet/wiznet/Kconfig"
source "drivers/net/ethernet/xilinx/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 9676a51..878ad32 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -73,5 +73,6 @@ obj-$(CONFIG_TILE_NET) += tile/
obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
obj-$(CONFIG_NET_VENDOR_VIA) += via/
+obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..7ca5c95
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,61 @@
+#
+# WIZnet device configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ depends on ARM || BLACKFIN
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ depends on NET_VENDOR_WIZNET
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access W5300 registers
+ after mapping to Memory-mapped I/O Space.
+ 0x400 bytes are required for memory space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers by
+ using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ Register (IDM_DR), which are directly mapped to Memory-mapped I/O Space.
+ Only 0x06 bytes are required for memory space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, you can selectied it
+ in runtime.
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..8059aa9
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,714 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "WIZnet W5300"
+#define DRV_VERSION "2012-03-28"
+
+MODULE_DESCRIPTION(DRV_NAME" Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"KBUILD_MODNAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5300_MR 0x0000 /* Mode Register */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+#define W5300_IR 0x0002 /* Interrupt Register */
+#define W5300_IMR 0x0004 /* Interrupt Mask Register */
+#define IR_S0 0x0001 /* S0 interrupt */
+#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
+#define W5300_SHARH 0x000c /* Source MAC address (45) */
+#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
+#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
+#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
+#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
+#define W5300_MTYPE 0x0030 /* Memory Type */
+#define W5300_IDR 0x00fe /* Chip ID register */
+#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
+#define W5300_S0_MR 0x0200 /* S0 Mode Register */
+#define S0_MR_CLOSED 0x0000 /* Close mode */
+#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
+#define W5300_S0_CR 0x0202 /* S0 Command Register */
+#define S0_CR_OPEN 0x0001 /* OPEN command */
+#define S0_CR_CLOSE 0x0010 /* CLOSE command */
+#define S0_CR_SEND 0x0020 /* SEND command */
+#define S0_CR_RECV 0x0040 /* RECV command */
+#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
+#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
+#define S0_IR_RECV 0x0004 /* Receive interrupt */
+#define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
+#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
+#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
+#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
+#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
+#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
+#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
+#define W5300_REGS_LEN 0x0400
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_priv {
+ void __iomem *base;
+ bool indirect;
+ spinlock_t reg_lock;
+ u16 (*read) (struct w5300_priv *priv, u16 addr);
+ void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
+{
+ return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5300_write_direct(struct w5300_priv *priv,
+ u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
+#define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
+
+static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ data = w5300_read_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ w5300_write_direct(priv, W5300_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5300_read w5300_read_direct
+#define w5300_write w5300_write_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5300_read w5300_read_indirect
+#define w5300_write w5300_write_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5300_read priv->read
+#define w5300_write priv->write
+#endif
+
+static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
+{
+ u32 data;
+ data = w5300_read(priv, addr) << 16;
+ data |= w5300_read(priv, addr + 2);
+ return data;
+}
+
+static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
+{
+ w5300_write(priv, addr, data >> 16);
+ w5300_write(priv, addr + 2, data);
+}
+
+static int w5300_command(struct w5300_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5300_write(priv, W5300_S0_CR, cmd);
+ mmiowb();
+
+ while (w5300_read(priv, W5300_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ *buf++ = fifo >> 8;
+ *buf++ = fifo;
+ }
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+}
+
+static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = *buf++ << 8;
+ fifo |= *buf++;
+ w5300_write(priv, W5300_S0_TX_FIFO, fifo);
+ }
+ w5300_write32(priv, W5300_S0_TX_WRSR, len);
+ mmiowb();
+ w5300_command(priv, S0_CR_SEND);
+}
+
+static void w5300_write_macaddr(struct w5300_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ w5300_write32(priv, W5300_SHARL,
+ ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ w5300_write(priv, W5300_SHARH,
+ ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+ mmiowb();
+}
+
+static void w5300_hw_reset(struct w5300_priv *priv)
+{
+ w5300_write_direct(priv, W5300_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5300_write_direct(priv, W5300_MR, priv->indirect ?
+ MR_WDF(7) | MR_PB | MR_IND :
+ MR_WDF(7) | MR_PB);
+ mmiowb();
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_write_macaddr(priv);
+
+ /*
+ * Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ w5300_write32(priv, W5300_RMSRL, 64 << 24);
+ w5300_write32(priv, W5300_RMSRH, 0);
+ w5300_write32(priv, W5300_TMSRL, 64 << 24);
+ w5300_write32(priv, W5300_TMSRH, 0);
+ w5300_write(priv, W5300_MTYPE, 0x00ff);
+ mmiowb();
+}
+
+static void w5300_hw_start(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5300_command(priv, S0_CR_OPEN);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV);
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5300_hw_close(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ w5300_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5300_get_link(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (priv->link_gpio < 0)
+ return 1;
+
+ return !!gpio_get_value(priv->link_gpio);
+}
+
+static u32 w5300_get_msglevel(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5300_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
+ case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
+ data = 0xffff;
+ break;
+ default:
+ data = w5300_read(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (unlikely(w5300_read32(priv, W5300_S0_TX_FSR) < skb->len)) {
+ netif_stop_queue(ndev);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV | S0_IR_SENDOK);
+ mmiowb();
+ return NETDEV_TX_BUSY;
+ }
+
+ w5300_write_frame(priv, skb->data, skb->len);
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
+ if (rx_fifo_len == 0)
+ break;
+
+ rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
+
+ skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
+ if (unlikely(!skb)) {
+ u32 i;
+ for (i = 0; i < rx_fifo_len; i += 2)
+ w5300_read(priv, W5300_S0_RX_FIFO);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5300_read_frame(priv, skb->data, rx_len);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ w5300_write(priv, W5300_S0_IR, S0_IR_RECV);
+ mmiowb();
+
+ if (napi_schedule_prep(&priv->napi)) {
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+
+ if (unlikely(netif_queue_stopped(ndev))) {
+ w5300_write(priv, W5300_S0_IR, S0_IR_SENDOK);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV);
+ mmiowb();
+ netif_wake_queue(ndev);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5300_hw_start(priv);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5300_write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5300_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (priv->link_gpio < 0 || gpio_get_value(priv->link_gpio))
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5300_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_msglevel = w5300_get_msglevel,
+ .set_msglevel = w5300_set_msglevel,
+ .get_link = w5300_get_link,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *link;
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5300_read_indirect;
+ priv->write = w5300_write_indirect;
+ } else {
+ priv->read = w5300_read_direct;
+ priv->write = w5300_write_direct;
+ }
+ w5300_hw_reset(priv);
+ if (w5300_read(priv, W5300_IDR) != IDR_W5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(&pdev->dev, irq, w5300_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ link = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ if (!link) {
+ priv->link_gpio = -1;
+ } else {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_gpio = link->start;
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_irq(priv->link_irq, w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -1;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct w5300_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = 2 * HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+ err = w5300_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ dev_info(&pdev->dev, "probe failed (%d)\n", err);
+ return err;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5300_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (priv->link_gpio < 0 || gpio_get_value(priv->link_gpio))
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
+
+static struct platform_driver w5300_driver = {
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .owner = THIS_MODULE,
+ .pm = &w5300_pm_ops,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+};
+
+module_platform_driver(w5300_driver);
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 0000000..efd247f
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,23 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef PLATFORM_DATA_WIZNET_H
+#define PLATFORM_DATA_WIZNET_H
+
+#include <linux/if_ether.h>
+
+#ifndef CONFIG_WIZNET_BUS_SHIFT
+#define CONFIG_WIZNET_BUS_SHIFT 0
+#endif
+
+#define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT)
+#define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT)
+
+struct wiznet_platform_data {
+ u8 mac_addr[ETH_ALEN];
+};
+
+#endif /* PLATFORM_DATA_WIZNET_H */
--
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
2012-03-28 2:35 ` David Miller
2012-03-30 7:00 ` [PATCH v5 1/2] " Mike Sinkovsky
@ 2012-03-30 7:00 ` Mike Sinkovsky
2012-03-30 9:23 ` Eric Dumazet
2012-03-31 21:23 ` Mark Brown
2012-04-03 10:58 ` [PATCH v6 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
` (2 subsequent siblings)
5 siblings, 2 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-03-30 7:00 UTC (permalink / raw)
To: netdev, linux-kernel; +Cc: Mike Sinkovsky
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v5:
- added driver for WIZnet W5100
---
drivers/net/ethernet/wiznet/Kconfig | 13 +
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5100.c | 799 ++++++++++++++++++++++++++++++++++
3 files changed, 814 insertions(+), 1 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/w5100.c
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
index 7ca5c95..8ad5bfa 100644
--- a/drivers/net/ethernet/wiznet/Kconfig
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -17,6 +17,19 @@ config NET_VENDOR_WIZNET
if NET_VENDOR_WIZNET
+config WIZNET_W5100
+ tristate "WIZnet W5100 Ethernet support"
+ depends on ARM || BLACKFIN
+ ---help---
+ Support for WIZnet W5100 chips.
+
+ W5100 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5100.
+
config WIZNET_W5300
tristate "WIZnet W5300 Ethernet support"
depends on ARM || BLACKFIN
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
index 88e0a3e..c614535 100644
--- a/drivers/net/ethernet/wiznet/Makefile
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_WIZNET_W5100) += w5100.o
obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
new file mode 100644
index 0000000..ce7dfba
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -0,0 +1,799 @@
+/*
+ * Ethernet driver for the WIZnet W5100 chip.
+ *
+ * Copyright (C) 2006-2008 WIZnet Co.,Ltd.
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/skbuff.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "WIZnet W5100"
+#define DRV_VERSION "2012-03-28"
+
+MODULE_DESCRIPTION(DRV_NAME" Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"KBUILD_MODNAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5100_COMM_REGS 0x0000
+#define W5100_MR 0x0000 /* Mode Register */
+#define MR_RST 0x80 /* S/W reset */
+#define MR_PB 0x10 /* Ping block */
+#define MR_AI 0x02 /* Address Auto-Increment */
+#define MR_IND 0x01 /* Indirect mode */
+#define W5100_SHAR 0x0009 /* Source MAC address */
+#define W5100_IR 0x0015 /* Interrupt */
+#define W5100_IMR 0x0016 /* Interrupt Mask */
+#define IR_S0 0x01 /* S0 interrupt */
+#define W5100_RTR 0x0017 /* Retry Time-value Register */
+#define RTR_DEFAULT 2000 /* =0x07d0 (2000) */
+#define W5100_RMSR 0x001a /* Receive memory size */
+#define W5100_TMSR 0x001b /* Transmit memory size */
+#define W5100_COMM_REGS_LEN 0x0040
+
+#define W5100_S0_REGS 0x0400
+#define W5100_S0_MR 0x0400 /* Socket Mode */
+#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
+#define W5100_S0_CR 0x0401 /* Socket Command */
+#define S0_CR_OPEN 0x01 /* OPEN command */
+#define S0_CR_CLOSE 0x10 /* CLOSE command */
+#define S0_CR_SEND 0x21 /* SEND command */
+#define S0_CR_RECV 0x40 /* RECV command */
+#define W5100_S0_IR 0x0402 /* Socket Interrupt */
+#define S0_IR_SENDOK 0x10 /* complete sending */
+#define S0_IR_RECV 0x04 /* receiving data */
+#define W5100_S0_SR 0x0403 /* Socket Status */
+#define S0_SR_MACRAW 0x42 /* mac raw mode socket */
+#define W5100_S0_TX_FSR 0x0420 /* Transmit free memory size */
+#define W5100_S0_TX_RD 0x0422 /* Transmit memory read pointer */
+#define W5100_S0_TX_WR 0x0424 /* Transmit memory write pointer */
+#define W5100_S0_RX_RSR 0x0426 /* Receive free memory size */
+#define W5100_S0_RX_RD 0x0428 /* Receive memory read pointer */
+#define W5100_S0_REGS_LEN 0x0040
+
+#define W5100_TX_MEM_START 0x4000
+#define W5100_TX_MEM_END 0x5fff
+#define W5100_TX_MEM_MASK 0x1fff
+#define W5100_RX_MEM_START 0x6000
+#define W5100_RX_MEM_END 0x7fff
+#define W5100_RX_MEM_MASK 0x1fff
+
+/*
+ * Device driver private data structure
+ */
+struct w5100_priv {
+ void __iomem *base;
+ bool indirect;
+ spinlock_t reg_lock;
+ u8 (*read)(struct w5100_priv *priv, u16 addr);
+ void (*write)(struct w5100_priv *priv, u16 addr, u8 data);
+ u16 (*read16)(struct w5100_priv *priv, u16 addr);
+ void (*write16)(struct w5100_priv *priv, u16 addr, u16 data);
+ void (*readbuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ void (*writebuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5100 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x8000 bytes are required for memory space.
+ */
+static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)
+{
+ return ioread8(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5100_write_direct(struct w5100_priv *priv,
+ u16 addr, u8 data)
+{
+ iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
+{
+ u16 ret;
+ ret = w5100_read_direct(priv, addr) << 8;
+ ret |= w5100_read_direct(priv, addr + 1);
+ return ret;
+}
+
+static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ w5100_write_direct(priv, addr, data >> 8);
+ w5100_write_direct(priv, addr + 1, data);
+}
+
+static void w5100_readbuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END))
+ addr = W5100_RX_MEM_START;
+ *buf++ = w5100_read_direct(priv, addr);
+ }
+}
+
+static void w5100_writebuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END))
+ addr = W5100_TX_MEM_START;
+ w5100_write_direct(priv, addr, *buf++);
+ }
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x04 bytes are required for memory space.
+ */
+#define W5100_IDM_AR 0x01 /* Indirect Mode Address Register */
+#define W5100_IDM_DR 0x03 /* Indirect Mode Data Register */
+
+static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u8 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR) << 8;
+ data |= w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_readbuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = (offset & W5100_RX_MEM_MASK) + W5100_RX_MEM_START;
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END)) {
+ addr = W5100_RX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ *buf++ = w5100_read_direct(priv, W5100_IDM_DR);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_writebuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = (offset & W5100_TX_MEM_MASK) + W5100_TX_MEM_START;
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END)) {
+ addr = W5100_TX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ w5100_write_direct(priv, W5100_IDM_DR, *buf++);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5100_read w5100_read_direct
+#define w5100_write w5100_write_direct
+#define w5100_read16 w5100_read16_direct
+#define w5100_write16 w5100_write16_direct
+#define w5100_readbuf w5100_readbuf_direct
+#define w5100_writebuf w5100_writebuf_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5100_read w5100_read_indirect
+#define w5100_write w5100_write_indirect
+#define w5100_read16 w5100_read16_indirect
+#define w5100_write16 w5100_write16_indirect
+#define w5100_readbuf w5100_readbuf_indirect
+#define w5100_writebuf w5100_writebuf_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5100_read priv->read
+#define w5100_write priv->write
+#define w5100_read16 priv->read16
+#define w5100_write16 priv->write16
+#define w5100_readbuf priv->readbuf
+#define w5100_writebuf priv->writebuf
+#endif
+
+static int w5100_command(struct w5100_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5100_write(priv, W5100_S0_CR, cmd);
+ mmiowb();
+
+ while (w5100_read(priv, W5100_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5100_write_macaddr(struct w5100_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ int i;
+
+ for (i = 0; i < ETH_ALEN; i++)
+ w5100_write(priv, W5100_SHAR + i, ndev->dev_addr[i]);
+ mmiowb();
+}
+
+static void w5100_hw_reset(struct w5100_priv *priv)
+{
+ w5100_write_direct(priv, W5100_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5100_write_direct(priv, W5100_MR, priv->indirect ?
+ MR_PB | MR_AI | MR_IND :
+ MR_PB);
+ mmiowb();
+ w5100_write(priv, W5100_IMR, 0);
+ w5100_write_macaddr(priv);
+
+ /*
+ * Configure 16K of internal memory
+ * as 8K RX buffer and 8K TX buffer
+ */
+ w5100_write(priv, W5100_RMSR, 0x03);
+ w5100_write(priv, W5100_TMSR, 0x03);
+ mmiowb();
+}
+
+static void w5100_hw_start(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ w5100_command(priv, S0_CR_OPEN);
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5100_hw_close(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ w5100_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5100_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5100_get_link(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (priv->link_gpio < 0)
+ return 1;
+
+ return !!gpio_get_value(priv->link_gpio);
+}
+
+static u32 w5100_get_msglevel(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5100_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5100_get_regs_len(struct net_device *ndev)
+{
+ return W5100_COMM_REGS_LEN + W5100_S0_REGS_LEN;
+}
+
+static void w5100_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 i;
+
+ regs->version = 1;
+ for (i = 0; i < W5100_COMM_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_COMM_REGS + i);
+ for (i = 0; i < W5100_S0_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_S0_REGS + i);
+}
+
+static void w5100_tx_timeout(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u16 offset;
+
+ if (w5100_read16(priv, W5100_S0_TX_FSR) < skb->len) {
+ netif_stop_queue(ndev);
+ return NETDEV_TX_BUSY;
+ }
+
+ offset = w5100_read16(priv, W5100_S0_TX_WR);
+ w5100_writebuf(priv, offset, skb->data, skb->len);
+ w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
+ w5100_command(priv, S0_CR_SEND);
+ ndev->stats.tx_bytes += skb->len;
+ ndev->stats.tx_packets++;
+ dev_kfree_skb(skb);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5100_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5100_priv *priv = container_of(napi, struct w5100_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+ u16 offset;
+ u8 header[2];
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u16 rx_buf_len = w5100_read16(priv, W5100_S0_RX_RSR);
+ if (rx_buf_len == 0)
+ break;
+
+ offset = w5100_read16(priv, W5100_S0_RX_RD);
+ w5100_readbuf(priv, offset, header, 2);
+ rx_len = get_unaligned_be16(header) - 2;
+
+ skb = netdev_alloc_skb_ip_align(ndev, rx_len);
+ if (unlikely(!skb)) {
+ w5100_write16(priv, W5100_S0_RX_RD,
+ offset + rx_buf_len);
+ w5100_command(priv, S0_CR_RECV);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5100_readbuf(priv, offset + 2, skb->data, rx_len);
+ w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);
+ mmiowb();
+ w5100_command(priv, S0_CR_RECV);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ int ir = w5100_read(priv, W5100_S0_IR);
+ w5100_write(priv, W5100_S0_IR, ir);
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ if (ir & S0_IR_SENDOK) {
+ if (unlikely(netif_queue_stopped(ndev)))
+ netif_wake_queue(ndev);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5100_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5100_set_rx_mode(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5100_hw_start(priv);
+ }
+}
+
+static int w5100_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5100_write_macaddr(priv);
+ return 0;
+}
+
+static int w5100_open(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5100_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (priv->link_gpio < 0 || gpio_get_value(priv->link_gpio))
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5100_stop(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5100_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5100_ethtool_ops = {
+ .get_drvinfo = w5100_get_drvinfo,
+ .get_msglevel = w5100_get_msglevel,
+ .set_msglevel = w5100_set_msglevel,
+ .get_link = w5100_get_link,
+ .get_regs_len = w5100_get_regs_len,
+ .get_regs = w5100_get_regs,
+};
+
+static const struct net_device_ops w5100_netdev_ops = {
+ .ndo_open = w5100_open,
+ .ndo_stop = w5100_stop,
+ .ndo_start_xmit = w5100_start_tx,
+ .ndo_tx_timeout = w5100_tx_timeout,
+ .ndo_set_rx_mode = w5100_set_rx_mode,
+ .ndo_set_mac_address = w5100_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5100_hw_probe(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *link;
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5100_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5100_read_indirect;
+ priv->write = w5100_write_indirect;
+ priv->read16 = w5100_read16_indirect;
+ priv->write16 = w5100_write16_indirect;
+ priv->readbuf = w5100_readbuf_indirect;
+ priv->writebuf = w5100_writebuf_indirect;
+ } else {
+ priv->read = w5100_read_direct;
+ priv->write = w5100_write_direct;
+ priv->read16 = w5100_read16_direct;
+ priv->write16 = w5100_write16_direct;
+ priv->readbuf = w5100_readbuf_direct;
+ priv->writebuf = w5100_writebuf_direct;
+ }
+ w5100_hw_reset(priv);
+ if (w5100_read16(priv, W5100_RTR) != RTR_DEFAULT)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(&pdev->dev, irq, w5100_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ link = platform_get_resource(pdev, IORESOURCE_IO, 0);
+ if (!link) {
+ priv->link_gpio = -1;
+ } else {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_gpio = link->start;
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_irq(priv->link_irq, w5100_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -1;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5100_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct w5100_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5100_netdev_ops;
+ ndev->ethtool_ops = &w5100_ethtool_ops;
+ ndev->watchdog_timeo = 2 * HZ;
+ netif_napi_add(ndev, &priv->napi, w5100_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+ err = w5100_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ dev_info(&pdev->dev, "probe failed (%d)\n", err);
+ return err;
+}
+
+static int __devexit w5100_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5100_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5100_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5100_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (priv->link_gpio < 0 || gpio_get_value(priv->link_gpio))
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5100_pm_ops, w5100_suspend, w5100_resume);
+
+static struct platform_driver w5100_driver = {
+ .driver = {
+ .name = KBUILD_MODNAME,
+ .owner = THIS_MODULE,
+ .pm = &w5100_pm_ops,
+ },
+ .probe = w5100_probe,
+ .remove = __devexit_p(w5100_remove),
+};
+
+module_platform_driver(w5100_driver);
--
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-30 7:00 ` [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
@ 2012-03-30 9:23 ` Eric Dumazet
2012-03-31 9:40 ` Francois Romieu
2012-03-31 9:52 ` Mike Sinkovsky
2012-03-31 21:23 ` Mark Brown
1 sibling, 2 replies; 49+ messages in thread
From: Eric Dumazet @ 2012-03-30 9:23 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
Le vendredi 30 mars 2012 à 13:00 +0600, Mike Sinkovsky a écrit :
> Tested and used in production with Blackfin BF531 embedded processor.
>
> Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
> ---
> +
> +static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
> +{
> + struct w5100_priv *priv = netdev_priv(ndev);
> + u16 offset;
> +
> + if (w5100_read16(priv, W5100_S0_TX_FSR) < skb->len) {
There is a race here.
Interrupt came come right here before you set the stop_queue()
> + netif_stop_queue(ndev);
So Here I suggest adding a test again
if (w5100_read16(priv, W5100_S0_TX_FSR) >= skb->len)
netif_wake_queue(ndev);
else
return NETDEV_TX_BUSY;
> + return NETDEV_TX_BUSY;
> + }
> +
> + offset = w5100_read16(priv, W5100_S0_TX_WR);
> + w5100_writebuf(priv, offset, skb->data, skb->len);
> + w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
> + w5100_command(priv, S0_CR_SEND);
> + ndev->stats.tx_bytes += skb->len;
> + ndev->stats.tx_packets++;
> + dev_kfree_skb(skb);
> +
> + return NETDEV_TX_OK;
> +}
> +
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-30 9:23 ` Eric Dumazet
@ 2012-03-31 9:40 ` Francois Romieu
2012-03-31 9:46 ` Francois Romieu
2012-03-31 9:52 ` Mike Sinkovsky
1 sibling, 1 reply; 49+ messages in thread
From: Francois Romieu @ 2012-03-31 9:40 UTC (permalink / raw)
To: Eric Dumazet; +Cc: Mike Sinkovsky, netdev, linux-kernel
Eric Dumazet <eric.dumazet@gmail.com> :
> Le vendredi 30 mars 2012 ?? 13:00 +0600, Mike Sinkovsky a ??crit :
> > Tested and used in production with Blackfin BF531 embedded processor.
[...]
> > +static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
> > +{
> > + struct w5100_priv *priv = netdev_priv(ndev);
> > + u16 offset;
> > +
> > + if (w5100_read16(priv, W5100_S0_TX_FSR) < skb->len) {
>
> There is a race here.
>
> Interrupt came come right here before you set the stop_queue()
>
>
> > + netif_stop_queue(ndev);
>
> So Here I suggest adding a test again
>
> if (w5100_read16(priv, W5100_S0_TX_FSR) >= skb->len)
> netif_wake_queue(ndev);
> else
> return NETDEV_TX_BUSY;
The start_tx logic seems broken anyway: it claims it always can take
packets until it is given one it can't process. The driver should rather
do the opposite and stop queueing as soon as there is no guarantee for
the next packet.
--
Ueimor
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-31 9:40 ` Francois Romieu
@ 2012-03-31 9:46 ` Francois Romieu
0 siblings, 0 replies; 49+ messages in thread
From: Francois Romieu @ 2012-03-31 9:46 UTC (permalink / raw)
To: Eric Dumazet; +Cc: Mike Sinkovsky, netdev, linux-kernel
Francois Romieu <romieu@fr.zoreil.com> :
[...]
> The start_tx logic seems broken anyway: it claims it always can take
> packets until it is given one it can't process. The driver should rather
> do the opposite and stop queueing as soon as there is no guarantee for
> the next packet.
Forget it: the driver stops queuing in this path anyway.
--
Ueimor
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-30 9:23 ` Eric Dumazet
2012-03-31 9:40 ` Francois Romieu
@ 2012-03-31 9:52 ` Mike Sinkovsky
2012-03-31 10:24 ` Eric Dumazet
1 sibling, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-03-31 9:52 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev, linux-kernel
30.03.2012 15:23, Eric Dumazet написал:
>> +static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
>> +{
>> + struct w5100_priv *priv = netdev_priv(ndev);
>> + u16 offset;
>> +
>> + if (w5100_read16(priv, W5100_S0_TX_FSR)< skb->len) {
>
> There is a race here.
> Interrupt came come right here before you set the stop_queue()
>
>> + netif_stop_queue(ndev);
>
> So Here I suggest adding a test again
>
> if (w5100_read16(priv, W5100_S0_TX_FSR)>= skb->len)
> netif_wake_queue(ndev);
> else
> return NETDEV_TX_BUSY;
>
>> + return NETDEV_TX_BUSY;
Maybe, but I cannot test this, sorry - when I set breakpoint on this
branch - it never triggered, on all my tests on all boards.
Appears that my processor is too slow and cannot feed packets fast enough.
But will do, maybe it triggers for someone on fastest processors.
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-31 9:52 ` Mike Sinkovsky
@ 2012-03-31 10:24 ` Eric Dumazet
0 siblings, 0 replies; 49+ messages in thread
From: Eric Dumazet @ 2012-03-31 10:24 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Sat, 2012-03-31 at 15:52 +0600, Mike Sinkovsky wrote:
> Maybe, but I cannot test this, sorry - when I set breakpoint on this
> branch - it never triggered, on all my tests on all boards.
> Appears that my processor is too slow and cannot feed packets fast enough.
Really ?
A pktgen script should certainly hit your NIC limit, unless this is a
100Gbit link ...
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-30 7:00 ` [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
2012-03-30 9:23 ` Eric Dumazet
@ 2012-03-31 21:23 ` Mark Brown
2012-04-02 9:40 ` Mike Sinkovsky
1 sibling, 1 reply; 49+ messages in thread
From: Mark Brown @ 2012-03-31 21:23 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Fri, Mar 30, 2012 at 01:00:06PM +0600, Mike Sinkovsky wrote:
> +config WIZNET_W5100
> + tristate "WIZnet W5100 Ethernet support"
> + depends on ARM || BLACKFIN
What are the architecture dependencies here?
> +static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
> +{
> + struct net_device *ndev = ndev_instance;
> + struct w5100_priv *priv = netdev_priv(ndev);
> +
> + int ir = w5100_read(priv, W5100_S0_IR);
> + w5100_write(priv, W5100_S0_IR, ir);
> +
> + if (ir & S0_IR_RECV) {
> + if (napi_schedule_prep(&priv->napi)) {
> + w5100_write(priv, W5100_IMR, 0);
> + mmiowb();
> + __napi_schedule(&priv->napi);
> + }
> + }
> +
> + if (ir & S0_IR_SENDOK) {
> + if (unlikely(netif_queue_stopped(ndev)))
> + netif_wake_queue(ndev);
> + }
> +
> + return IRQ_HANDLED;
This unconditionally acknowledges the interrupt even if one wasn't
reported by the device.
> + irq = platform_get_irq(pdev, 0);
> + if (irq < 0)
> + return irq;
> + ret = devm_request_irq(&pdev->dev, irq, w5100_interrupt,
> + IRQ_TYPE_LEVEL_LOW, name, ndev);
> + if (ret < 0)
> + return ret;
> + priv->irq = irq;
> +
> + link = platform_get_resource(pdev, IORESOURCE_IO, 0);
> + if (!link) {
> + priv->link_gpio = -1;
This is rather an abuse of the resource API and will run into trouble on
device tree based systems. You should use platform data for non-DT
systems.
> + if (request_irq(priv->link_irq, w5100_detect_link,
> + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
> + link_name, priv->ndev) < 0)
Suggest using request_any_context_irq() to increase the range of
supported interrupt controllers.
> +err_register:
> + free_netdev(ndev);
> + platform_set_drvdata(pdev, NULL);
> + dev_info(&pdev->dev, "probe failed (%d)\n", err);
This will be done for you by the driver core.
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v5 1/2] Ethernet driver for the WIZnet W5300 chip
2012-03-30 7:00 ` [PATCH v5 1/2] " Mike Sinkovsky
@ 2012-03-31 21:45 ` Mark Brown
0 siblings, 0 replies; 49+ messages in thread
From: Mark Brown @ 2012-03-31 21:45 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Fri, Mar 30, 2012 at 01:00:05PM +0600, Mike Sinkovsky wrote:
> Based on original driver from chip manufacturer, but nearly full rewite.
>
> Tested and used in production with Blackfin BF531 embedded processor.
My comments on the other WIZnet driver look like they apply to this one
too.
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-31 21:23 ` Mark Brown
@ 2012-04-02 9:40 ` Mike Sinkovsky
2012-04-02 11:21 ` Mark Brown
0 siblings, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-02 9:40 UTC (permalink / raw)
To: Mark Brown; +Cc: netdev, linux-kernel
01.04.2012 3:23, Mark Brown wrote:
> On Fri, Mar 30, 2012 at 01:00:06PM +0600, Mike Sinkovsky wrote:
>
>> +config WIZNET_W5100
>> + tristate "WIZnet W5100 Ethernet support"
>> + depends on ARM || BLACKFIN
>
> What are the architecture dependencies here?
Original driver from chip manufacturer was written for ARM, and now we
use it on Blackfin.
Completely untested on other arch's, but should work. Maybe.
>> +static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
>> +{
>> + struct net_device *ndev = ndev_instance;
>> + struct w5100_priv *priv = netdev_priv(ndev);
>> +
>> + int ir = w5100_read(priv, W5100_S0_IR);
>> + w5100_write(priv, W5100_S0_IR, ir);
>> +
>> + if (ir& S0_IR_RECV) {
>> + if (napi_schedule_prep(&priv->napi)) {
>> + w5100_write(priv, W5100_IMR, 0);
>> + mmiowb();
>> + __napi_schedule(&priv->napi);
>> + }
>> + }
>> +
>> + if (ir& S0_IR_SENDOK) {
>> + if (unlikely(netif_queue_stopped(ndev)))
>> + netif_wake_queue(ndev);
>> + }
>> +
>> + return IRQ_HANDLED;
>
> This unconditionally acknowledges the interrupt even if one wasn't
> reported by the device.
Hm? Don't get you.
W5100_S0_IR register is R/W1C - writing back clears it.
Or what do you mean?
>> + irq = platform_get_irq(pdev, 0);
>> + if (irq< 0)
>> + return irq;
>> + ret = devm_request_irq(&pdev->dev, irq, w5100_interrupt,
>> + IRQ_TYPE_LEVEL_LOW, name, ndev);
>> + if (ret< 0)
>> + return ret;
>> + priv->irq = irq;
>> +
>> + link = platform_get_resource(pdev, IORESOURCE_IO, 0);
>> + if (!link) {
>> + priv->link_gpio = -1;
>
> This is rather an abuse of the resource API and will run into trouble on
> device tree based systems. You should use platform data for non-DT
> systems.
Ok, will move it to struct wiznet_platform_data.
But here is downside - this gpio is optional, and if board doesn't have
it - it must be initialized as negative value, not just omitted.
>> + if (request_irq(priv->link_irq, w5100_detect_link,
>> + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
>> + link_name, priv->ndev)< 0)
>
> Suggest using request_any_context_irq() to increase the range of
> supported interrupt controllers.
Could it be anything but hard irq?
But there is another bug - it should be devm_request_irq...
:)
>> +err_register:
>> + free_netdev(ndev);
>> + platform_set_drvdata(pdev, NULL);
>> + dev_info(&pdev->dev, "probe failed (%d)\n", err);
>
> This will be done for you by the driver core.
You mean platform_set_drvdata() and dev_info()? Maybe.
I'm sure platform_driver will not do free_netdev() for me.
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip
2012-04-02 9:40 ` Mike Sinkovsky
@ 2012-04-02 11:21 ` Mark Brown
0 siblings, 0 replies; 49+ messages in thread
From: Mark Brown @ 2012-04-02 11:21 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2656 bytes --]
On Mon, Apr 02, 2012 at 03:40:18PM +0600, Mike Sinkovsky wrote:
> 01.04.2012 3:23, Mark Brown wrote:
> >On Fri, Mar 30, 2012 at 01:00:06PM +0600, Mike Sinkovsky wrote:
> >>+config WIZNET_W5100
> >>+ tristate "WIZnet W5100 Ethernet support"
> >>+ depends on ARM || BLACKFIN
> >What are the architecture dependencies here?
> Original driver from chip manufacturer was written for ARM, and now
> we use it on Blackfin.
> Completely untested on other arch's, but should work. Maybe.
Remove the dependency then. If there's an issue people can fix it.
> >>+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
> >>+{
> >>+ struct net_device *ndev = ndev_instance;
> >>+ struct w5100_priv *priv = netdev_priv(ndev);
> >>+
> >>+ int ir = w5100_read(priv, W5100_S0_IR);
> >>+ w5100_write(priv, W5100_S0_IR, ir);
> >>+
> >>+ if (ir& S0_IR_RECV) {
> >>+ if (napi_schedule_prep(&priv->napi)) {
> >>+ w5100_write(priv, W5100_IMR, 0);
> >>+ mmiowb();
> >>+ __napi_schedule(&priv->napi);
> >>+ }
> >>+ }
> >>+
> >>+ if (ir& S0_IR_SENDOK) {
> >>+ if (unlikely(netif_queue_stopped(ndev)))
> >>+ netif_wake_queue(ndev);
> >>+ }
> >>+
> >>+ return IRQ_HANDLED;
> >This unconditionally acknowledges the interrupt even if one wasn't
> >reported by the device.
> Hm? Don't get you.
> W5100_S0_IR register is R/W1C - writing back clears it.
> Or what do you mean?
If you read back and no interrupts are flagged (all bits in the IRQ
status register clear) you'll still return IRQ_HANDLED.
> >This is rather an abuse of the resource API and will run into trouble on
> >device tree based systems. You should use platform data for non-DT
> >systems.
> Ok, will move it to struct wiznet_platform_data.
> But here is downside - this gpio is optional, and if board doesn't
> have it - it must be initialized as negative value, not just
> omitted.
Sure, this is all totally standard to the Linux GPIO framework.
Realistically treating 0 as an invalid GPIO should be fine.
> >>+ if (request_irq(priv->link_irq, w5100_detect_link,
> >>+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
> >>+ link_name, priv->ndev)< 0)
> >Suggest using request_any_context_irq() to increase the range of
> >supported interrupt controllers.
> Could it be anything but hard irq?
It could be a threaded IRQ (if the interrupt controller can't be
accessed from hard IRQ context).
> >>+ platform_set_drvdata(pdev, NULL);
> >>+ dev_info(&pdev->dev, "probe failed (%d)\n", err);
> >This will be done for you by the driver core.
> You mean platform_set_drvdata() and dev_info()? Maybe.
> I'm sure platform_driver will not do free_netdev() for me.
The error logging.
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v6 0/2] Ethernet drivers for WIZnet chips
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
` (2 preceding siblings ...)
2012-03-30 7:00 ` [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
@ 2012-04-03 10:58 ` Mike Sinkovsky
2012-04-03 11:39 ` Eric Dumazet
` (3 more replies)
2012-04-03 10:58 ` [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-03 10:58 ` [PATCH v6 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
5 siblings, 4 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-03 10:58 UTC (permalink / raw)
To: netdev, linux-kernel; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v6:
- remove (S0_TX_FSR < skb->len) check in TX handler, it doesn't work
anyway. Chip can transmit only one frame with MTU 1500 at a time,
and tx buffer size is bigger.
- remove dependency (ARM || BLACKFIN) - should work on any arch
- interrupt handler returns IRQ_NONE if status register is zero
- use devm_request_threaded_irq for request detect_link handler
- remove dev_info if probe failed
v5:
- added driver for WIZnet W5100
- disabled VLAN (NETIF_F_VLAN_CHALLENGED)
v4:
- netif_stop_queue if tx fifo is full, netif_wake_queue in interrupt
- use netif_info macro
v3:
- reading macaddr from platform_data
- ethtool: get_link, get_msglevel, set_msglevel
- more cleanups
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
` (3 preceding siblings ...)
2012-04-03 10:58 ` [PATCH v6 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
@ 2012-04-03 10:58 ` Mike Sinkovsky
2012-04-03 13:36 ` Mark Brown
2012-04-03 10:58 ` [PATCH v6 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
5 siblings, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-03 10:58 UTC (permalink / raw)
To: netdev, linux-kernel; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/wiznet/Kconfig | 58 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 703 ++++++++++++++++++++++++++++++++++
include/linux/platform_data/wiznet.h | 24 ++
6 files changed, 788 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
create mode 100644 include/linux/platform_data/wiznet.h
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index c63a64c..a11af5c 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -174,6 +174,7 @@ source "drivers/net/ethernet/tile/Kconfig"
source "drivers/net/ethernet/toshiba/Kconfig"
source "drivers/net/ethernet/tundra/Kconfig"
source "drivers/net/ethernet/via/Kconfig"
+source "drivers/net/ethernet/wiznet/Kconfig"
source "drivers/net/ethernet/xilinx/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 9676a51..878ad32 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -73,5 +73,6 @@ obj-$(CONFIG_TILE_NET) += tile/
obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
obj-$(CONFIG_NET_VENDOR_VIA) += via/
+obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..d7a7b1f
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,58 @@
+#
+# WIZnet devices configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access all registers
+ after mapping to Memory-Mapped I/O space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers
+ using Indirect Mode Address Register and Indirect Mode Data Register,
+ which are directly mapped to Memory-Mapped I/O space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, it can be selected
+ in runtime from board/platform resources configuration.
+
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..113ef7c
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,703 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5300"
+#define DRV_VERSION "2012-03-30"
+
+MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5300_MR 0x0000 /* Mode Register */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+#define W5300_IR 0x0002 /* Interrupt Register */
+#define W5300_IMR 0x0004 /* Interrupt Mask Register */
+#define IR_S0 0x0001 /* S0 interrupt */
+#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
+#define W5300_SHARH 0x000c /* Source MAC address (45) */
+#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
+#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
+#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
+#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
+#define W5300_MTYPE 0x0030 /* Memory Type */
+#define W5300_IDR 0x00fe /* Chip ID register */
+#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
+#define W5300_S0_MR 0x0200 /* S0 Mode Register */
+#define S0_MR_CLOSED 0x0000 /* Close mode */
+#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
+#define W5300_S0_CR 0x0202 /* S0 Command Register */
+#define S0_CR_OPEN 0x0001 /* OPEN command */
+#define S0_CR_CLOSE 0x0010 /* CLOSE command */
+#define S0_CR_SEND 0x0020 /* SEND command */
+#define S0_CR_RECV 0x0040 /* RECV command */
+#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
+#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
+#define S0_IR_RECV 0x0004 /* Receive interrupt */
+#define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
+#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
+#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
+#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
+#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
+#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
+#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
+#define W5300_REGS_LEN 0x0400
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u16 (*read) (struct w5300_priv *priv, u16 addr);
+ void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
+{
+ return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5300_write_direct(struct w5300_priv *priv,
+ u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
+#define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
+
+static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ data = w5300_read_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ w5300_write_direct(priv, W5300_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5300_read w5300_read_direct
+#define w5300_write w5300_write_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5300_read w5300_read_indirect
+#define w5300_write w5300_write_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5300_read priv->read
+#define w5300_write priv->write
+#endif
+
+static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
+{
+ u32 data;
+ data = w5300_read(priv, addr) << 16;
+ data |= w5300_read(priv, addr + 2);
+ return data;
+}
+
+static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
+{
+ w5300_write(priv, addr, data >> 16);
+ w5300_write(priv, addr + 2, data);
+}
+
+static int w5300_command(struct w5300_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5300_write(priv, W5300_S0_CR, cmd);
+ mmiowb();
+
+ while (w5300_read(priv, W5300_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ *buf++ = fifo >> 8;
+ *buf++ = fifo;
+ }
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+}
+
+static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = *buf++ << 8;
+ fifo |= *buf++;
+ w5300_write(priv, W5300_S0_TX_FIFO, fifo);
+ }
+ w5300_write32(priv, W5300_S0_TX_WRSR, len);
+}
+
+static void w5300_write_macaddr(struct w5300_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ w5300_write32(priv, W5300_SHARL,
+ ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ w5300_write(priv, W5300_SHARH,
+ ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+ mmiowb();
+}
+
+static void w5300_hw_reset(struct w5300_priv *priv)
+{
+ w5300_write_direct(priv, W5300_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5300_write_direct(priv, W5300_MR, priv->indirect ?
+ MR_WDF(7) | MR_PB | MR_IND :
+ MR_WDF(7) | MR_PB);
+ mmiowb();
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_write_macaddr(priv);
+
+ /* Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ w5300_write32(priv, W5300_RMSRL, 64 << 24);
+ w5300_write32(priv, W5300_RMSRH, 0);
+ w5300_write32(priv, W5300_TMSRL, 64 << 24);
+ w5300_write32(priv, W5300_TMSRH, 0);
+ w5300_write(priv, W5300_MTYPE, 0x00ff);
+ mmiowb();
+}
+
+static void w5300_hw_start(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5300_command(priv, S0_CR_OPEN);
+ w5300_write(priv, W5300_S0_IMR, S0_IR_RECV);
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5300_hw_close(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ w5300_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5300_get_link(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5300_get_msglevel(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5300_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
+ case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
+ data = 0xffff;
+ break;
+ default:
+ data = w5300_read(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ w5300_write_frame(priv, skb->data, skb->len);
+ mmiowb();
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+
+ w5300_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
+ if (rx_fifo_len == 0)
+ break;
+
+ rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
+
+ skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
+ if (unlikely(!skb)) {
+ u32 i;
+ for (i = 0; i < rx_fifo_len; i += 2)
+ w5300_read(priv, W5300_S0_RX_FIFO);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5300_read_frame(priv, skb->data, rx_len);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ int ir = w5300_read(priv, W5300_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5300_write(priv, W5300_S0_IR, ir);
+ mmiowb();
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5300_hw_start(priv);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5300_write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5300_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5300_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_msglevel = w5300_get_msglevel,
+ .set_msglevel = w5300_set_msglevel,
+ .get_link = w5300_get_link,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5300_read_indirect;
+ priv->write = w5300_write_indirect;
+ } else {
+ priv->read = w5300_read_direct;
+ priv->write = w5300_write_direct;
+ }
+
+ w5300_hw_reset(priv);
+ if (w5300_read(priv, W5300_IDR) != IDR_W5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(&pdev->dev, irq, w5300_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (devm_request_threaded_irq(&pdev->dev,
+ priv->link_irq, NULL, w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct w5300_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5300_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5300_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (!netif_running(ndev)) {
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
+
+static struct platform_driver w5300_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5300_pm_ops,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+};
+
+module_platform_driver(w5300_driver);
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 0000000..b5d8c19
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,24 @@
+/*
+ * Ethernet driver for the WIZnet W5x00 chip.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef PLATFORM_DATA_WIZNET_H
+#define PLATFORM_DATA_WIZNET_H
+
+#include <linux/if_ether.h>
+
+struct wiznet_platform_data {
+ int link_gpio;
+ u8 mac_addr[ETH_ALEN];
+};
+
+#ifndef CONFIG_WIZNET_BUS_SHIFT
+#define CONFIG_WIZNET_BUS_SHIFT 0
+#endif
+
+#define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT)
+#define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT)
+
+#endif /* PLATFORM_DATA_WIZNET_H */
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH v6 2/2] Ethernet driver for the WIZnet W5100 chip
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
` (4 preceding siblings ...)
2012-04-03 10:58 ` [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
@ 2012-04-03 10:58 ` Mike Sinkovsky
5 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-03 10:58 UTC (permalink / raw)
To: netdev, linux-kernel; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/wiznet/Kconfig | 12 +
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5100.c | 792 ++++++++++++++++++++++++++++++++++
3 files changed, 805 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/w5100.c
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
index d7a7b1f..2fc9194 100644
--- a/drivers/net/ethernet/wiznet/Kconfig
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -17,6 +17,18 @@ config NET_VENDOR_WIZNET
if NET_VENDOR_WIZNET
+config WIZNET_W5100
+ tristate "WIZnet W5100 Ethernet support"
+ ---help---
+ Support for WIZnet W5100 chips.
+
+ W5100 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5100.
+
config WIZNET_W5300
tristate "WIZnet W5300 Ethernet support"
---help---
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
index 88e0a3e..c614535 100644
--- a/drivers/net/ethernet/wiznet/Makefile
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_WIZNET_W5100) += w5100.o
obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
new file mode 100644
index 0000000..d6bf99b
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -0,0 +1,792 @@
+/*
+ * Ethernet driver for the WIZnet W5100 chip.
+ *
+ * Copyright (C) 2006-2008 WIZnet Co.,Ltd.
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5100"
+#define DRV_VERSION "2012-03-30"
+
+MODULE_DESCRIPTION("WIZnet W5100 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5100_COMMON_REGS 0x0000
+#define W5100_MR 0x0000 /* Mode Register */
+#define MR_RST 0x80 /* S/W reset */
+#define MR_PB 0x10 /* Ping block */
+#define MR_AI 0x02 /* Address Auto-Increment */
+#define MR_IND 0x01 /* Indirect mode */
+#define W5100_SHAR 0x0009 /* Source MAC address */
+#define W5100_IR 0x0015 /* Interrupt Register */
+#define W5100_IMR 0x0016 /* Interrupt Mask Register */
+#define IR_S0 0x01 /* S0 interrupt */
+#define W5100_RTR 0x0017 /* Retry Time-value Register */
+#define RTR_DEFAULT 2000 /* =0x07d0 (2000) */
+#define W5100_RMSR 0x001a /* Receive Memory Size */
+#define W5100_TMSR 0x001b /* Transmit Memory Size */
+#define W5100_COMMON_REGS_LEN 0x0040
+
+#define W5100_S0_REGS 0x0400
+#define W5100_S0_MR 0x0400 /* S0 Mode Register */
+#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
+#define W5100_S0_CR 0x0401 /* S0 Command Register */
+#define S0_CR_OPEN 0x01 /* OPEN command */
+#define S0_CR_CLOSE 0x10 /* CLOSE command */
+#define S0_CR_SEND 0x20 /* SEND command */
+#define S0_CR_RECV 0x40 /* RECV command */
+#define W5100_S0_IR 0x0402 /* S0 Interrupt Register */
+#define S0_IR_SENDOK 0x10 /* complete sending */
+#define S0_IR_RECV 0x04 /* receiving data */
+#define W5100_S0_SR 0x0403 /* S0 Status Register */
+#define S0_SR_MACRAW 0x42 /* mac raw mode */
+#define W5100_S0_TX_FSR 0x0420 /* S0 Transmit free memory size */
+#define W5100_S0_TX_RD 0x0422 /* S0 Transmit memory read pointer */
+#define W5100_S0_TX_WR 0x0424 /* S0 Transmit memory write pointer */
+#define W5100_S0_RX_RSR 0x0426 /* S0 Receive free memory size */
+#define W5100_S0_RX_RD 0x0428 /* S0 Receive memory read pointer */
+#define W5100_S0_REGS_LEN 0x0040
+
+#define W5100_TX_MEM_START 0x4000
+#define W5100_TX_MEM_END 0x5fff
+#define W5100_TX_MEM_MASK 0x1fff
+#define W5100_RX_MEM_START 0x6000
+#define W5100_RX_MEM_END 0x7fff
+#define W5100_RX_MEM_MASK 0x1fff
+
+/*
+ * Device driver private data structure
+ */
+struct w5100_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u8 (*read)(struct w5100_priv *priv, u16 addr);
+ void (*write)(struct w5100_priv *priv, u16 addr, u8 data);
+ u16 (*read16)(struct w5100_priv *priv, u16 addr);
+ void (*write16)(struct w5100_priv *priv, u16 addr, u16 data);
+ void (*readbuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ void (*writebuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5100 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x8000 bytes are required for memory space.
+ */
+static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)
+{
+ return ioread8(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5100_write_direct(struct w5100_priv *priv,
+ u16 addr, u8 data)
+{
+ iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
+{
+ u16 data;
+ data = w5100_read_direct(priv, addr) << 8;
+ data |= w5100_read_direct(priv, addr + 1);
+ return data;
+}
+
+static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ w5100_write_direct(priv, addr, data >> 8);
+ w5100_write_direct(priv, addr + 1, data);
+}
+
+static void w5100_readbuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END))
+ addr = W5100_RX_MEM_START;
+ *buf++ = w5100_read_direct(priv, addr);
+ }
+}
+
+static void w5100_writebuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END))
+ addr = W5100_TX_MEM_START;
+ w5100_write_direct(priv, addr, *buf++);
+ }
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x04 bytes are required for memory space.
+ */
+#define W5100_IDM_AR 0x01 /* Indirect Mode Address Register */
+#define W5100_IDM_DR 0x03 /* Indirect Mode Data Register */
+
+static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u8 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR) << 8;
+ data |= w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_readbuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END)) {
+ addr = W5100_RX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ *buf++ = w5100_read_direct(priv, W5100_IDM_DR);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_writebuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END)) {
+ addr = W5100_TX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ w5100_write_direct(priv, W5100_IDM_DR, *buf++);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5100_read w5100_read_direct
+#define w5100_write w5100_write_direct
+#define w5100_read16 w5100_read16_direct
+#define w5100_write16 w5100_write16_direct
+#define w5100_readbuf w5100_readbuf_direct
+#define w5100_writebuf w5100_writebuf_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5100_read w5100_read_indirect
+#define w5100_write w5100_write_indirect
+#define w5100_read16 w5100_read16_indirect
+#define w5100_write16 w5100_write16_indirect
+#define w5100_readbuf w5100_readbuf_indirect
+#define w5100_writebuf w5100_writebuf_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5100_read priv->read
+#define w5100_write priv->write
+#define w5100_read16 priv->read16
+#define w5100_write16 priv->write16
+#define w5100_readbuf priv->readbuf
+#define w5100_writebuf priv->writebuf
+#endif
+
+static int w5100_command(struct w5100_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5100_write(priv, W5100_S0_CR, cmd);
+ mmiowb();
+
+ while (w5100_read(priv, W5100_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5100_write_macaddr(struct w5100_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ int i;
+
+ for (i = 0; i < ETH_ALEN; i++)
+ w5100_write(priv, W5100_SHAR + i, ndev->dev_addr[i]);
+ mmiowb();
+}
+
+static void w5100_hw_reset(struct w5100_priv *priv)
+{
+ w5100_write_direct(priv, W5100_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5100_write_direct(priv, W5100_MR, priv->indirect ?
+ MR_PB | MR_AI | MR_IND :
+ MR_PB);
+ mmiowb();
+ w5100_write(priv, W5100_IMR, 0);
+ w5100_write_macaddr(priv);
+
+ /* Configure 16K of internal memory
+ * as 8K RX buffer and 8K TX buffer
+ */
+ w5100_write(priv, W5100_RMSR, 0x03);
+ w5100_write(priv, W5100_TMSR, 0x03);
+ mmiowb();
+}
+
+static void w5100_hw_start(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5100_command(priv, S0_CR_OPEN);
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5100_hw_close(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ w5100_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5100_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5100_get_link(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5100_get_msglevel(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5100_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5100_get_regs_len(struct net_device *ndev)
+{
+ return W5100_COMMON_REGS_LEN + W5100_S0_REGS_LEN;
+}
+
+static void w5100_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 i;
+
+ regs->version = 1;
+ for (i = 0; i < W5100_COMMON_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_COMMON_REGS + i);
+ for (i = 0; i < W5100_S0_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_S0_REGS + i);
+}
+
+static void w5100_tx_timeout(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u16 offset;
+
+ offset = w5100_read16(priv, W5100_S0_TX_WR);
+ w5100_writebuf(priv, offset, skb->data, skb->len);
+ w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
+ mmiowb();
+ ndev->stats.tx_bytes += skb->len;
+ ndev->stats.tx_packets++;
+ dev_kfree_skb(skb);
+
+ w5100_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5100_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5100_priv *priv = container_of(napi, struct w5100_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+ u16 offset;
+ u8 header[2];
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u16 rx_buf_len = w5100_read16(priv, W5100_S0_RX_RSR);
+ if (rx_buf_len == 0)
+ break;
+
+ offset = w5100_read16(priv, W5100_S0_RX_RD);
+ w5100_readbuf(priv, offset, header, 2);
+ rx_len = get_unaligned_be16(header) - 2;
+
+ skb = netdev_alloc_skb_ip_align(ndev, rx_len);
+ if (unlikely(!skb)) {
+ w5100_write16(priv, W5100_S0_RX_RD,
+ offset + rx_buf_len);
+ w5100_command(priv, S0_CR_RECV);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5100_readbuf(priv, offset + 2, skb->data, rx_len);
+ w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);
+ mmiowb();
+ w5100_command(priv, S0_CR_RECV);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ int ir = w5100_read(priv, W5100_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5100_write(priv, W5100_S0_IR, ir);
+ mmiowb();
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5100_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5100_set_rx_mode(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5100_hw_start(priv);
+ }
+}
+
+static int w5100_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5100_write_macaddr(priv);
+ return 0;
+}
+
+static int w5100_open(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5100_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5100_stop(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5100_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5100_ethtool_ops = {
+ .get_drvinfo = w5100_get_drvinfo,
+ .get_msglevel = w5100_get_msglevel,
+ .set_msglevel = w5100_set_msglevel,
+ .get_link = w5100_get_link,
+ .get_regs_len = w5100_get_regs_len,
+ .get_regs = w5100_get_regs,
+};
+
+static const struct net_device_ops w5100_netdev_ops = {
+ .ndo_open = w5100_open,
+ .ndo_stop = w5100_stop,
+ .ndo_start_xmit = w5100_start_tx,
+ .ndo_tx_timeout = w5100_tx_timeout,
+ .ndo_set_rx_mode = w5100_set_rx_mode,
+ .ndo_set_mac_address = w5100_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5100_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5100_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5100_read_indirect;
+ priv->write = w5100_write_indirect;
+ priv->read16 = w5100_read16_indirect;
+ priv->write16 = w5100_write16_indirect;
+ priv->readbuf = w5100_readbuf_indirect;
+ priv->writebuf = w5100_writebuf_indirect;
+ } else {
+ priv->read = w5100_read_direct;
+ priv->write = w5100_write_direct;
+ priv->read16 = w5100_read16_direct;
+ priv->write16 = w5100_write16_direct;
+ priv->readbuf = w5100_readbuf_direct;
+ priv->writebuf = w5100_writebuf_direct;
+ }
+
+ w5100_hw_reset(priv);
+ if (w5100_read16(priv, W5100_RTR) != RTR_DEFAULT)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(&pdev->dev, irq, w5100_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (devm_request_threaded_irq(&pdev->dev,
+ priv->link_irq, NULL, w5100_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5100_probe(struct platform_device *pdev)
+{
+ struct w5100_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5100_netdev_ops;
+ ndev->ethtool_ops = &w5100_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5100_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5100_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5100_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5100_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5100_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5100_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5100_pm_ops, w5100_suspend, w5100_resume);
+
+static struct platform_driver w5100_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5100_pm_ops,
+ },
+ .probe = w5100_probe,
+ .remove = __devexit_p(w5100_remove),
+};
+
+module_platform_driver(w5100_driver);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH v6 0/2] Ethernet drivers for WIZnet chips
2012-04-03 10:58 ` [PATCH v6 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
@ 2012-04-03 11:39 ` Eric Dumazet
2012-04-03 12:15 ` Mike Sinkovsky
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
` (2 subsequent siblings)
3 siblings, 1 reply; 49+ messages in thread
From: Eric Dumazet @ 2012-04-03 11:39 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Tue, 2012-04-03 at 16:58 +0600, Mike Sinkovsky wrote:
> Based on original driver from chip manufacturer, but nearly full rewite.
> Tested and used in production with Blackfin BF531 embedded processor.
>
> Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
> ---
> v6:
> - remove (S0_TX_FSR < skb->len) check in TX handler, it doesn't work
> anyway. Chip can transmit only one frame with MTU 1500 at a time,
> and tx buffer size is bigger.
So what happens if XXX frames are given to start_xmit() in a flood ?
You removed any flow control, how can this work ?
Device has an infinite queue ?
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v6 0/2] Ethernet drivers for WIZnet chips
2012-04-03 11:39 ` Eric Dumazet
@ 2012-04-03 12:15 ` Mike Sinkovsky
2012-04-03 12:29 ` Eric Dumazet
0 siblings, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-03 12:15 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev, linux-kernel
03.04.2012 17:39, Eric Dumazet написал:
> On Tue, 2012-04-03 at 16:58 +0600, Mike Sinkovsky wrote:
>> Based on original driver from chip manufacturer, but nearly full rewite.
>> Tested and used in production with Blackfin BF531 embedded processor.
>>
>> Signed-off-by: Mike Sinkovsky<msink@permonline.ru>
>> ---
>> v6:
>> - remove (S0_TX_FSR< skb->len) check in TX handler, it doesn't work
>> anyway. Chip can transmit only one frame with MTU 1500 at a time,
>> and tx buffer size is bigger.
>
> So what happens if XXX frames are given to start_xmit() in a flood ?
>
> You removed any flow control, how can this work ?
>
> Device has an infinite queue ?
As I understand from datasheet, device doesn't have tx queue at all.
It have tx buffer, processor must save transmitted frame to it, and then
save SEND command to command register. When transmission completed,
SENDOK bit in interrupt register will be set to '1', and interrupt
handler will be called.
So, according to datasheet, driver must stop queue in start_xmit()
routine, and wake in interrupt handler of SENDOK bit.
I tried this, and it basically works, but SOMETIMES, very rare, I see
tx_timeout().
And without any flow control - driver works perfectly.
Weird, don't know why.
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v6 0/2] Ethernet drivers for WIZnet chips
2012-04-03 12:15 ` Mike Sinkovsky
@ 2012-04-03 12:29 ` Eric Dumazet
2012-04-04 5:58 ` Mike Sinkovsky
0 siblings, 1 reply; 49+ messages in thread
From: Eric Dumazet @ 2012-04-03 12:29 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Tue, 2012-04-03 at 18:15 +0600, Mike Sinkovsky wrote:
> 03.04.2012 17:39, Eric Dumazet написал:
> > On Tue, 2012-04-03 at 16:58 +0600, Mike Sinkovsky wrote:
> >> Based on original driver from chip manufacturer, but nearly full rewite.
> >> Tested and used in production with Blackfin BF531 embedded processor.
> >>
> >> Signed-off-by: Mike Sinkovsky<msink@permonline.ru>
> >> ---
> >> v6:
> >> - remove (S0_TX_FSR< skb->len) check in TX handler, it doesn't work
> >> anyway. Chip can transmit only one frame with MTU 1500 at a time,
> >> and tx buffer size is bigger.
> >
> > So what happens if XXX frames are given to start_xmit() in a flood ?
> >
> > You removed any flow control, how can this work ?
> >
> > Device has an infinite queue ?
>
> As I understand from datasheet, device doesn't have tx queue at all.
> It have tx buffer, processor must save transmitted frame to it, and then
> save SEND command to command register. When transmission completed,
> SENDOK bit in interrupt register will be set to '1', and interrupt
> handler will be called.
>
> So, according to datasheet, driver must stop queue in start_xmit()
> routine, and wake in interrupt handler of SENDOK bit.
> I tried this, and it basically works, but SOMETIMES, very rare, I see
> tx_timeout().
>
> And without any flow control - driver works perfectly.
> Weird, don't know why.
Really this should be fixed, since your driver makes qdisc flow control
impossible (unless adding a rate limiter like HTB/CBQ)
You probably had a race on your xmit routine, and interrupt routine.
You need proper synchronization : A spinlock to make this easy, or a
smart barrier game.
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip
2012-04-03 10:58 ` [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
@ 2012-04-03 13:36 ` Mark Brown
2012-04-04 6:18 ` Mike Sinkovsky
0 siblings, 1 reply; 49+ messages in thread
From: Mark Brown @ 2012-04-03 13:36 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Tue, Apr 03, 2012 at 04:58:45PM +0600, Mike Sinkovsky wrote:
> +static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
> +{
> + struct net_device *ndev = ndev_instance;
> + struct w5300_priv *priv = netdev_priv(ndev);
> +
> + if (netif_running(ndev)) {
> + if (gpio_get_value(priv->link_gpio) != 0) {
> + netif_info(priv, link, ndev, "link is up\n");
> + netif_carrier_on(ndev);
> + } else {
> + netif_info(priv, link, ndev, "link is down\n");
> + netif_carrier_off(ndev);
> + }
> + }
> +
> + return IRQ_HANDLED;
> +}
This relies on ndev being valid and on the gpio being requested but...
> + priv->link_gpio = data->link_gpio;
> + if (gpio_is_valid(priv->link_gpio)) {
> + char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
> + if (!link_name)
> + return -ENOMEM;
> + snprintf(link_name, 16, "%s-link", name);
> + priv->link_irq = gpio_to_irq(priv->link_gpio);
> + if (devm_request_threaded_irq(&pdev->dev,
> + priv->link_irq, NULL, w5300_detect_link,
> + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
> + link_name, priv->ndev) < 0)
> + priv->link_gpio = -EINVAL;
> + }
...you use devm_request_threaded_irq() here and rely on it for cleanup.
Are you sure there's no possibility of the interrupt firing after you
start to tear down the device?
By using a specifically threaded IRQ you're also adding a performance
overhead for no good reason if you can call netdev_carrier_*() from IRQ
context and the GPIO is capable of generating a hard IRQ. If you use
request_any_context_irq() instead then the driver will get a hard IRQ if
that's supported.
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v6 0/2] Ethernet drivers for WIZnet chips
2012-04-03 12:29 ` Eric Dumazet
@ 2012-04-04 5:58 ` Mike Sinkovsky
2012-04-04 6:17 ` Eric Dumazet
0 siblings, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 5:58 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev, linux-kernel
03.04.2012 18:29, Eric Dumazet написал:
> On Tue, 2012-04-03 at 18:15 +0600, Mike Sinkovsky wrote:
>> 03.04.2012 17:39, Eric Dumazet написал:
>>> On Tue, 2012-04-03 at 16:58 +0600, Mike Sinkovsky wrote:
>>>> Based on original driver from chip manufacturer, but nearly full rewite.
>>>> Tested and used in production with Blackfin BF531 embedded processor.
>>>>
>>>> Signed-off-by: Mike Sinkovsky<msink@permonline.ru>
>>>> ---
>>>> v6:
>>>> - remove (S0_TX_FSR< skb->len) check in TX handler, it doesn't work
>>>> anyway. Chip can transmit only one frame with MTU 1500 at a time,
>>>> and tx buffer size is bigger.
>>>
>>> So what happens if XXX frames are given to start_xmit() in a flood ?
>>>
>>> You removed any flow control, how can this work ?
>>>
>>> Device has an infinite queue ?
>>
>> As I understand from datasheet, device doesn't have tx queue at all.
>> It have tx buffer, processor must save transmitted frame to it, and then
>> save SEND command to command register. When transmission completed,
>> SENDOK bit in interrupt register will be set to '1', and interrupt
>> handler will be called.
>>
>> So, according to datasheet, driver must stop queue in start_xmit()
>> routine, and wake in interrupt handler of SENDOK bit.
>> I tried this, and it basically works, but SOMETIMES, very rare, I see
>> tx_timeout().
>>
>> And without any flow control - driver works perfectly.
>> Weird, don't know why.
>
> Really this should be fixed, since your driver makes qdisc flow control
> impossible (unless adding a rate limiter like HTB/CBQ)
>
> You probably had a race on your xmit routine, and interrupt routine.
>
> You need proper synchronization : A spinlock to make this easy, or a
> smart barrier game.
I can at least make it configurable from Kconfig with default 'y', and
disable for our boards.
Would it be acceptable?
About races - I can't see any, in this very simple procedure.
But maybe I missed something..
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v6 0/2] Ethernet drivers for WIZnet chips
2012-04-04 5:58 ` Mike Sinkovsky
@ 2012-04-04 6:17 ` Eric Dumazet
2012-04-04 7:25 ` Mike Sinkovsky
0 siblings, 1 reply; 49+ messages in thread
From: Eric Dumazet @ 2012-04-04 6:17 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
On Wed, 2012-04-04 at 11:58 +0600, Mike Sinkovsky wrote:
> About races - I can't see any, in this very simple procedure.
> But maybe I missed something..
Maybe post the code and we can help you.
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip
2012-04-03 13:36 ` Mark Brown
@ 2012-04-04 6:18 ` Mike Sinkovsky
2012-04-04 10:01 ` Mark Brown
0 siblings, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 6:18 UTC (permalink / raw)
To: Mark Brown; +Cc: netdev, linux-kernel
03.04.2012 19:36, Mark Brown написал:
> On Tue, Apr 03, 2012 at 04:58:45PM +0600, Mike Sinkovsky wrote:
>
>> +static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
>> +{
>> + struct net_device *ndev = ndev_instance;
>> + struct w5300_priv *priv = netdev_priv(ndev);
>> +
>> + if (netif_running(ndev)) {
>> + if (gpio_get_value(priv->link_gpio) != 0) {
>> + netif_info(priv, link, ndev, "link is up\n");
>> + netif_carrier_on(ndev);
>> + } else {
>> + netif_info(priv, link, ndev, "link is down\n");
>> + netif_carrier_off(ndev);
>> + }
>> + }
>> +
>> + return IRQ_HANDLED;
>> +}
>
> This relies on ndev being valid and on the gpio being requested but...
>
>> + priv->link_gpio = data->link_gpio;
>> + if (gpio_is_valid(priv->link_gpio)) {
>> + char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
>> + if (!link_name)
>> + return -ENOMEM;
>> + snprintf(link_name, 16, "%s-link", name);
>> + priv->link_irq = gpio_to_irq(priv->link_gpio);
>> + if (devm_request_threaded_irq(&pdev->dev,
>> + priv->link_irq, NULL, w5300_detect_link,
>> + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
>> + link_name, priv->ndev)< 0)
>> + priv->link_gpio = -EINVAL;
>> + }
>
> ...you use devm_request_threaded_irq() here and rely on it for cleanup.
> Are you sure there's no possibility of the interrupt firing after you
> start to tear down the device?
>
> By using a specifically threaded IRQ you're also adding a performance
> overhead for no good reason if you can call netdev_carrier_*() from IRQ
> context and the GPIO is capable of generating a hard IRQ. If you use
> request_any_context_irq() instead then the driver will get a hard IRQ if
> that's supported.
There isn't devm* variant of request_any_context_irq(), and using plain
version looks inconsistent with other resources handling.
Anyway, this is not performance critical procedure, and latency around
100 millisecond is acceptable. Some our boards even don't have this gpio
at all, and nothing bad happens, just userspace doesn't know is carrier
on or off.
Some gpio cannot generate irq at all, and if goal is to support any - I
can easily convert this to background polling from delayed_work
procedure. If it is required for generalized mainstream driver.
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v7 0/2] Ethernet drivers for WIZnet chips
2012-04-03 10:58 ` [PATCH v6 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
2012-04-03 11:39 ` Eric Dumazet
@ 2012-04-04 7:23 ` Mike Sinkovsky
2012-04-04 11:57 ` [PATCH v8 " Mike Sinkovsky
` (5 more replies)
2012-04-04 7:23 ` [PATCH v7 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-04 7:23 ` [PATCH v7 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
3 siblings, 6 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 7:23 UTC (permalink / raw)
To: netdev, linux-kernel, eric.dumazet; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v7:
- new tx flow control, configurable from Kconfig
v6:
- remove (S0_TX_FSR < skb->len) check in TX handler, it doesn't work
anyway. Chip can transmit only one frame with MTU 1500 at a time,
and tx buffer size is bigger.
- move link_gpio from RES_IO resource to wiznet_platform_data
- remove dependency (ARM || BLACKFIN) - should work on any arch
- interrupt handler returns IRQ_NONE if status register is zero
- use devm_request_threaded_irq for request detect_link handler
- remove dev_info if probe failed
v5:
- added driver for WIZnet W5100
- disabled VLAN (NETIF_F_VLAN_CHALLENGED)
v4:
- netif_stop_queue if tx fifo is full, netif_wake_queue in interrupt
- use netif_info macro
v3:
- reading macaddr from platform_data
- ethtool: get_link, get_msglevel, set_msglevel
- more cleanups
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v7 1/2] Ethernet driver for the WIZnet W5300 chip
2012-04-03 10:58 ` [PATCH v6 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
2012-04-03 11:39 ` Eric Dumazet
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
@ 2012-04-04 7:23 ` Mike Sinkovsky
2012-04-04 7:23 ` [PATCH v7 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
3 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 7:23 UTC (permalink / raw)
To: netdev, linux-kernel, eric.dumazet; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/wiznet/Kconfig | 64 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 715 ++++++++++++++++++++++++++++++++++
include/linux/platform_data/wiznet.h | 24 ++
6 files changed, 806 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
create mode 100644 include/linux/platform_data/wiznet.h
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index c63a64c..a11af5c 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -174,6 +174,7 @@ source "drivers/net/ethernet/tile/Kconfig"
source "drivers/net/ethernet/toshiba/Kconfig"
source "drivers/net/ethernet/tundra/Kconfig"
source "drivers/net/ethernet/via/Kconfig"
+source "drivers/net/ethernet/wiznet/Kconfig"
source "drivers/net/ethernet/xilinx/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 9676a51..878ad32 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -73,5 +73,6 @@ obj-$(CONFIG_TILE_NET) += tile/
obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
obj-$(CONFIG_NET_VENDOR_VIA) += via/
+obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..364292b
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,64 @@
+#
+# WIZnet devices configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access all registers
+ after mapping to Memory-Mapped I/O space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers
+ using Indirect Mode Address Register and Indirect Mode Data Register,
+ which are directly mapped to Memory-Mapped I/O space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, it can be selected
+ in runtime from board/platform resources configuration.
+
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+config WIZNET_TX_FLOW
+ bool "Use transmit flow control"
+ help
+ This enables transmit flow control for WIZnet chips.
+ If unsure, say Y.
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..5653ce8
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,715 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kconfig.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5300"
+#define DRV_VERSION "2012-04-04"
+
+MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5300_MR 0x0000 /* Mode Register */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+#define W5300_IR 0x0002 /* Interrupt Register */
+#define W5300_IMR 0x0004 /* Interrupt Mask Register */
+#define IR_S0 0x0001 /* S0 interrupt */
+#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
+#define W5300_SHARH 0x000c /* Source MAC address (45) */
+#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
+#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
+#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
+#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
+#define W5300_MTYPE 0x0030 /* Memory Type */
+#define W5300_IDR 0x00fe /* Chip ID register */
+#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
+#define W5300_S0_MR 0x0200 /* S0 Mode Register */
+#define S0_MR_CLOSED 0x0000 /* Close mode */
+#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
+#define W5300_S0_CR 0x0202 /* S0 Command Register */
+#define S0_CR_OPEN 0x0001 /* OPEN command */
+#define S0_CR_CLOSE 0x0010 /* CLOSE command */
+#define S0_CR_SEND 0x0020 /* SEND command */
+#define S0_CR_RECV 0x0040 /* RECV command */
+#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
+#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
+#define S0_IR_RECV 0x0004 /* Receive interrupt */
+#define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
+#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
+#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
+#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
+#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
+#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
+#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
+#define W5300_REGS_LEN 0x0400
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u16 (*read) (struct w5300_priv *priv, u16 addr);
+ void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
+{
+ return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5300_write_direct(struct w5300_priv *priv,
+ u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
+#define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
+
+static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ data = w5300_read_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ w5300_write_direct(priv, W5300_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5300_read w5300_read_direct
+#define w5300_write w5300_write_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5300_read w5300_read_indirect
+#define w5300_write w5300_write_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5300_read priv->read
+#define w5300_write priv->write
+#endif
+
+static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
+{
+ u32 data;
+ data = w5300_read(priv, addr) << 16;
+ data |= w5300_read(priv, addr + 2);
+ return data;
+}
+
+static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
+{
+ w5300_write(priv, addr, data >> 16);
+ w5300_write(priv, addr + 2, data);
+}
+
+static int w5300_command(struct w5300_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5300_write(priv, W5300_S0_CR, cmd);
+ mmiowb();
+
+ while (w5300_read(priv, W5300_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ *buf++ = fifo >> 8;
+ *buf++ = fifo;
+ }
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+}
+
+static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = *buf++ << 8;
+ fifo |= *buf++;
+ w5300_write(priv, W5300_S0_TX_FIFO, fifo);
+ }
+ w5300_write32(priv, W5300_S0_TX_WRSR, len);
+}
+
+static void w5300_write_macaddr(struct w5300_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ w5300_write32(priv, W5300_SHARL,
+ ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ w5300_write(priv, W5300_SHARH,
+ ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+ mmiowb();
+}
+
+static void w5300_hw_reset(struct w5300_priv *priv)
+{
+ w5300_write_direct(priv, W5300_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5300_write_direct(priv, W5300_MR, priv->indirect ?
+ MR_WDF(7) | MR_PB | MR_IND :
+ MR_WDF(7) | MR_PB);
+ mmiowb();
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_write_macaddr(priv);
+
+ /* Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ w5300_write32(priv, W5300_RMSRL, 64 << 24);
+ w5300_write32(priv, W5300_RMSRH, 0);
+ w5300_write32(priv, W5300_TMSRL, 64 << 24);
+ w5300_write32(priv, W5300_TMSRH, 0);
+ w5300_write(priv, W5300_MTYPE, 0x00ff);
+ mmiowb();
+}
+
+static void w5300_hw_start(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5300_command(priv, S0_CR_OPEN);
+ w5300_write(priv, W5300_S0_IMR, IS_ENABLED(CONFIG_WIZNET_TX_FLOW) ?
+ S0_IR_RECV | S0_IR_SENDOK:
+ S0_IR_RECV);
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5300_hw_close(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ w5300_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5300_get_link(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5300_get_msglevel(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5300_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
+ case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
+ data = 0xffff;
+ break;
+ default:
+ data = w5300_read(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
+ netif_stop_queue(ndev);
+
+ w5300_write_frame(priv, skb->data, skb->len);
+ mmiowb();
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+ netif_dbg(priv, tx_queued, ndev, "tx queued\n");
+
+ w5300_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
+ if (rx_fifo_len == 0)
+ break;
+
+ rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
+
+ skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
+ if (unlikely(!skb)) {
+ u32 i;
+ for (i = 0; i < rx_fifo_len; i += 2)
+ w5300_read(priv, W5300_S0_RX_FIFO);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5300_read_frame(priv, skb->data, rx_len);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ int ir = w5300_read(priv, W5300_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5300_write(priv, W5300_S0_IR, ir);
+ mmiowb();
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
+ netif_dbg(priv, tx_done, ndev, "tx done\n");
+ netif_wake_queue(ndev);
+ }
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5300_hw_start(priv);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5300_write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5300_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5300_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_msglevel = w5300_get_msglevel,
+ .set_msglevel = w5300_set_msglevel,
+ .get_link = w5300_get_link,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5300_read_indirect;
+ priv->write = w5300_write_indirect;
+ } else {
+ priv->read = w5300_read_direct;
+ priv->write = w5300_write_direct;
+ }
+
+ w5300_hw_reset(priv);
+ if (w5300_read(priv, W5300_IDR) != IDR_W5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(&pdev->dev, irq, w5300_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (devm_request_threaded_irq(&pdev->dev,
+ priv->link_irq, NULL, w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct w5300_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5300_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5300_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (!netif_running(ndev)) {
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
+
+static struct platform_driver w5300_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5300_pm_ops,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+};
+
+module_platform_driver(w5300_driver);
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 0000000..b5d8c19
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,24 @@
+/*
+ * Ethernet driver for the WIZnet W5x00 chip.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef PLATFORM_DATA_WIZNET_H
+#define PLATFORM_DATA_WIZNET_H
+
+#include <linux/if_ether.h>
+
+struct wiznet_platform_data {
+ int link_gpio;
+ u8 mac_addr[ETH_ALEN];
+};
+
+#ifndef CONFIG_WIZNET_BUS_SHIFT
+#define CONFIG_WIZNET_BUS_SHIFT 0
+#endif
+
+#define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT)
+#define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT)
+
+#endif /* PLATFORM_DATA_WIZNET_H */
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH v7 2/2] Ethernet driver for the WIZnet W5100 chip
2012-04-03 10:58 ` [PATCH v6 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
` (2 preceding siblings ...)
2012-04-04 7:23 ` [PATCH v7 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
@ 2012-04-04 7:23 ` Mike Sinkovsky
3 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 7:23 UTC (permalink / raw)
To: netdev, linux-kernel, eric.dumazet; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/wiznet/Kconfig | 12 +
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5100.c | 801 ++++++++++++++++++++++++++++++++++
3 files changed, 814 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/w5100.c
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
index 364292b..07b6d3d 100644
--- a/drivers/net/ethernet/wiznet/Kconfig
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -17,6 +17,18 @@ config NET_VENDOR_WIZNET
if NET_VENDOR_WIZNET
+config WIZNET_W5100
+ tristate "WIZnet W5100 Ethernet support"
+ ---help---
+ Support for WIZnet W5100 chips.
+
+ W5100 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5100.
+
config WIZNET_W5300
tristate "WIZnet W5300 Ethernet support"
---help---
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
index 88e0a3e..c614535 100644
--- a/drivers/net/ethernet/wiznet/Makefile
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_WIZNET_W5100) += w5100.o
obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
new file mode 100644
index 0000000..2d905f9
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -0,0 +1,801 @@
+/*
+ * Ethernet driver for the WIZnet W5100 chip.
+ *
+ * Copyright (C) 2006-2008 WIZnet Co.,Ltd.
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kconfig.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5100"
+#define DRV_VERSION "2012-04-04"
+
+MODULE_DESCRIPTION("WIZnet W5100 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5100_COMMON_REGS 0x0000
+#define W5100_MR 0x0000 /* Mode Register */
+#define MR_RST 0x80 /* S/W reset */
+#define MR_PB 0x10 /* Ping block */
+#define MR_AI 0x02 /* Address Auto-Increment */
+#define MR_IND 0x01 /* Indirect mode */
+#define W5100_SHAR 0x0009 /* Source MAC address */
+#define W5100_IR 0x0015 /* Interrupt Register */
+#define W5100_IMR 0x0016 /* Interrupt Mask Register */
+#define IR_S0 0x01 /* S0 interrupt */
+#define W5100_RTR 0x0017 /* Retry Time-value Register */
+#define RTR_DEFAULT 2000 /* =0x07d0 (2000) */
+#define W5100_RMSR 0x001a /* Receive Memory Size */
+#define W5100_TMSR 0x001b /* Transmit Memory Size */
+#define W5100_COMMON_REGS_LEN 0x0040
+
+#define W5100_S0_REGS 0x0400
+#define W5100_S0_MR 0x0400 /* S0 Mode Register */
+#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
+#define W5100_S0_CR 0x0401 /* S0 Command Register */
+#define S0_CR_OPEN 0x01 /* OPEN command */
+#define S0_CR_CLOSE 0x10 /* CLOSE command */
+#define S0_CR_SEND 0x20 /* SEND command */
+#define S0_CR_RECV 0x40 /* RECV command */
+#define W5100_S0_IR 0x0402 /* S0 Interrupt Register */
+#define S0_IR_SENDOK 0x10 /* complete sending */
+#define S0_IR_RECV 0x04 /* receiving data */
+#define W5100_S0_SR 0x0403 /* S0 Status Register */
+#define S0_SR_MACRAW 0x42 /* mac raw mode */
+#define W5100_S0_TX_FSR 0x0420 /* S0 Transmit free memory size */
+#define W5100_S0_TX_RD 0x0422 /* S0 Transmit memory read pointer */
+#define W5100_S0_TX_WR 0x0424 /* S0 Transmit memory write pointer */
+#define W5100_S0_RX_RSR 0x0426 /* S0 Receive free memory size */
+#define W5100_S0_RX_RD 0x0428 /* S0 Receive memory read pointer */
+#define W5100_S0_REGS_LEN 0x0040
+
+#define W5100_TX_MEM_START 0x4000
+#define W5100_TX_MEM_END 0x5fff
+#define W5100_TX_MEM_MASK 0x1fff
+#define W5100_RX_MEM_START 0x6000
+#define W5100_RX_MEM_END 0x7fff
+#define W5100_RX_MEM_MASK 0x1fff
+
+/*
+ * Device driver private data structure
+ */
+struct w5100_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u8 (*read)(struct w5100_priv *priv, u16 addr);
+ void (*write)(struct w5100_priv *priv, u16 addr, u8 data);
+ u16 (*read16)(struct w5100_priv *priv, u16 addr);
+ void (*write16)(struct w5100_priv *priv, u16 addr, u16 data);
+ void (*readbuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ void (*writebuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5100 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x8000 bytes are required for memory space.
+ */
+static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)
+{
+ return ioread8(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5100_write_direct(struct w5100_priv *priv,
+ u16 addr, u8 data)
+{
+ iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
+{
+ u16 data;
+ data = w5100_read_direct(priv, addr) << 8;
+ data |= w5100_read_direct(priv, addr + 1);
+ return data;
+}
+
+static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ w5100_write_direct(priv, addr, data >> 8);
+ w5100_write_direct(priv, addr + 1, data);
+}
+
+static void w5100_readbuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END))
+ addr = W5100_RX_MEM_START;
+ *buf++ = w5100_read_direct(priv, addr);
+ }
+}
+
+static void w5100_writebuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END))
+ addr = W5100_TX_MEM_START;
+ w5100_write_direct(priv, addr, *buf++);
+ }
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x04 bytes are required for memory space.
+ */
+#define W5100_IDM_AR 0x01 /* Indirect Mode Address Register */
+#define W5100_IDM_DR 0x03 /* Indirect Mode Data Register */
+
+static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u8 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR) << 8;
+ data |= w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_readbuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END)) {
+ addr = W5100_RX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ *buf++ = w5100_read_direct(priv, W5100_IDM_DR);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_writebuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END)) {
+ addr = W5100_TX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ w5100_write_direct(priv, W5100_IDM_DR, *buf++);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5100_read w5100_read_direct
+#define w5100_write w5100_write_direct
+#define w5100_read16 w5100_read16_direct
+#define w5100_write16 w5100_write16_direct
+#define w5100_readbuf w5100_readbuf_direct
+#define w5100_writebuf w5100_writebuf_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5100_read w5100_read_indirect
+#define w5100_write w5100_write_indirect
+#define w5100_read16 w5100_read16_indirect
+#define w5100_write16 w5100_write16_indirect
+#define w5100_readbuf w5100_readbuf_indirect
+#define w5100_writebuf w5100_writebuf_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5100_read priv->read
+#define w5100_write priv->write
+#define w5100_read16 priv->read16
+#define w5100_write16 priv->write16
+#define w5100_readbuf priv->readbuf
+#define w5100_writebuf priv->writebuf
+#endif
+
+static int w5100_command(struct w5100_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5100_write(priv, W5100_S0_CR, cmd);
+ mmiowb();
+
+ while (w5100_read(priv, W5100_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5100_write_macaddr(struct w5100_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ int i;
+
+ for (i = 0; i < ETH_ALEN; i++)
+ w5100_write(priv, W5100_SHAR + i, ndev->dev_addr[i]);
+ mmiowb();
+}
+
+static void w5100_hw_reset(struct w5100_priv *priv)
+{
+ w5100_write_direct(priv, W5100_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5100_write_direct(priv, W5100_MR, priv->indirect ?
+ MR_PB | MR_AI | MR_IND :
+ MR_PB);
+ mmiowb();
+ w5100_write(priv, W5100_IMR, 0);
+ w5100_write_macaddr(priv);
+
+ /* Configure 16K of internal memory
+ * as 8K RX buffer and 8K TX buffer
+ */
+ w5100_write(priv, W5100_RMSR, 0x03);
+ w5100_write(priv, W5100_TMSR, 0x03);
+ mmiowb();
+}
+
+static void w5100_hw_start(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5100_command(priv, S0_CR_OPEN);
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5100_hw_close(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ w5100_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5100_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5100_get_link(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5100_get_msglevel(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5100_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5100_get_regs_len(struct net_device *ndev)
+{
+ return W5100_COMMON_REGS_LEN + W5100_S0_REGS_LEN;
+}
+
+static void w5100_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 i;
+
+ regs->version = 1;
+ for (i = 0; i < W5100_COMMON_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_COMMON_REGS + i);
+ for (i = 0; i < W5100_S0_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_S0_REGS + i);
+}
+
+static void w5100_tx_timeout(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u16 offset;
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
+ netif_stop_queue(ndev);
+
+ offset = w5100_read16(priv, W5100_S0_TX_WR);
+ w5100_writebuf(priv, offset, skb->data, skb->len);
+ w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
+ mmiowb();
+ ndev->stats.tx_bytes += skb->len;
+ ndev->stats.tx_packets++;
+ dev_kfree_skb(skb);
+
+ w5100_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5100_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5100_priv *priv = container_of(napi, struct w5100_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+ u16 offset;
+ u8 header[2];
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u16 rx_buf_len = w5100_read16(priv, W5100_S0_RX_RSR);
+ if (rx_buf_len == 0)
+ break;
+
+ offset = w5100_read16(priv, W5100_S0_RX_RD);
+ w5100_readbuf(priv, offset, header, 2);
+ rx_len = get_unaligned_be16(header) - 2;
+
+ skb = netdev_alloc_skb_ip_align(ndev, rx_len);
+ if (unlikely(!skb)) {
+ w5100_write16(priv, W5100_S0_RX_RD,
+ offset + rx_buf_len);
+ w5100_command(priv, S0_CR_RECV);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5100_readbuf(priv, offset + 2, skb->data, rx_len);
+ w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);
+ mmiowb();
+ w5100_command(priv, S0_CR_RECV);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ int ir = w5100_read(priv, W5100_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5100_write(priv, W5100_S0_IR, ir);
+ mmiowb();
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
+ netif_dbg(priv, tx_done, ndev, "tx done\n");
+ netif_wake_queue(ndev);
+ }
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5100_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5100_set_rx_mode(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5100_hw_start(priv);
+ }
+}
+
+static int w5100_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5100_write_macaddr(priv);
+ return 0;
+}
+
+static int w5100_open(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5100_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5100_stop(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5100_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5100_ethtool_ops = {
+ .get_drvinfo = w5100_get_drvinfo,
+ .get_msglevel = w5100_get_msglevel,
+ .set_msglevel = w5100_set_msglevel,
+ .get_link = w5100_get_link,
+ .get_regs_len = w5100_get_regs_len,
+ .get_regs = w5100_get_regs,
+};
+
+static const struct net_device_ops w5100_netdev_ops = {
+ .ndo_open = w5100_open,
+ .ndo_stop = w5100_stop,
+ .ndo_start_xmit = w5100_start_tx,
+ .ndo_tx_timeout = w5100_tx_timeout,
+ .ndo_set_rx_mode = w5100_set_rx_mode,
+ .ndo_set_mac_address = w5100_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5100_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5100_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5100_read_indirect;
+ priv->write = w5100_write_indirect;
+ priv->read16 = w5100_read16_indirect;
+ priv->write16 = w5100_write16_indirect;
+ priv->readbuf = w5100_readbuf_indirect;
+ priv->writebuf = w5100_writebuf_indirect;
+ } else {
+ priv->read = w5100_read_direct;
+ priv->write = w5100_write_direct;
+ priv->read16 = w5100_read16_direct;
+ priv->write16 = w5100_write16_direct;
+ priv->readbuf = w5100_readbuf_direct;
+ priv->writebuf = w5100_writebuf_direct;
+ }
+
+ w5100_hw_reset(priv);
+ if (w5100_read16(priv, W5100_RTR) != RTR_DEFAULT)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = devm_request_irq(&pdev->dev, irq, w5100_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (devm_request_threaded_irq(&pdev->dev,
+ priv->link_irq, NULL, w5100_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5100_probe(struct platform_device *pdev)
+{
+ struct w5100_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5100_netdev_ops;
+ ndev->ethtool_ops = &w5100_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5100_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5100_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5100_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5100_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5100_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5100_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5100_pm_ops, w5100_suspend, w5100_resume);
+
+static struct platform_driver w5100_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5100_pm_ops,
+ },
+ .probe = w5100_probe,
+ .remove = __devexit_p(w5100_remove),
+};
+
+module_platform_driver(w5100_driver);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH v6 0/2] Ethernet drivers for WIZnet chips
2012-04-04 6:17 ` Eric Dumazet
@ 2012-04-04 7:25 ` Mike Sinkovsky
0 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 7:25 UTC (permalink / raw)
To: Eric Dumazet; +Cc: netdev, linux-kernel
04.04.2012 12:17, Eric Dumazet написал:
> On Wed, 2012-04-04 at 11:58 +0600, Mike Sinkovsky wrote:
>
>> About races - I can't see any, in this very simple procedure.
>> But maybe I missed something..
>
> Maybe post the code and we can help you.
Posted v7.
But - today I don't see tx_timeout(), even if flow control is enabled!
Weird still...
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip
2012-04-04 6:18 ` Mike Sinkovsky
@ 2012-04-04 10:01 ` Mark Brown
2012-04-04 11:00 ` Mike Sinkovsky
0 siblings, 1 reply; 49+ messages in thread
From: Mark Brown @ 2012-04-04 10:01 UTC (permalink / raw)
To: Mike Sinkovsky; +Cc: netdev, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1615 bytes --]
On Wed, Apr 04, 2012 at 12:18:12PM +0600, Mike Sinkovsky wrote:
> 03.04.2012 19:36, Mark Brown написал:
> >...you use devm_request_threaded_irq() here and rely on it for cleanup.
> >Are you sure there's no possibility of the interrupt firing after you
> >start to tear down the device?
> >By using a specifically threaded IRQ you're also adding a performance
> >overhead for no good reason if you can call netdev_carrier_*() from IRQ
> >context and the GPIO is capable of generating a hard IRQ. If you use
> >request_any_context_irq() instead then the driver will get a hard IRQ if
> >that's supported.
> There isn't devm* variant of request_any_context_irq(), and using
> plain version looks inconsistent with other resources handling.
> Anyway, this is not performance critical procedure, and latency
> around 100 millisecond is acceptable. Some our boards even don't
> have this gpio at all, and nothing bad happens, just userspace
> doesn't know is carrier on or off.
None of this addresses the primary concern which is that because you're
not (as far as I can tell) ensuring that the interrupt won't fire the
driver might crash if the interrupt fires in between the resources it
needs to handle the interrupt being deallocated and the interrupt being
unregistered. Managed interrupts are relatively tricky to use because
of this issue, with most things like memory it doesn't matter exactly
when it's deallocated but interrupts can potentially trigger actions
themselves.
If you can use it and devm_request_any_context_irq() doesn't exist it'd
be better to add it.
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip
2012-04-04 10:01 ` Mark Brown
@ 2012-04-04 11:00 ` Mike Sinkovsky
0 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 11:00 UTC (permalink / raw)
To: Mark Brown; +Cc: netdev, linux-kernel
04.04.2012 16:01, Mark Brown написал:
> On Wed, Apr 04, 2012 at 12:18:12PM +0600, Mike Sinkovsky wrote:
>> 03.04.2012 19:36, Mark Brown написал:
>
>>> ...you use devm_request_threaded_irq() here and rely on it for cleanup.
>>> Are you sure there's no possibility of the interrupt firing after you
>>> start to tear down the device?
>
>>> By using a specifically threaded IRQ you're also adding a performance
>>> overhead for no good reason if you can call netdev_carrier_*() from IRQ
>>> context and the GPIO is capable of generating a hard IRQ. If you use
>>> request_any_context_irq() instead then the driver will get a hard IRQ if
>>> that's supported.
>
>> There isn't devm* variant of request_any_context_irq(), and using
>> plain version looks inconsistent with other resources handling.
>> Anyway, this is not performance critical procedure, and latency
>> around 100 millisecond is acceptable. Some our boards even don't
>> have this gpio at all, and nothing bad happens, just userspace
>> doesn't know is carrier on or off.
>
> None of this addresses the primary concern which is that because you're
> not (as far as I can tell) ensuring that the interrupt won't fire the
> driver might crash if the interrupt fires in between the resources it
> needs to handle the interrupt being deallocated and the interrupt being
> unregistered. Managed interrupts are relatively tricky to use because
> of this issue, with most things like memory it doesn't matter exactly
> when it's deallocated but interrupts can potentially trigger actions
> themselves.
>
> If you can use it and devm_request_any_context_irq() doesn't exist it'd
> be better to add it.
Ok, now I understand - better don't use devm* functions for interrupts,
use plain request* in probe() and free_irq() in remove().
Will post v8.
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v8 0/2] Ethernet drivers for WIZnet chips
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
@ 2012-04-04 11:57 ` Mike Sinkovsky
2012-04-05 1:15 ` David Miller
2012-04-04 11:57 ` [PATCH v8 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
` (4 subsequent siblings)
5 siblings, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 11:57 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky
From: Mike Sinkovsky <msink@permonline.ru>
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v8:
- use plain request_irq() and request_any_context_irq() in probe(),
and free_irq() in remove(), to avoid races when removing driver
v7:
- new tx flow control, configurable from Kconfig
v6:
- remove (S0_TX_FSR < skb->len) check in TX handler, it doesn't work
anyway. Chip can transmit only one frame with MTU 1500 at a time,
and tx buffer size is bigger.
- move link_gpio from RES_IO resource to wiznet_platform_data
- remove dependency (ARM || BLACKFIN) - should work on any arch
- interrupt handler returns IRQ_NONE if status register is zero
- use devm_request_threaded_irq for request detect_link handler
- remove dev_info if probe failed
v5:
- added driver for WIZnet W5100
- disabled VLAN (NETIF_F_VLAN_CHALLENGED)
v4:
- netif_stop_queue if tx fifo is full, netif_wake_queue in interrupt
- use netif_info macro
v3:
- reading macaddr from platform_data
- ethtool: get_link, get_msglevel, set_msglevel
- more cleanups
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v8 1/2] Ethernet driver for the WIZnet W5300 chip
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
2012-04-04 11:57 ` [PATCH v8 " Mike Sinkovsky
@ 2012-04-04 11:57 ` Mike Sinkovsky
2012-04-04 11:57 ` [PATCH v8 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
` (3 subsequent siblings)
5 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 11:57 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky, Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/wiznet/Kconfig | 64 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 720 ++++++++++++++++++++++++++++++++++
include/linux/platform_data/wiznet.h | 24 ++
4 files changed, 809 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
create mode 100644 include/linux/platform_data/wiznet.h
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..364292b
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,64 @@
+#
+# WIZnet devices configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access all registers
+ after mapping to Memory-Mapped I/O space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers
+ using Indirect Mode Address Register and Indirect Mode Data Register,
+ which are directly mapped to Memory-Mapped I/O space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, it can be selected
+ in runtime from board/platform resources configuration.
+
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+config WIZNET_TX_FLOW
+ bool "Use transmit flow control"
+ help
+ This enables transmit flow control for WIZnet chips.
+ If unsure, say Y.
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..f35a101
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,720 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kconfig.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5300"
+#define DRV_VERSION "2012-04-04"
+
+MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5300_MR 0x0000 /* Mode Register */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+#define W5300_IR 0x0002 /* Interrupt Register */
+#define W5300_IMR 0x0004 /* Interrupt Mask Register */
+#define IR_S0 0x0001 /* S0 interrupt */
+#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
+#define W5300_SHARH 0x000c /* Source MAC address (45) */
+#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
+#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
+#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
+#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
+#define W5300_MTYPE 0x0030 /* Memory Type */
+#define W5300_IDR 0x00fe /* Chip ID register */
+#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
+#define W5300_S0_MR 0x0200 /* S0 Mode Register */
+#define S0_MR_CLOSED 0x0000 /* Close mode */
+#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
+#define W5300_S0_CR 0x0202 /* S0 Command Register */
+#define S0_CR_OPEN 0x0001 /* OPEN command */
+#define S0_CR_CLOSE 0x0010 /* CLOSE command */
+#define S0_CR_SEND 0x0020 /* SEND command */
+#define S0_CR_RECV 0x0040 /* RECV command */
+#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
+#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
+#define S0_IR_RECV 0x0004 /* Receive interrupt */
+#define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
+#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
+#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
+#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
+#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
+#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
+#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
+#define W5300_REGS_LEN 0x0400
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u16 (*read) (struct w5300_priv *priv, u16 addr);
+ void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
+{
+ return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5300_write_direct(struct w5300_priv *priv,
+ u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
+#define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
+
+static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ data = w5300_read_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ w5300_write_direct(priv, W5300_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5300_read w5300_read_direct
+#define w5300_write w5300_write_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5300_read w5300_read_indirect
+#define w5300_write w5300_write_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5300_read priv->read
+#define w5300_write priv->write
+#endif
+
+static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
+{
+ u32 data;
+ data = w5300_read(priv, addr) << 16;
+ data |= w5300_read(priv, addr + 2);
+ return data;
+}
+
+static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
+{
+ w5300_write(priv, addr, data >> 16);
+ w5300_write(priv, addr + 2, data);
+}
+
+static int w5300_command(struct w5300_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5300_write(priv, W5300_S0_CR, cmd);
+ mmiowb();
+
+ while (w5300_read(priv, W5300_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ *buf++ = fifo >> 8;
+ *buf++ = fifo;
+ }
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+}
+
+static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = *buf++ << 8;
+ fifo |= *buf++;
+ w5300_write(priv, W5300_S0_TX_FIFO, fifo);
+ }
+ w5300_write32(priv, W5300_S0_TX_WRSR, len);
+}
+
+static void w5300_write_macaddr(struct w5300_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ w5300_write32(priv, W5300_SHARL,
+ ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ w5300_write(priv, W5300_SHARH,
+ ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+ mmiowb();
+}
+
+static void w5300_hw_reset(struct w5300_priv *priv)
+{
+ w5300_write_direct(priv, W5300_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5300_write_direct(priv, W5300_MR, priv->indirect ?
+ MR_WDF(7) | MR_PB | MR_IND :
+ MR_WDF(7) | MR_PB);
+ mmiowb();
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_write_macaddr(priv);
+
+ /* Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ w5300_write32(priv, W5300_RMSRL, 64 << 24);
+ w5300_write32(priv, W5300_RMSRH, 0);
+ w5300_write32(priv, W5300_TMSRL, 64 << 24);
+ w5300_write32(priv, W5300_TMSRH, 0);
+ w5300_write(priv, W5300_MTYPE, 0x00ff);
+ mmiowb();
+}
+
+static void w5300_hw_start(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5300_command(priv, S0_CR_OPEN);
+ w5300_write(priv, W5300_S0_IMR, IS_ENABLED(CONFIG_WIZNET_TX_FLOW) ?
+ S0_IR_RECV | S0_IR_SENDOK :
+ S0_IR_RECV);
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5300_hw_close(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ w5300_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5300_get_link(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5300_get_msglevel(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5300_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
+ case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
+ data = 0xffff;
+ break;
+ default:
+ data = w5300_read(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
+ netif_stop_queue(ndev);
+
+ w5300_write_frame(priv, skb->data, skb->len);
+ mmiowb();
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+ netif_dbg(priv, tx_queued, ndev, "tx queued\n");
+
+ w5300_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
+ if (rx_fifo_len == 0)
+ break;
+
+ rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
+
+ skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
+ if (unlikely(!skb)) {
+ u32 i;
+ for (i = 0; i < rx_fifo_len; i += 2)
+ w5300_read(priv, W5300_S0_RX_FIFO);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5300_read_frame(priv, skb->data, rx_len);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ int ir = w5300_read(priv, W5300_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5300_write(priv, W5300_S0_IR, ir);
+ mmiowb();
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
+ netif_dbg(priv, tx_done, ndev, "tx done\n");
+ netif_wake_queue(ndev);
+ }
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5300_hw_start(priv);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5300_write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5300_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5300_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_msglevel = w5300_get_msglevel,
+ .set_msglevel = w5300_set_msglevel,
+ .get_link = w5300_get_link,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5300_read_indirect;
+ priv->write = w5300_write_indirect;
+ } else {
+ priv->read = w5300_read_direct;
+ priv->write = w5300_write_direct;
+ }
+
+ w5300_hw_reset(priv);
+ if (w5300_read(priv, W5300_IDR) != IDR_W5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = request_irq(irq, w5300_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_any_context_irq(priv->link_irq, w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct w5300_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5300_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ w5300_hw_reset(priv);
+ free_irq(priv->irq, ndev);
+ if (gpio_is_valid(priv->link_gpio))
+ free_irq(priv->link_irq, ndev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5300_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (!netif_running(ndev)) {
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
+
+static struct platform_driver w5300_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5300_pm_ops,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+};
+
+module_platform_driver(w5300_driver);
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 0000000..b5d8c19
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,24 @@
+/*
+ * Ethernet driver for the WIZnet W5x00 chip.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef PLATFORM_DATA_WIZNET_H
+#define PLATFORM_DATA_WIZNET_H
+
+#include <linux/if_ether.h>
+
+struct wiznet_platform_data {
+ int link_gpio;
+ u8 mac_addr[ETH_ALEN];
+};
+
+#ifndef CONFIG_WIZNET_BUS_SHIFT
+#define CONFIG_WIZNET_BUS_SHIFT 0
+#endif
+
+#define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT)
+#define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT)
+
+#endif /* PLATFORM_DATA_WIZNET_H */
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH v8 2/2] Ethernet driver for the WIZnet W5100 chip
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
2012-04-04 11:57 ` [PATCH v8 " Mike Sinkovsky
2012-04-04 11:57 ` [PATCH v8 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
@ 2012-04-04 11:57 ` Mike Sinkovsky
2012-04-04 12:08 ` [PATCH v8 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
` (2 subsequent siblings)
5 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 11:57 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky, Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/wiznet/Kconfig | 12 +
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5100.c | 806 ++++++++++++++++++++++++++++++++++
3 files changed, 819 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/w5100.c
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
index 364292b..07b6d3d 100644
--- a/drivers/net/ethernet/wiznet/Kconfig
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -17,6 +17,18 @@ config NET_VENDOR_WIZNET
if NET_VENDOR_WIZNET
+config WIZNET_W5100
+ tristate "WIZnet W5100 Ethernet support"
+ ---help---
+ Support for WIZnet W5100 chips.
+
+ W5100 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5100.
+
config WIZNET_W5300
tristate "WIZnet W5300 Ethernet support"
---help---
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
index 88e0a3e..c614535 100644
--- a/drivers/net/ethernet/wiznet/Makefile
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_WIZNET_W5100) += w5100.o
obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
new file mode 100644
index 0000000..894d4d6
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -0,0 +1,806 @@
+/*
+ * Ethernet driver for the WIZnet W5100 chip.
+ *
+ * Copyright (C) 2006-2008 WIZnet Co.,Ltd.
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kconfig.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5100"
+#define DRV_VERSION "2012-04-04"
+
+MODULE_DESCRIPTION("WIZnet W5100 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5100_COMMON_REGS 0x0000
+#define W5100_MR 0x0000 /* Mode Register */
+#define MR_RST 0x80 /* S/W reset */
+#define MR_PB 0x10 /* Ping block */
+#define MR_AI 0x02 /* Address Auto-Increment */
+#define MR_IND 0x01 /* Indirect mode */
+#define W5100_SHAR 0x0009 /* Source MAC address */
+#define W5100_IR 0x0015 /* Interrupt Register */
+#define W5100_IMR 0x0016 /* Interrupt Mask Register */
+#define IR_S0 0x01 /* S0 interrupt */
+#define W5100_RTR 0x0017 /* Retry Time-value Register */
+#define RTR_DEFAULT 2000 /* =0x07d0 (2000) */
+#define W5100_RMSR 0x001a /* Receive Memory Size */
+#define W5100_TMSR 0x001b /* Transmit Memory Size */
+#define W5100_COMMON_REGS_LEN 0x0040
+
+#define W5100_S0_REGS 0x0400
+#define W5100_S0_MR 0x0400 /* S0 Mode Register */
+#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
+#define W5100_S0_CR 0x0401 /* S0 Command Register */
+#define S0_CR_OPEN 0x01 /* OPEN command */
+#define S0_CR_CLOSE 0x10 /* CLOSE command */
+#define S0_CR_SEND 0x20 /* SEND command */
+#define S0_CR_RECV 0x40 /* RECV command */
+#define W5100_S0_IR 0x0402 /* S0 Interrupt Register */
+#define S0_IR_SENDOK 0x10 /* complete sending */
+#define S0_IR_RECV 0x04 /* receiving data */
+#define W5100_S0_SR 0x0403 /* S0 Status Register */
+#define S0_SR_MACRAW 0x42 /* mac raw mode */
+#define W5100_S0_TX_FSR 0x0420 /* S0 Transmit free memory size */
+#define W5100_S0_TX_RD 0x0422 /* S0 Transmit memory read pointer */
+#define W5100_S0_TX_WR 0x0424 /* S0 Transmit memory write pointer */
+#define W5100_S0_RX_RSR 0x0426 /* S0 Receive free memory size */
+#define W5100_S0_RX_RD 0x0428 /* S0 Receive memory read pointer */
+#define W5100_S0_REGS_LEN 0x0040
+
+#define W5100_TX_MEM_START 0x4000
+#define W5100_TX_MEM_END 0x5fff
+#define W5100_TX_MEM_MASK 0x1fff
+#define W5100_RX_MEM_START 0x6000
+#define W5100_RX_MEM_END 0x7fff
+#define W5100_RX_MEM_MASK 0x1fff
+
+/*
+ * Device driver private data structure
+ */
+struct w5100_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u8 (*read)(struct w5100_priv *priv, u16 addr);
+ void (*write)(struct w5100_priv *priv, u16 addr, u8 data);
+ u16 (*read16)(struct w5100_priv *priv, u16 addr);
+ void (*write16)(struct w5100_priv *priv, u16 addr, u16 data);
+ void (*readbuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ void (*writebuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5100 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x8000 bytes are required for memory space.
+ */
+static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)
+{
+ return ioread8(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5100_write_direct(struct w5100_priv *priv,
+ u16 addr, u8 data)
+{
+ iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
+{
+ u16 data;
+ data = w5100_read_direct(priv, addr) << 8;
+ data |= w5100_read_direct(priv, addr + 1);
+ return data;
+}
+
+static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ w5100_write_direct(priv, addr, data >> 8);
+ w5100_write_direct(priv, addr + 1, data);
+}
+
+static void w5100_readbuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END))
+ addr = W5100_RX_MEM_START;
+ *buf++ = w5100_read_direct(priv, addr);
+ }
+}
+
+static void w5100_writebuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END))
+ addr = W5100_TX_MEM_START;
+ w5100_write_direct(priv, addr, *buf++);
+ }
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x04 bytes are required for memory space.
+ */
+#define W5100_IDM_AR 0x01 /* Indirect Mode Address Register */
+#define W5100_IDM_DR 0x03 /* Indirect Mode Data Register */
+
+static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u8 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR) << 8;
+ data |= w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_readbuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END)) {
+ addr = W5100_RX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ *buf++ = w5100_read_direct(priv, W5100_IDM_DR);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_writebuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END)) {
+ addr = W5100_TX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ w5100_write_direct(priv, W5100_IDM_DR, *buf++);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5100_read w5100_read_direct
+#define w5100_write w5100_write_direct
+#define w5100_read16 w5100_read16_direct
+#define w5100_write16 w5100_write16_direct
+#define w5100_readbuf w5100_readbuf_direct
+#define w5100_writebuf w5100_writebuf_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5100_read w5100_read_indirect
+#define w5100_write w5100_write_indirect
+#define w5100_read16 w5100_read16_indirect
+#define w5100_write16 w5100_write16_indirect
+#define w5100_readbuf w5100_readbuf_indirect
+#define w5100_writebuf w5100_writebuf_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5100_read priv->read
+#define w5100_write priv->write
+#define w5100_read16 priv->read16
+#define w5100_write16 priv->write16
+#define w5100_readbuf priv->readbuf
+#define w5100_writebuf priv->writebuf
+#endif
+
+static int w5100_command(struct w5100_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5100_write(priv, W5100_S0_CR, cmd);
+ mmiowb();
+
+ while (w5100_read(priv, W5100_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5100_write_macaddr(struct w5100_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ int i;
+
+ for (i = 0; i < ETH_ALEN; i++)
+ w5100_write(priv, W5100_SHAR + i, ndev->dev_addr[i]);
+ mmiowb();
+}
+
+static void w5100_hw_reset(struct w5100_priv *priv)
+{
+ w5100_write_direct(priv, W5100_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5100_write_direct(priv, W5100_MR, priv->indirect ?
+ MR_PB | MR_AI | MR_IND :
+ MR_PB);
+ mmiowb();
+ w5100_write(priv, W5100_IMR, 0);
+ w5100_write_macaddr(priv);
+
+ /* Configure 16K of internal memory
+ * as 8K RX buffer and 8K TX buffer
+ */
+ w5100_write(priv, W5100_RMSR, 0x03);
+ w5100_write(priv, W5100_TMSR, 0x03);
+ mmiowb();
+}
+
+static void w5100_hw_start(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5100_command(priv, S0_CR_OPEN);
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5100_hw_close(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ w5100_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5100_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5100_get_link(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5100_get_msglevel(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5100_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5100_get_regs_len(struct net_device *ndev)
+{
+ return W5100_COMMON_REGS_LEN + W5100_S0_REGS_LEN;
+}
+
+static void w5100_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 i;
+
+ regs->version = 1;
+ for (i = 0; i < W5100_COMMON_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_COMMON_REGS + i);
+ for (i = 0; i < W5100_S0_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_S0_REGS + i);
+}
+
+static void w5100_tx_timeout(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u16 offset;
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
+ netif_stop_queue(ndev);
+
+ offset = w5100_read16(priv, W5100_S0_TX_WR);
+ w5100_writebuf(priv, offset, skb->data, skb->len);
+ w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
+ mmiowb();
+ ndev->stats.tx_bytes += skb->len;
+ ndev->stats.tx_packets++;
+ dev_kfree_skb(skb);
+
+ w5100_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5100_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5100_priv *priv = container_of(napi, struct w5100_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+ u16 offset;
+ u8 header[2];
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u16 rx_buf_len = w5100_read16(priv, W5100_S0_RX_RSR);
+ if (rx_buf_len == 0)
+ break;
+
+ offset = w5100_read16(priv, W5100_S0_RX_RD);
+ w5100_readbuf(priv, offset, header, 2);
+ rx_len = get_unaligned_be16(header) - 2;
+
+ skb = netdev_alloc_skb_ip_align(ndev, rx_len);
+ if (unlikely(!skb)) {
+ w5100_write16(priv, W5100_S0_RX_RD,
+ offset + rx_buf_len);
+ w5100_command(priv, S0_CR_RECV);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5100_readbuf(priv, offset + 2, skb->data, rx_len);
+ w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);
+ mmiowb();
+ w5100_command(priv, S0_CR_RECV);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ int ir = w5100_read(priv, W5100_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5100_write(priv, W5100_S0_IR, ir);
+ mmiowb();
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
+ netif_dbg(priv, tx_done, ndev, "tx done\n");
+ netif_wake_queue(ndev);
+ }
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5100_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5100_set_rx_mode(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5100_hw_start(priv);
+ }
+}
+
+static int w5100_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5100_write_macaddr(priv);
+ return 0;
+}
+
+static int w5100_open(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5100_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5100_stop(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5100_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5100_ethtool_ops = {
+ .get_drvinfo = w5100_get_drvinfo,
+ .get_msglevel = w5100_get_msglevel,
+ .set_msglevel = w5100_set_msglevel,
+ .get_link = w5100_get_link,
+ .get_regs_len = w5100_get_regs_len,
+ .get_regs = w5100_get_regs,
+};
+
+static const struct net_device_ops w5100_netdev_ops = {
+ .ndo_open = w5100_open,
+ .ndo_stop = w5100_stop,
+ .ndo_start_xmit = w5100_start_tx,
+ .ndo_tx_timeout = w5100_tx_timeout,
+ .ndo_set_rx_mode = w5100_set_rx_mode,
+ .ndo_set_mac_address = w5100_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5100_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5100_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5100_read_indirect;
+ priv->write = w5100_write_indirect;
+ priv->read16 = w5100_read16_indirect;
+ priv->write16 = w5100_write16_indirect;
+ priv->readbuf = w5100_readbuf_indirect;
+ priv->writebuf = w5100_writebuf_indirect;
+ } else {
+ priv->read = w5100_read_direct;
+ priv->write = w5100_write_direct;
+ priv->read16 = w5100_read16_direct;
+ priv->write16 = w5100_write16_direct;
+ priv->readbuf = w5100_readbuf_direct;
+ priv->writebuf = w5100_writebuf_direct;
+ }
+
+ w5100_hw_reset(priv);
+ if (w5100_read16(priv, W5100_RTR) != RTR_DEFAULT)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = request_irq(irq, w5100_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_any_context_irq(priv->link_irq, w5100_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5100_probe(struct platform_device *pdev)
+{
+ struct w5100_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5100_netdev_ops;
+ ndev->ethtool_ops = &w5100_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5100_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5100_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5100_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ w5100_hw_reset(priv);
+ free_irq(priv->irq, ndev);
+ if (gpio_is_valid(priv->link_gpio))
+ free_irq(priv->link_irq, ndev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5100_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5100_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5100_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5100_pm_ops, w5100_suspend, w5100_resume);
+
+static struct platform_driver w5100_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5100_pm_ops,
+ },
+ .probe = w5100_probe,
+ .remove = __devexit_p(w5100_remove),
+};
+
+module_platform_driver(w5100_driver);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH v8 0/2] Ethernet drivers for WIZnet chips
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
` (2 preceding siblings ...)
2012-04-04 11:57 ` [PATCH v8 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
@ 2012-04-04 12:08 ` Mike Sinkovsky
2012-04-05 5:33 ` [PATCH v9 " Mike Sinkovsky
` (2 more replies)
2012-04-04 12:08 ` [PATCH v8 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-04 12:08 ` [PATCH v8 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
5 siblings, 3 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 12:08 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v8:
- use plain request_irq() and request_any_context_irq() in probe(),
and free_irq() in remove(), to avoid races when removing driver
v7:
- new tx flow control, configurable from Kconfig
v6:
- remove (S0_TX_FSR < skb->len) check in TX handler, it doesn't work
anyway. Chip can transmit only one frame with MTU 1500 at a time,
and tx buffer size is bigger.
- move link_gpio from RES_IO resource to wiznet_platform_data
- remove dependency (ARM || BLACKFIN) - should work on any arch
- interrupt handler returns IRQ_NONE if status register is zero
- use devm_request_threaded_irq for request detect_link handler
- remove dev_info if probe failed
v5:
- added driver for WIZnet W5100
- disabled VLAN (NETIF_F_VLAN_CHALLENGED)
v4:
- netif_stop_queue if tx fifo is full, netif_wake_queue in interrupt
- use netif_info macro
v3:
- reading macaddr from platform_data
- ethtool: get_link, get_msglevel, set_msglevel
- more cleanups
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v8 1/2] Ethernet driver for the WIZnet W5300 chip
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
` (3 preceding siblings ...)
2012-04-04 12:08 ` [PATCH v8 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
@ 2012-04-04 12:08 ` Mike Sinkovsky
2012-04-04 12:08 ` [PATCH v8 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
5 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 12:08 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky, Mike Sinkovsky
From: Mike Sinkovsky <msink@trikom.ru>
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/wiznet/Kconfig | 64 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 720 ++++++++++++++++++++++++++++++++++
include/linux/platform_data/wiznet.h | 24 ++
4 files changed, 809 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
create mode 100644 include/linux/platform_data/wiznet.h
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..364292b
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,64 @@
+#
+# WIZnet devices configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access all registers
+ after mapping to Memory-Mapped I/O space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers
+ using Indirect Mode Address Register and Indirect Mode Data Register,
+ which are directly mapped to Memory-Mapped I/O space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, it can be selected
+ in runtime from board/platform resources configuration.
+
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+config WIZNET_TX_FLOW
+ bool "Use transmit flow control"
+ help
+ This enables transmit flow control for WIZnet chips.
+ If unsure, say Y.
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..f35a101
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,720 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kconfig.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5300"
+#define DRV_VERSION "2012-04-04"
+
+MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5300_MR 0x0000 /* Mode Register */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+#define W5300_IR 0x0002 /* Interrupt Register */
+#define W5300_IMR 0x0004 /* Interrupt Mask Register */
+#define IR_S0 0x0001 /* S0 interrupt */
+#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
+#define W5300_SHARH 0x000c /* Source MAC address (45) */
+#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
+#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
+#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
+#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
+#define W5300_MTYPE 0x0030 /* Memory Type */
+#define W5300_IDR 0x00fe /* Chip ID register */
+#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
+#define W5300_S0_MR 0x0200 /* S0 Mode Register */
+#define S0_MR_CLOSED 0x0000 /* Close mode */
+#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
+#define W5300_S0_CR 0x0202 /* S0 Command Register */
+#define S0_CR_OPEN 0x0001 /* OPEN command */
+#define S0_CR_CLOSE 0x0010 /* CLOSE command */
+#define S0_CR_SEND 0x0020 /* SEND command */
+#define S0_CR_RECV 0x0040 /* RECV command */
+#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
+#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
+#define S0_IR_RECV 0x0004 /* Receive interrupt */
+#define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
+#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
+#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
+#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
+#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
+#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
+#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
+#define W5300_REGS_LEN 0x0400
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u16 (*read) (struct w5300_priv *priv, u16 addr);
+ void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
+{
+ return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5300_write_direct(struct w5300_priv *priv,
+ u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
+#define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
+
+static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ data = w5300_read_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ w5300_write_direct(priv, W5300_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5300_read w5300_read_direct
+#define w5300_write w5300_write_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5300_read w5300_read_indirect
+#define w5300_write w5300_write_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5300_read priv->read
+#define w5300_write priv->write
+#endif
+
+static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
+{
+ u32 data;
+ data = w5300_read(priv, addr) << 16;
+ data |= w5300_read(priv, addr + 2);
+ return data;
+}
+
+static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
+{
+ w5300_write(priv, addr, data >> 16);
+ w5300_write(priv, addr + 2, data);
+}
+
+static int w5300_command(struct w5300_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5300_write(priv, W5300_S0_CR, cmd);
+ mmiowb();
+
+ while (w5300_read(priv, W5300_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ *buf++ = fifo >> 8;
+ *buf++ = fifo;
+ }
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+}
+
+static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = *buf++ << 8;
+ fifo |= *buf++;
+ w5300_write(priv, W5300_S0_TX_FIFO, fifo);
+ }
+ w5300_write32(priv, W5300_S0_TX_WRSR, len);
+}
+
+static void w5300_write_macaddr(struct w5300_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ w5300_write32(priv, W5300_SHARL,
+ ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ w5300_write(priv, W5300_SHARH,
+ ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+ mmiowb();
+}
+
+static void w5300_hw_reset(struct w5300_priv *priv)
+{
+ w5300_write_direct(priv, W5300_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5300_write_direct(priv, W5300_MR, priv->indirect ?
+ MR_WDF(7) | MR_PB | MR_IND :
+ MR_WDF(7) | MR_PB);
+ mmiowb();
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_write_macaddr(priv);
+
+ /* Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ w5300_write32(priv, W5300_RMSRL, 64 << 24);
+ w5300_write32(priv, W5300_RMSRH, 0);
+ w5300_write32(priv, W5300_TMSRL, 64 << 24);
+ w5300_write32(priv, W5300_TMSRH, 0);
+ w5300_write(priv, W5300_MTYPE, 0x00ff);
+ mmiowb();
+}
+
+static void w5300_hw_start(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5300_command(priv, S0_CR_OPEN);
+ w5300_write(priv, W5300_S0_IMR, IS_ENABLED(CONFIG_WIZNET_TX_FLOW) ?
+ S0_IR_RECV | S0_IR_SENDOK :
+ S0_IR_RECV);
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5300_hw_close(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ w5300_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5300_get_link(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5300_get_msglevel(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5300_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
+ case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
+ data = 0xffff;
+ break;
+ default:
+ data = w5300_read(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
+ netif_stop_queue(ndev);
+
+ w5300_write_frame(priv, skb->data, skb->len);
+ mmiowb();
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+ netif_dbg(priv, tx_queued, ndev, "tx queued\n");
+
+ w5300_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
+ if (rx_fifo_len == 0)
+ break;
+
+ rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
+
+ skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
+ if (unlikely(!skb)) {
+ u32 i;
+ for (i = 0; i < rx_fifo_len; i += 2)
+ w5300_read(priv, W5300_S0_RX_FIFO);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5300_read_frame(priv, skb->data, rx_len);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ int ir = w5300_read(priv, W5300_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5300_write(priv, W5300_S0_IR, ir);
+ mmiowb();
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
+ netif_dbg(priv, tx_done, ndev, "tx done\n");
+ netif_wake_queue(ndev);
+ }
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5300_hw_start(priv);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5300_write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5300_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5300_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_msglevel = w5300_get_msglevel,
+ .set_msglevel = w5300_set_msglevel,
+ .get_link = w5300_get_link,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5300_read_indirect;
+ priv->write = w5300_write_indirect;
+ } else {
+ priv->read = w5300_read_direct;
+ priv->write = w5300_write_direct;
+ }
+
+ w5300_hw_reset(priv);
+ if (w5300_read(priv, W5300_IDR) != IDR_W5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = request_irq(irq, w5300_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_any_context_irq(priv->link_irq, w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct w5300_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5300_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ w5300_hw_reset(priv);
+ free_irq(priv->irq, ndev);
+ if (gpio_is_valid(priv->link_gpio))
+ free_irq(priv->link_irq, ndev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5300_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (!netif_running(ndev)) {
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
+
+static struct platform_driver w5300_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5300_pm_ops,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+};
+
+module_platform_driver(w5300_driver);
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 0000000..b5d8c19
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,24 @@
+/*
+ * Ethernet driver for the WIZnet W5x00 chip.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef PLATFORM_DATA_WIZNET_H
+#define PLATFORM_DATA_WIZNET_H
+
+#include <linux/if_ether.h>
+
+struct wiznet_platform_data {
+ int link_gpio;
+ u8 mac_addr[ETH_ALEN];
+};
+
+#ifndef CONFIG_WIZNET_BUS_SHIFT
+#define CONFIG_WIZNET_BUS_SHIFT 0
+#endif
+
+#define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT)
+#define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT)
+
+#endif /* PLATFORM_DATA_WIZNET_H */
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH v8 2/2] Ethernet driver for the WIZnet W5100 chip
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
` (4 preceding siblings ...)
2012-04-04 12:08 ` [PATCH v8 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
@ 2012-04-04 12:08 ` Mike Sinkovsky
5 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-04 12:08 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky, Mike Sinkovsky
From: Mike Sinkovsky <msink@trikom.ru>
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/wiznet/Kconfig | 12 +
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5100.c | 806 ++++++++++++++++++++++++++++++++++
3 files changed, 819 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/w5100.c
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
index 364292b..07b6d3d 100644
--- a/drivers/net/ethernet/wiznet/Kconfig
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -17,6 +17,18 @@ config NET_VENDOR_WIZNET
if NET_VENDOR_WIZNET
+config WIZNET_W5100
+ tristate "WIZnet W5100 Ethernet support"
+ ---help---
+ Support for WIZnet W5100 chips.
+
+ W5100 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5100.
+
config WIZNET_W5300
tristate "WIZnet W5300 Ethernet support"
---help---
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
index 88e0a3e..c614535 100644
--- a/drivers/net/ethernet/wiznet/Makefile
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_WIZNET_W5100) += w5100.o
obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
new file mode 100644
index 0000000..894d4d6
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -0,0 +1,806 @@
+/*
+ * Ethernet driver for the WIZnet W5100 chip.
+ *
+ * Copyright (C) 2006-2008 WIZnet Co.,Ltd.
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kconfig.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5100"
+#define DRV_VERSION "2012-04-04"
+
+MODULE_DESCRIPTION("WIZnet W5100 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5100_COMMON_REGS 0x0000
+#define W5100_MR 0x0000 /* Mode Register */
+#define MR_RST 0x80 /* S/W reset */
+#define MR_PB 0x10 /* Ping block */
+#define MR_AI 0x02 /* Address Auto-Increment */
+#define MR_IND 0x01 /* Indirect mode */
+#define W5100_SHAR 0x0009 /* Source MAC address */
+#define W5100_IR 0x0015 /* Interrupt Register */
+#define W5100_IMR 0x0016 /* Interrupt Mask Register */
+#define IR_S0 0x01 /* S0 interrupt */
+#define W5100_RTR 0x0017 /* Retry Time-value Register */
+#define RTR_DEFAULT 2000 /* =0x07d0 (2000) */
+#define W5100_RMSR 0x001a /* Receive Memory Size */
+#define W5100_TMSR 0x001b /* Transmit Memory Size */
+#define W5100_COMMON_REGS_LEN 0x0040
+
+#define W5100_S0_REGS 0x0400
+#define W5100_S0_MR 0x0400 /* S0 Mode Register */
+#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
+#define W5100_S0_CR 0x0401 /* S0 Command Register */
+#define S0_CR_OPEN 0x01 /* OPEN command */
+#define S0_CR_CLOSE 0x10 /* CLOSE command */
+#define S0_CR_SEND 0x20 /* SEND command */
+#define S0_CR_RECV 0x40 /* RECV command */
+#define W5100_S0_IR 0x0402 /* S0 Interrupt Register */
+#define S0_IR_SENDOK 0x10 /* complete sending */
+#define S0_IR_RECV 0x04 /* receiving data */
+#define W5100_S0_SR 0x0403 /* S0 Status Register */
+#define S0_SR_MACRAW 0x42 /* mac raw mode */
+#define W5100_S0_TX_FSR 0x0420 /* S0 Transmit free memory size */
+#define W5100_S0_TX_RD 0x0422 /* S0 Transmit memory read pointer */
+#define W5100_S0_TX_WR 0x0424 /* S0 Transmit memory write pointer */
+#define W5100_S0_RX_RSR 0x0426 /* S0 Receive free memory size */
+#define W5100_S0_RX_RD 0x0428 /* S0 Receive memory read pointer */
+#define W5100_S0_REGS_LEN 0x0040
+
+#define W5100_TX_MEM_START 0x4000
+#define W5100_TX_MEM_END 0x5fff
+#define W5100_TX_MEM_MASK 0x1fff
+#define W5100_RX_MEM_START 0x6000
+#define W5100_RX_MEM_END 0x7fff
+#define W5100_RX_MEM_MASK 0x1fff
+
+/*
+ * Device driver private data structure
+ */
+struct w5100_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u8 (*read)(struct w5100_priv *priv, u16 addr);
+ void (*write)(struct w5100_priv *priv, u16 addr, u8 data);
+ u16 (*read16)(struct w5100_priv *priv, u16 addr);
+ void (*write16)(struct w5100_priv *priv, u16 addr, u16 data);
+ void (*readbuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ void (*writebuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5100 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x8000 bytes are required for memory space.
+ */
+static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)
+{
+ return ioread8(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5100_write_direct(struct w5100_priv *priv,
+ u16 addr, u8 data)
+{
+ iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
+{
+ u16 data;
+ data = w5100_read_direct(priv, addr) << 8;
+ data |= w5100_read_direct(priv, addr + 1);
+ return data;
+}
+
+static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ w5100_write_direct(priv, addr, data >> 8);
+ w5100_write_direct(priv, addr + 1, data);
+}
+
+static void w5100_readbuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END))
+ addr = W5100_RX_MEM_START;
+ *buf++ = w5100_read_direct(priv, addr);
+ }
+}
+
+static void w5100_writebuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END))
+ addr = W5100_TX_MEM_START;
+ w5100_write_direct(priv, addr, *buf++);
+ }
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x04 bytes are required for memory space.
+ */
+#define W5100_IDM_AR 0x01 /* Indirect Mode Address Register */
+#define W5100_IDM_DR 0x03 /* Indirect Mode Data Register */
+
+static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u8 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR) << 8;
+ data |= w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_readbuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END)) {
+ addr = W5100_RX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ *buf++ = w5100_read_direct(priv, W5100_IDM_DR);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_writebuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END)) {
+ addr = W5100_TX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ w5100_write_direct(priv, W5100_IDM_DR, *buf++);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5100_read w5100_read_direct
+#define w5100_write w5100_write_direct
+#define w5100_read16 w5100_read16_direct
+#define w5100_write16 w5100_write16_direct
+#define w5100_readbuf w5100_readbuf_direct
+#define w5100_writebuf w5100_writebuf_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5100_read w5100_read_indirect
+#define w5100_write w5100_write_indirect
+#define w5100_read16 w5100_read16_indirect
+#define w5100_write16 w5100_write16_indirect
+#define w5100_readbuf w5100_readbuf_indirect
+#define w5100_writebuf w5100_writebuf_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5100_read priv->read
+#define w5100_write priv->write
+#define w5100_read16 priv->read16
+#define w5100_write16 priv->write16
+#define w5100_readbuf priv->readbuf
+#define w5100_writebuf priv->writebuf
+#endif
+
+static int w5100_command(struct w5100_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5100_write(priv, W5100_S0_CR, cmd);
+ mmiowb();
+
+ while (w5100_read(priv, W5100_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5100_write_macaddr(struct w5100_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ int i;
+
+ for (i = 0; i < ETH_ALEN; i++)
+ w5100_write(priv, W5100_SHAR + i, ndev->dev_addr[i]);
+ mmiowb();
+}
+
+static void w5100_hw_reset(struct w5100_priv *priv)
+{
+ w5100_write_direct(priv, W5100_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5100_write_direct(priv, W5100_MR, priv->indirect ?
+ MR_PB | MR_AI | MR_IND :
+ MR_PB);
+ mmiowb();
+ w5100_write(priv, W5100_IMR, 0);
+ w5100_write_macaddr(priv);
+
+ /* Configure 16K of internal memory
+ * as 8K RX buffer and 8K TX buffer
+ */
+ w5100_write(priv, W5100_RMSR, 0x03);
+ w5100_write(priv, W5100_TMSR, 0x03);
+ mmiowb();
+}
+
+static void w5100_hw_start(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5100_command(priv, S0_CR_OPEN);
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5100_hw_close(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ w5100_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5100_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5100_get_link(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5100_get_msglevel(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5100_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5100_get_regs_len(struct net_device *ndev)
+{
+ return W5100_COMMON_REGS_LEN + W5100_S0_REGS_LEN;
+}
+
+static void w5100_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 i;
+
+ regs->version = 1;
+ for (i = 0; i < W5100_COMMON_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_COMMON_REGS + i);
+ for (i = 0; i < W5100_S0_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_S0_REGS + i);
+}
+
+static void w5100_tx_timeout(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u16 offset;
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
+ netif_stop_queue(ndev);
+
+ offset = w5100_read16(priv, W5100_S0_TX_WR);
+ w5100_writebuf(priv, offset, skb->data, skb->len);
+ w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
+ mmiowb();
+ ndev->stats.tx_bytes += skb->len;
+ ndev->stats.tx_packets++;
+ dev_kfree_skb(skb);
+
+ w5100_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5100_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5100_priv *priv = container_of(napi, struct w5100_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+ u16 offset;
+ u8 header[2];
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u16 rx_buf_len = w5100_read16(priv, W5100_S0_RX_RSR);
+ if (rx_buf_len == 0)
+ break;
+
+ offset = w5100_read16(priv, W5100_S0_RX_RD);
+ w5100_readbuf(priv, offset, header, 2);
+ rx_len = get_unaligned_be16(header) - 2;
+
+ skb = netdev_alloc_skb_ip_align(ndev, rx_len);
+ if (unlikely(!skb)) {
+ w5100_write16(priv, W5100_S0_RX_RD,
+ offset + rx_buf_len);
+ w5100_command(priv, S0_CR_RECV);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5100_readbuf(priv, offset + 2, skb->data, rx_len);
+ w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);
+ mmiowb();
+ w5100_command(priv, S0_CR_RECV);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ int ir = w5100_read(priv, W5100_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5100_write(priv, W5100_S0_IR, ir);
+ mmiowb();
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
+ netif_dbg(priv, tx_done, ndev, "tx done\n");
+ netif_wake_queue(ndev);
+ }
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5100_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5100_set_rx_mode(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5100_hw_start(priv);
+ }
+}
+
+static int w5100_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5100_write_macaddr(priv);
+ return 0;
+}
+
+static int w5100_open(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5100_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5100_stop(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5100_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5100_ethtool_ops = {
+ .get_drvinfo = w5100_get_drvinfo,
+ .get_msglevel = w5100_get_msglevel,
+ .set_msglevel = w5100_set_msglevel,
+ .get_link = w5100_get_link,
+ .get_regs_len = w5100_get_regs_len,
+ .get_regs = w5100_get_regs,
+};
+
+static const struct net_device_ops w5100_netdev_ops = {
+ .ndo_open = w5100_open,
+ .ndo_stop = w5100_stop,
+ .ndo_start_xmit = w5100_start_tx,
+ .ndo_tx_timeout = w5100_tx_timeout,
+ .ndo_set_rx_mode = w5100_set_rx_mode,
+ .ndo_set_mac_address = w5100_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5100_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5100_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5100_read_indirect;
+ priv->write = w5100_write_indirect;
+ priv->read16 = w5100_read16_indirect;
+ priv->write16 = w5100_write16_indirect;
+ priv->readbuf = w5100_readbuf_indirect;
+ priv->writebuf = w5100_writebuf_indirect;
+ } else {
+ priv->read = w5100_read_direct;
+ priv->write = w5100_write_direct;
+ priv->read16 = w5100_read16_direct;
+ priv->write16 = w5100_write16_direct;
+ priv->readbuf = w5100_readbuf_direct;
+ priv->writebuf = w5100_writebuf_direct;
+ }
+
+ w5100_hw_reset(priv);
+ if (w5100_read16(priv, W5100_RTR) != RTR_DEFAULT)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = request_irq(irq, w5100_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_any_context_irq(priv->link_irq, w5100_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5100_probe(struct platform_device *pdev)
+{
+ struct w5100_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5100_netdev_ops;
+ ndev->ethtool_ops = &w5100_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5100_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5100_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5100_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ w5100_hw_reset(priv);
+ free_irq(priv->irq, ndev);
+ if (gpio_is_valid(priv->link_gpio))
+ free_irq(priv->link_irq, ndev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5100_suspend(struct platform_device *pdev, pm_message_t mesg)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5100_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5100_resume(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5100_pm_ops, w5100_suspend, w5100_resume);
+
+static struct platform_driver w5100_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5100_pm_ops,
+ },
+ .probe = w5100_probe,
+ .remove = __devexit_p(w5100_remove),
+};
+
+module_platform_driver(w5100_driver);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH v8 0/2] Ethernet drivers for WIZnet chips
2012-04-04 11:57 ` [PATCH v8 " Mike Sinkovsky
@ 2012-04-05 1:15 ` David Miller
2012-04-05 5:36 ` Mike Sinkovsky
0 siblings, 1 reply; 49+ messages in thread
From: David Miller @ 2012-04-05 1:15 UTC (permalink / raw)
To: msink; +Cc: netdev, linux-kernel, broonie, msink
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: Text/Plain; charset=iso-8859-7, Size: 2530 bytes --]
From: Mike Sinkovsky <msink@trikom.ru>
Date: Wed, 4 Apr 2012 17:57:38 +0600
> From: Mike Sinkovsky <msink@permonline.ru>
>
> Based on original driver from chip manufacturer, but nearly full rewite.
> Tested and used in production with Blackfin BF531 embedded processor.
>
> Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
I don't see the appropriate changes in your patches to make
sure that drivers/net/ethernet/{Kconfig,Makefile} consider
and traverse down into the wiznet/ subdirectory.
Furthermore, once that is fixed these drivers generate warnings
when built:
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ¡w5300_pm_ops.suspend¢) [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ¡w5300_pm_ops.resume¢) [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ¡w5300_pm_ops.freeze¢) [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ¡w5300_pm_ops.thaw¢) [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ¡w5300_pm_ops.poweroff¢) [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ¡w5300_pm_ops.restore¢) [enabled by default]
It seems that the arguments and return types for these operations have
changed since you worked on these patches, but this should be easy
to fix up.
Please cure these two issues and I'll happily put these new drivers
into net-next, and meanwhile you can continue to work with Eric
Dumazet to correct the TX flow control and locking issues.
Thanks.
ÿôèº{.nÇ+‰·Ÿ®‰†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a¢f£¢·hšïêÿ‘êçz_è®\x03(階ŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨èÚ&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v9 0/2] Ethernet drivers for WIZnet chips
2012-04-04 12:08 ` [PATCH v8 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
@ 2012-04-05 5:33 ` Mike Sinkovsky
2012-04-05 5:47 ` David Miller
2012-04-05 5:33 ` [PATCH v9 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-05 5:33 ` [PATCH v9 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
2 siblings, 1 reply; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-05 5:33 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
v9:
- fixed suspend()/restore() parameters
- restored references to wiznet/ subdirectory in
drivers/net/ethernet/{Kconfig,Makefile}, somewhat lost when
rebasing to net-next tree
v8:
- use plain request_irq() and request_any_context_irq() in probe(),
and free_irq() in remove(), to avoid races when removing driver
v7:
- new tx flow control, configurable from Kconfig
v6:
- remove (S0_TX_FSR < skb->len) check in TX handler, it doesn't work
anyway. Chip can transmit only one frame with MTU 1500 at a time,
and tx buffer size is bigger.
- move link_gpio from RES_IO resource to wiznet_platform_data
- remove dependency (ARM || BLACKFIN) - should work on any arch
- interrupt handler returns IRQ_NONE if status register is zero
- use devm_request_threaded_irq for request detect_link handler
- remove dev_info if probe failed
v5:
- added driver for WIZnet W5100
- disabled VLAN (NETIF_F_VLAN_CHALLENGED)
v4:
- netif_stop_queue if tx fifo is full, netif_wake_queue in interrupt
- use netif_info macro
v3:
- reading macaddr from platform_data
- ethtool: get_link, get_msglevel, set_msglevel
- more cleanups
v2:
- corrected handling of NET_ADDR_RANDOM flag
- support for WIZNET_BUS_ANY mode
- link detection using gpio
- registers read using ethtool
- more cleanups
^ permalink raw reply [flat|nested] 49+ messages in thread
* [PATCH v9 1/2] Ethernet driver for the WIZnet W5300 chip
2012-04-04 12:08 ` [PATCH v8 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
2012-04-05 5:33 ` [PATCH v9 " Mike Sinkovsky
@ 2012-04-05 5:33 ` Mike Sinkovsky
2012-04-05 5:33 ` [PATCH v9 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
2 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-05 5:33 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/Kconfig | 1 +
drivers/net/ethernet/Makefile | 1 +
drivers/net/ethernet/wiznet/Kconfig | 65 +++
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5300.c | 722 ++++++++++++++++++++++++++++++++++
include/linux/platform_data/wiznet.h | 24 ++
6 files changed, 814 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/Kconfig
create mode 100644 drivers/net/ethernet/wiznet/Makefile
create mode 100644 drivers/net/ethernet/wiznet/w5300.c
create mode 100644 include/linux/platform_data/wiznet.h
diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index c63a64c..a11af5c 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -174,6 +174,7 @@ source "drivers/net/ethernet/tile/Kconfig"
source "drivers/net/ethernet/toshiba/Kconfig"
source "drivers/net/ethernet/tundra/Kconfig"
source "drivers/net/ethernet/via/Kconfig"
+source "drivers/net/ethernet/wiznet/Kconfig"
source "drivers/net/ethernet/xilinx/Kconfig"
source "drivers/net/ethernet/xircom/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 9676a51..878ad32 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -73,5 +73,6 @@ obj-$(CONFIG_TILE_NET) += tile/
obj-$(CONFIG_NET_VENDOR_TOSHIBA) += toshiba/
obj-$(CONFIG_NET_VENDOR_TUNDRA) += tundra/
obj-$(CONFIG_NET_VENDOR_VIA) += via/
+obj-$(CONFIG_NET_VENDOR_WIZNET) += wiznet/
obj-$(CONFIG_NET_VENDOR_XILINX) += xilinx/
obj-$(CONFIG_NET_VENDOR_XIRCOM) += xircom/
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
new file mode 100644
index 0000000..f45cef1
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -0,0 +1,65 @@
+#
+# WIZnet devices configuration
+#
+
+config NET_VENDOR_WIZNET
+ bool "WIZnet devices"
+ default y
+ ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y
+ and read the Ethernet-HOWTO, available from
+ <http://www.tldp.org/docs.html#howto>.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about WIZnet devices. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_WIZNET
+
+config WIZNET_W5300
+ tristate "WIZnet W5300 Ethernet support"
+ ---help---
+ Support for WIZnet W5300 chips.
+
+ W5300 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5300.
+
+choice
+ prompt "WIZnet interface mode"
+ default WIZNET_BUS_ANY
+
+config WIZNET_BUS_DIRECT
+ bool "Direct address bus mode"
+ ---help---
+ In direct address mode host system can directly access all registers
+ after mapping to Memory-Mapped I/O space.
+
+config WIZNET_BUS_INDIRECT
+ bool "Indirect address bus mode"
+ ---help---
+ In indirect address mode host system indirectly accesses registers
+ using Indirect Mode Address Register and Indirect Mode Data Register,
+ which are directly mapped to Memory-Mapped I/O space.
+
+config WIZNET_BUS_ANY
+ bool "Select interface mode in runtime"
+ ---help---
+ If interface mode is unknown in compile time, it can be selected
+ in runtime from board/platform resources configuration.
+
+ Performance may decrease compared to explicitly selected bus mode.
+endchoice
+
+config WIZNET_TX_FLOW
+ bool "Use transmit flow control"
+ default y
+ help
+ This enables transmit flow control for WIZnet chips.
+ If unsure, say Y.
+
+endif # NET_VENDOR_WIZNET
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
new file mode 100644
index 0000000..88e0a3e
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
new file mode 100644
index 0000000..88afde9
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -0,0 +1,722 @@
+/*
+ * Ethernet driver for the WIZnet W5300 chip.
+ *
+ * Copyright (C) 2008-2009 WIZnet Co.,Ltd.
+ * Copyright (C) 2011 Taehun Kim <kth3321 <at> gmail.com>
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kconfig.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5300"
+#define DRV_VERSION "2012-04-04"
+
+MODULE_DESCRIPTION("WIZnet W5300 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5300_MR 0x0000 /* Mode Register */
+#define MR_DBW (1 << 15) /* Data bus width */
+#define MR_MPF (1 << 14) /* Mac layer pause frame */
+#define MR_WDF(n) (((n)&7)<<11) /* Write data fetch time */
+#define MR_RDH (1 << 10) /* Read data hold time */
+#define MR_FS (1 << 8) /* FIFO swap */
+#define MR_RST (1 << 7) /* S/W reset */
+#define MR_PB (1 << 4) /* Ping block */
+#define MR_DBS (1 << 2) /* Data bus swap */
+#define MR_IND (1 << 0) /* Indirect mode */
+#define W5300_IR 0x0002 /* Interrupt Register */
+#define W5300_IMR 0x0004 /* Interrupt Mask Register */
+#define IR_S0 0x0001 /* S0 interrupt */
+#define W5300_SHARL 0x0008 /* Source MAC address (0123) */
+#define W5300_SHARH 0x000c /* Source MAC address (45) */
+#define W5300_TMSRL 0x0020 /* Transmit Memory Size (0123) */
+#define W5300_TMSRH 0x0024 /* Transmit Memory Size (4567) */
+#define W5300_RMSRL 0x0028 /* Receive Memory Size (0123) */
+#define W5300_RMSRH 0x002c /* Receive Memory Size (4567) */
+#define W5300_MTYPE 0x0030 /* Memory Type */
+#define W5300_IDR 0x00fe /* Chip ID register */
+#define IDR_W5300 0x5300 /* =0x5300 for WIZnet W5300 */
+#define W5300_S0_MR 0x0200 /* S0 Mode Register */
+#define S0_MR_CLOSED 0x0000 /* Close mode */
+#define S0_MR_MACRAW 0x0004 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x0044 /* MAC RAW mode (filtered) */
+#define W5300_S0_CR 0x0202 /* S0 Command Register */
+#define S0_CR_OPEN 0x0001 /* OPEN command */
+#define S0_CR_CLOSE 0x0010 /* CLOSE command */
+#define S0_CR_SEND 0x0020 /* SEND command */
+#define S0_CR_RECV 0x0040 /* RECV command */
+#define W5300_S0_IMR 0x0204 /* S0 Interrupt Mask Register */
+#define W5300_S0_IR 0x0206 /* S0 Interrupt Register */
+#define S0_IR_RECV 0x0004 /* Receive interrupt */
+#define S0_IR_SENDOK 0x0010 /* Send OK interrupt */
+#define W5300_S0_SSR 0x0208 /* S0 Socket Status Register */
+#define W5300_S0_TX_WRSR 0x0220 /* S0 TX Write Size Register */
+#define W5300_S0_TX_FSR 0x0224 /* S0 TX Free Size Register */
+#define W5300_S0_RX_RSR 0x0228 /* S0 Received data Size */
+#define W5300_S0_TX_FIFO 0x022e /* S0 Transmit FIFO */
+#define W5300_S0_RX_FIFO 0x0230 /* S0 Receive FIFO */
+#define W5300_REGS_LEN 0x0400
+
+/*
+ * Device driver private data structure
+ */
+struct w5300_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u16 (*read) (struct w5300_priv *priv, u16 addr);
+ void (*write)(struct w5300_priv *priv, u16 addr, u16 data);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5300 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x400 bytes are required for memory space.
+ */
+static inline u16 w5300_read_direct(struct w5300_priv *priv, u16 addr)
+{
+ return ioread16(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5300_write_direct(struct w5300_priv *priv,
+ u16 addr, u16 data)
+{
+ iowrite16(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x06 bytes are required for memory space.
+ */
+#define W5300_IDM_AR 0x0002 /* Indirect Mode Address */
+#define W5300_IDM_DR 0x0004 /* Indirect Mode Data */
+
+static u16 w5300_read_indirect(struct w5300_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ data = w5300_read_direct(priv, W5300_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5300_write_indirect(struct w5300_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5300_write_direct(priv, W5300_IDM_AR, addr);
+ mmiowb();
+ w5300_write_direct(priv, W5300_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5300_read w5300_read_direct
+#define w5300_write w5300_write_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5300_read w5300_read_indirect
+#define w5300_write w5300_write_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5300_read priv->read
+#define w5300_write priv->write
+#endif
+
+static u32 w5300_read32(struct w5300_priv *priv, u16 addr)
+{
+ u32 data;
+ data = w5300_read(priv, addr) << 16;
+ data |= w5300_read(priv, addr + 2);
+ return data;
+}
+
+static void w5300_write32(struct w5300_priv *priv, u16 addr, u32 data)
+{
+ w5300_write(priv, addr, data >> 16);
+ w5300_write(priv, addr + 2, data);
+}
+
+static int w5300_command(struct w5300_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5300_write(priv, W5300_S0_CR, cmd);
+ mmiowb();
+
+ while (w5300_read(priv, W5300_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5300_read_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ *buf++ = fifo >> 8;
+ *buf++ = fifo;
+ }
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+ fifo = w5300_read(priv, W5300_S0_RX_FIFO);
+}
+
+static void w5300_write_frame(struct w5300_priv *priv, u8 *buf, int len)
+{
+ u16 fifo;
+ int i;
+
+ for (i = 0; i < len; i += 2) {
+ fifo = *buf++ << 8;
+ fifo |= *buf++;
+ w5300_write(priv, W5300_S0_TX_FIFO, fifo);
+ }
+ w5300_write32(priv, W5300_S0_TX_WRSR, len);
+}
+
+static void w5300_write_macaddr(struct w5300_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ w5300_write32(priv, W5300_SHARL,
+ ndev->dev_addr[0] << 24 |
+ ndev->dev_addr[1] << 16 |
+ ndev->dev_addr[2] << 8 |
+ ndev->dev_addr[3]);
+ w5300_write(priv, W5300_SHARH,
+ ndev->dev_addr[4] << 8 |
+ ndev->dev_addr[5]);
+ mmiowb();
+}
+
+static void w5300_hw_reset(struct w5300_priv *priv)
+{
+ w5300_write_direct(priv, W5300_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5300_write_direct(priv, W5300_MR, priv->indirect ?
+ MR_WDF(7) | MR_PB | MR_IND :
+ MR_WDF(7) | MR_PB);
+ mmiowb();
+ w5300_write(priv, W5300_IMR, 0);
+ w5300_write_macaddr(priv);
+
+ /* Configure 128K of internal memory
+ * as 64K RX fifo and 64K TX fifo
+ */
+ w5300_write32(priv, W5300_RMSRL, 64 << 24);
+ w5300_write32(priv, W5300_RMSRH, 0);
+ w5300_write32(priv, W5300_TMSRL, 64 << 24);
+ w5300_write32(priv, W5300_TMSRH, 0);
+ w5300_write(priv, W5300_MTYPE, 0x00ff);
+ mmiowb();
+}
+
+static void w5300_hw_start(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5300_command(priv, S0_CR_OPEN);
+ w5300_write(priv, W5300_S0_IMR, IS_ENABLED(CONFIG_WIZNET_TX_FLOW) ?
+ S0_IR_RECV | S0_IR_SENDOK :
+ S0_IR_RECV);
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5300_hw_close(struct w5300_priv *priv)
+{
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ w5300_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5300_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5300_get_link(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5300_get_msglevel(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5300_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5300_get_regs_len(struct net_device *ndev)
+{
+ return W5300_REGS_LEN;
+}
+
+static void w5300_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 addr;
+ u16 data;
+
+ regs->version = 1;
+ for (addr = 0; addr < W5300_REGS_LEN; addr += 2) {
+ switch (addr & 0x23f) {
+ case W5300_S0_TX_FIFO: /* cannot read TX_FIFO */
+ case W5300_S0_RX_FIFO: /* cannot read RX_FIFO */
+ data = 0xffff;
+ break;
+ default:
+ data = w5300_read(priv, addr);
+ break;
+ }
+ *buf++ = data >> 8;
+ *buf++ = data;
+ }
+}
+
+static void w5300_tx_timeout(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5300_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
+ netif_stop_queue(ndev);
+
+ w5300_write_frame(priv, skb->data, skb->len);
+ mmiowb();
+ ndev->stats.tx_packets++;
+ ndev->stats.tx_bytes += skb->len;
+ dev_kfree_skb(skb);
+ netif_dbg(priv, tx_queued, ndev, "tx queued\n");
+
+ w5300_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5300_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5300_priv *priv = container_of(napi, struct w5300_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u32 rx_fifo_len = w5300_read32(priv, W5300_S0_RX_RSR);
+ if (rx_fifo_len == 0)
+ break;
+
+ rx_len = w5300_read(priv, W5300_S0_RX_FIFO);
+
+ skb = netdev_alloc_skb_ip_align(ndev, roundup(rx_len, 2));
+ if (unlikely(!skb)) {
+ u32 i;
+ for (i = 0; i < rx_fifo_len; i += 2)
+ w5300_read(priv, W5300_S0_RX_FIFO);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5300_read_frame(priv, skb->data, rx_len);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5300_write(priv, W5300_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5300_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ int ir = w5300_read(priv, W5300_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5300_write(priv, W5300_S0_IR, ir);
+ mmiowb();
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
+ netif_dbg(priv, tx_done, ndev, "tx done\n");
+ netif_wake_queue(ndev);
+ }
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5300_write(priv, W5300_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5300_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5300_set_rx_mode(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5300_hw_start(priv);
+ }
+}
+
+static int w5300_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5300_write_macaddr(priv);
+ return 0;
+}
+
+static int w5300_open(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5300_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5300_stop(struct net_device *ndev)
+{
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5300_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5300_ethtool_ops = {
+ .get_drvinfo = w5300_get_drvinfo,
+ .get_msglevel = w5300_get_msglevel,
+ .set_msglevel = w5300_set_msglevel,
+ .get_link = w5300_get_link,
+ .get_regs_len = w5300_get_regs_len,
+ .get_regs = w5300_get_regs,
+};
+
+static const struct net_device_ops w5300_netdev_ops = {
+ .ndo_open = w5300_open,
+ .ndo_stop = w5300_stop,
+ .ndo_start_xmit = w5300_start_tx,
+ .ndo_tx_timeout = w5300_tx_timeout,
+ .ndo_set_rx_mode = w5300_set_rx_mode,
+ .ndo_set_mac_address = w5300_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5300_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5300_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5300_read_indirect;
+ priv->write = w5300_write_indirect;
+ } else {
+ priv->read = w5300_read_direct;
+ priv->write = w5300_write_direct;
+ }
+
+ w5300_hw_reset(priv);
+ if (w5300_read(priv, W5300_IDR) != IDR_W5300)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = request_irq(irq, w5300_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_any_context_irq(priv->link_irq, w5300_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5300_probe(struct platform_device *pdev)
+{
+ struct w5300_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5300_netdev_ops;
+ ndev->ethtool_ops = &w5300_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5300_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5300_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5300_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ w5300_hw_reset(priv);
+ free_irq(priv->irq, ndev);
+ if (gpio_is_valid(priv->link_gpio))
+ free_irq(priv->link_irq, ndev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5300_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5300_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5300_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5300_priv *priv = netdev_priv(ndev);
+
+ if (!netif_running(ndev)) {
+ w5300_hw_reset(priv);
+ w5300_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5300_pm_ops, w5300_suspend, w5300_resume);
+
+static struct platform_driver w5300_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5300_pm_ops,
+ },
+ .probe = w5300_probe,
+ .remove = __devexit_p(w5300_remove),
+};
+
+module_platform_driver(w5300_driver);
diff --git a/include/linux/platform_data/wiznet.h b/include/linux/platform_data/wiznet.h
new file mode 100644
index 0000000..b5d8c19
--- /dev/null
+++ b/include/linux/platform_data/wiznet.h
@@ -0,0 +1,24 @@
+/*
+ * Ethernet driver for the WIZnet W5x00 chip.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef PLATFORM_DATA_WIZNET_H
+#define PLATFORM_DATA_WIZNET_H
+
+#include <linux/if_ether.h>
+
+struct wiznet_platform_data {
+ int link_gpio;
+ u8 mac_addr[ETH_ALEN];
+};
+
+#ifndef CONFIG_WIZNET_BUS_SHIFT
+#define CONFIG_WIZNET_BUS_SHIFT 0
+#endif
+
+#define W5100_BUS_DIRECT_SIZE (0x8000 << CONFIG_WIZNET_BUS_SHIFT)
+#define W5300_BUS_DIRECT_SIZE (0x0400 << CONFIG_WIZNET_BUS_SHIFT)
+
+#endif /* PLATFORM_DATA_WIZNET_H */
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* [PATCH v9 2/2] Ethernet driver for the WIZnet W5100 chip
2012-04-04 12:08 ` [PATCH v8 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
2012-04-05 5:33 ` [PATCH v9 " Mike Sinkovsky
2012-04-05 5:33 ` [PATCH v9 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
@ 2012-04-05 5:33 ` Mike Sinkovsky
2 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-05 5:33 UTC (permalink / raw)
To: netdev, linux-kernel, broonie; +Cc: Mike Sinkovsky
Based on original driver from chip manufacturer, but nearly full rewite.
Tested and used in production with Blackfin BF531 embedded processor.
Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
---
drivers/net/ethernet/wiznet/Kconfig | 12 +
drivers/net/ethernet/wiznet/Makefile | 1 +
drivers/net/ethernet/wiznet/w5100.c | 808 ++++++++++++++++++++++++++++++++++
3 files changed, 821 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/ethernet/wiznet/w5100.c
diff --git a/drivers/net/ethernet/wiznet/Kconfig b/drivers/net/ethernet/wiznet/Kconfig
index f45cef1..2bb383c 100644
--- a/drivers/net/ethernet/wiznet/Kconfig
+++ b/drivers/net/ethernet/wiznet/Kconfig
@@ -17,6 +17,18 @@ config NET_VENDOR_WIZNET
if NET_VENDOR_WIZNET
+config WIZNET_W5100
+ tristate "WIZnet W5100 Ethernet support"
+ ---help---
+ Support for WIZnet W5100 chips.
+
+ W5100 is a single chip with integrated 10/100 Ethernet MAC,
+ PHY and hardware TCP/IP stack, but this driver is limited to
+ the MAC and PHY functions only, onchip TCP/IP is unused.
+
+ To compile this driver as a module, choose M here: the module
+ will be called w5100.
+
config WIZNET_W5300
tristate "WIZnet W5300 Ethernet support"
---help---
diff --git a/drivers/net/ethernet/wiznet/Makefile b/drivers/net/ethernet/wiznet/Makefile
index 88e0a3e..c614535 100644
--- a/drivers/net/ethernet/wiznet/Makefile
+++ b/drivers/net/ethernet/wiznet/Makefile
@@ -1 +1,2 @@
+obj-$(CONFIG_WIZNET_W5100) += w5100.o
obj-$(CONFIG_WIZNET_W5300) += w5300.o
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
new file mode 100644
index 0000000..c28e1d5
--- /dev/null
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -0,0 +1,808 @@
+/*
+ * Ethernet driver for the WIZnet W5100 chip.
+ *
+ * Copyright (C) 2006-2008 WIZnet Co.,Ltd.
+ * Copyright (C) 2012 Mike Sinkovsky <msink@permonline.ru>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kconfig.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/wiznet.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/gpio.h>
+
+#define DRV_NAME "w5100"
+#define DRV_VERSION "2012-04-04"
+
+MODULE_DESCRIPTION("WIZnet W5100 Ethernet driver v"DRV_VERSION);
+MODULE_AUTHOR("Mike Sinkovsky <msink@permonline.ru>");
+MODULE_ALIAS("platform:"DRV_NAME);
+MODULE_LICENSE("GPL");
+
+/*
+ * Registers
+ */
+#define W5100_COMMON_REGS 0x0000
+#define W5100_MR 0x0000 /* Mode Register */
+#define MR_RST 0x80 /* S/W reset */
+#define MR_PB 0x10 /* Ping block */
+#define MR_AI 0x02 /* Address Auto-Increment */
+#define MR_IND 0x01 /* Indirect mode */
+#define W5100_SHAR 0x0009 /* Source MAC address */
+#define W5100_IR 0x0015 /* Interrupt Register */
+#define W5100_IMR 0x0016 /* Interrupt Mask Register */
+#define IR_S0 0x01 /* S0 interrupt */
+#define W5100_RTR 0x0017 /* Retry Time-value Register */
+#define RTR_DEFAULT 2000 /* =0x07d0 (2000) */
+#define W5100_RMSR 0x001a /* Receive Memory Size */
+#define W5100_TMSR 0x001b /* Transmit Memory Size */
+#define W5100_COMMON_REGS_LEN 0x0040
+
+#define W5100_S0_REGS 0x0400
+#define W5100_S0_MR 0x0400 /* S0 Mode Register */
+#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscous) */
+#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
+#define W5100_S0_CR 0x0401 /* S0 Command Register */
+#define S0_CR_OPEN 0x01 /* OPEN command */
+#define S0_CR_CLOSE 0x10 /* CLOSE command */
+#define S0_CR_SEND 0x20 /* SEND command */
+#define S0_CR_RECV 0x40 /* RECV command */
+#define W5100_S0_IR 0x0402 /* S0 Interrupt Register */
+#define S0_IR_SENDOK 0x10 /* complete sending */
+#define S0_IR_RECV 0x04 /* receiving data */
+#define W5100_S0_SR 0x0403 /* S0 Status Register */
+#define S0_SR_MACRAW 0x42 /* mac raw mode */
+#define W5100_S0_TX_FSR 0x0420 /* S0 Transmit free memory size */
+#define W5100_S0_TX_RD 0x0422 /* S0 Transmit memory read pointer */
+#define W5100_S0_TX_WR 0x0424 /* S0 Transmit memory write pointer */
+#define W5100_S0_RX_RSR 0x0426 /* S0 Receive free memory size */
+#define W5100_S0_RX_RD 0x0428 /* S0 Receive memory read pointer */
+#define W5100_S0_REGS_LEN 0x0040
+
+#define W5100_TX_MEM_START 0x4000
+#define W5100_TX_MEM_END 0x5fff
+#define W5100_TX_MEM_MASK 0x1fff
+#define W5100_RX_MEM_START 0x6000
+#define W5100_RX_MEM_END 0x7fff
+#define W5100_RX_MEM_MASK 0x1fff
+
+/*
+ * Device driver private data structure
+ */
+struct w5100_priv {
+ void __iomem *base;
+ spinlock_t reg_lock;
+ bool indirect;
+ u8 (*read)(struct w5100_priv *priv, u16 addr);
+ void (*write)(struct w5100_priv *priv, u16 addr, u8 data);
+ u16 (*read16)(struct w5100_priv *priv, u16 addr);
+ void (*write16)(struct w5100_priv *priv, u16 addr, u16 data);
+ void (*readbuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ void (*writebuf)(struct w5100_priv *priv, u16 addr, u8 *buf, int len);
+ int irq;
+ int link_irq;
+ int link_gpio;
+
+ struct napi_struct napi;
+ struct net_device *ndev;
+ bool promisc;
+ u32 msg_enable;
+};
+
+/************************************************************************
+ *
+ * Lowlevel I/O functions
+ *
+ ***********************************************************************/
+
+/*
+ * In direct address mode host system can directly access W5100 registers
+ * after mapping to Memory-Mapped I/O space.
+ *
+ * 0x8000 bytes are required for memory space.
+ */
+static inline u8 w5100_read_direct(struct w5100_priv *priv, u16 addr)
+{
+ return ioread8(priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static inline void w5100_write_direct(struct w5100_priv *priv,
+ u16 addr, u8 data)
+{
+ iowrite8(data, priv->base + (addr << CONFIG_WIZNET_BUS_SHIFT));
+}
+
+static u16 w5100_read16_direct(struct w5100_priv *priv, u16 addr)
+{
+ u16 data;
+ data = w5100_read_direct(priv, addr) << 8;
+ data |= w5100_read_direct(priv, addr + 1);
+ return data;
+}
+
+static void w5100_write16_direct(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ w5100_write_direct(priv, addr, data >> 8);
+ w5100_write_direct(priv, addr + 1, data);
+}
+
+static void w5100_readbuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END))
+ addr = W5100_RX_MEM_START;
+ *buf++ = w5100_read_direct(priv, addr);
+ }
+}
+
+static void w5100_writebuf_direct(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ int i;
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END))
+ addr = W5100_TX_MEM_START;
+ w5100_write_direct(priv, addr, *buf++);
+ }
+}
+
+/*
+ * In indirect address mode host system indirectly accesses registers by
+ * using Indirect Mode Address Register (IDM_AR) and Indirect Mode Data
+ * Register (IDM_DR), which are directly mapped to Memory-Mapped I/O space.
+ * Mode Register (MR) is directly accessible.
+ *
+ * Only 0x04 bytes are required for memory space.
+ */
+#define W5100_IDM_AR 0x01 /* Indirect Mode Address Register */
+#define W5100_IDM_DR 0x03 /* Indirect Mode Data Register */
+
+static u8 w5100_read_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u8 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write_indirect(struct w5100_priv *priv, u16 addr, u8 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static u16 w5100_read16_indirect(struct w5100_priv *priv, u16 addr)
+{
+ unsigned long flags;
+ u16 data;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ data = w5100_read_direct(priv, W5100_IDM_DR) << 8;
+ data |= w5100_read_direct(priv, W5100_IDM_DR);
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+
+ return data;
+}
+
+static void w5100_write16_indirect(struct w5100_priv *priv, u16 addr, u16 data)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ w5100_write_direct(priv, W5100_IDM_DR, data >> 8);
+ w5100_write_direct(priv, W5100_IDM_DR, data);
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_readbuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_RX_MEM_START + (offset & W5100_RX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_RX_MEM_END)) {
+ addr = W5100_RX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ *buf++ = w5100_read_direct(priv, W5100_IDM_DR);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+static void w5100_writebuf_indirect(struct w5100_priv *priv,
+ u16 offset, u8 *buf, int len)
+{
+ u16 addr = W5100_TX_MEM_START + (offset & W5100_TX_MEM_MASK);
+ unsigned long flags;
+ int i;
+
+ spin_lock_irqsave(&priv->reg_lock, flags);
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+
+ for (i = 0; i < len; i++, addr++) {
+ if (unlikely(addr > W5100_TX_MEM_END)) {
+ addr = W5100_TX_MEM_START;
+ w5100_write16_direct(priv, W5100_IDM_AR, addr);
+ mmiowb();
+ }
+ w5100_write_direct(priv, W5100_IDM_DR, *buf++);
+ }
+ mmiowb();
+ spin_unlock_irqrestore(&priv->reg_lock, flags);
+}
+
+#if defined(CONFIG_WIZNET_BUS_DIRECT)
+#define w5100_read w5100_read_direct
+#define w5100_write w5100_write_direct
+#define w5100_read16 w5100_read16_direct
+#define w5100_write16 w5100_write16_direct
+#define w5100_readbuf w5100_readbuf_direct
+#define w5100_writebuf w5100_writebuf_direct
+
+#elif defined(CONFIG_WIZNET_BUS_INDIRECT)
+#define w5100_read w5100_read_indirect
+#define w5100_write w5100_write_indirect
+#define w5100_read16 w5100_read16_indirect
+#define w5100_write16 w5100_write16_indirect
+#define w5100_readbuf w5100_readbuf_indirect
+#define w5100_writebuf w5100_writebuf_indirect
+
+#else /* CONFIG_WIZNET_BUS_ANY */
+#define w5100_read priv->read
+#define w5100_write priv->write
+#define w5100_read16 priv->read16
+#define w5100_write16 priv->write16
+#define w5100_readbuf priv->readbuf
+#define w5100_writebuf priv->writebuf
+#endif
+
+static int w5100_command(struct w5100_priv *priv, u16 cmd)
+{
+ unsigned long timeout = jiffies + msecs_to_jiffies(100);
+
+ w5100_write(priv, W5100_S0_CR, cmd);
+ mmiowb();
+
+ while (w5100_read(priv, W5100_S0_CR) != 0) {
+ if (time_after(jiffies, timeout))
+ return -EIO;
+ cpu_relax();
+ }
+
+ return 0;
+}
+
+static void w5100_write_macaddr(struct w5100_priv *priv)
+{
+ struct net_device *ndev = priv->ndev;
+ int i;
+
+ for (i = 0; i < ETH_ALEN; i++)
+ w5100_write(priv, W5100_SHAR + i, ndev->dev_addr[i]);
+ mmiowb();
+}
+
+static void w5100_hw_reset(struct w5100_priv *priv)
+{
+ w5100_write_direct(priv, W5100_MR, MR_RST);
+ mmiowb();
+ mdelay(5);
+ w5100_write_direct(priv, W5100_MR, priv->indirect ?
+ MR_PB | MR_AI | MR_IND :
+ MR_PB);
+ mmiowb();
+ w5100_write(priv, W5100_IMR, 0);
+ w5100_write_macaddr(priv);
+
+ /* Configure 16K of internal memory
+ * as 8K RX buffer and 8K TX buffer
+ */
+ w5100_write(priv, W5100_RMSR, 0x03);
+ w5100_write(priv, W5100_TMSR, 0x03);
+ mmiowb();
+}
+
+static void w5100_hw_start(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_S0_MR, priv->promisc ?
+ S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ mmiowb();
+ w5100_command(priv, S0_CR_OPEN);
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+}
+
+static void w5100_hw_close(struct w5100_priv *priv)
+{
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ w5100_command(priv, S0_CR_CLOSE);
+}
+
+/***********************************************************************
+ *
+ * Device driver functions / callbacks
+ *
+ ***********************************************************************/
+
+static void w5100_get_drvinfo(struct net_device *ndev,
+ struct ethtool_drvinfo *info)
+{
+ strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
+ strlcpy(info->version, DRV_VERSION, sizeof(info->version));
+ strlcpy(info->bus_info, dev_name(ndev->dev.parent),
+ sizeof(info->bus_info));
+}
+
+static u32 w5100_get_link(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (gpio_is_valid(priv->link_gpio))
+ return !!gpio_get_value(priv->link_gpio);
+
+ return 1;
+}
+
+static u32 w5100_get_msglevel(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ return priv->msg_enable;
+}
+
+static void w5100_set_msglevel(struct net_device *ndev, u32 value)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ priv->msg_enable = value;
+}
+
+static int w5100_get_regs_len(struct net_device *ndev)
+{
+ return W5100_COMMON_REGS_LEN + W5100_S0_REGS_LEN;
+}
+
+static void w5100_get_regs(struct net_device *ndev,
+ struct ethtool_regs *regs, void *_buf)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u8 *buf = _buf;
+ u16 i;
+
+ regs->version = 1;
+ for (i = 0; i < W5100_COMMON_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_COMMON_REGS + i);
+ for (i = 0; i < W5100_S0_REGS_LEN; i++)
+ *buf++ = w5100_read(priv, W5100_S0_REGS + i);
+}
+
+static void w5100_tx_timeout(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_stop_queue(ndev);
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+ ndev->stats.tx_errors++;
+ ndev->trans_start = jiffies;
+ netif_wake_queue(ndev);
+}
+
+static int w5100_start_tx(struct sk_buff *skb, struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ u16 offset;
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW))
+ netif_stop_queue(ndev);
+
+ offset = w5100_read16(priv, W5100_S0_TX_WR);
+ w5100_writebuf(priv, offset, skb->data, skb->len);
+ w5100_write16(priv, W5100_S0_TX_WR, offset + skb->len);
+ mmiowb();
+ ndev->stats.tx_bytes += skb->len;
+ ndev->stats.tx_packets++;
+ dev_kfree_skb(skb);
+
+ w5100_command(priv, S0_CR_SEND);
+
+ return NETDEV_TX_OK;
+}
+
+static int w5100_napi_poll(struct napi_struct *napi, int budget)
+{
+ struct w5100_priv *priv = container_of(napi, struct w5100_priv, napi);
+ struct net_device *ndev = priv->ndev;
+ struct sk_buff *skb;
+ int rx_count;
+ u16 rx_len;
+ u16 offset;
+ u8 header[2];
+
+ for (rx_count = 0; rx_count < budget; rx_count++) {
+ u16 rx_buf_len = w5100_read16(priv, W5100_S0_RX_RSR);
+ if (rx_buf_len == 0)
+ break;
+
+ offset = w5100_read16(priv, W5100_S0_RX_RD);
+ w5100_readbuf(priv, offset, header, 2);
+ rx_len = get_unaligned_be16(header) - 2;
+
+ skb = netdev_alloc_skb_ip_align(ndev, rx_len);
+ if (unlikely(!skb)) {
+ w5100_write16(priv, W5100_S0_RX_RD,
+ offset + rx_buf_len);
+ w5100_command(priv, S0_CR_RECV);
+ ndev->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put(skb, rx_len);
+ w5100_readbuf(priv, offset + 2, skb->data, rx_len);
+ w5100_write16(priv, W5100_S0_RX_RD, offset + 2 + rx_len);
+ mmiowb();
+ w5100_command(priv, S0_CR_RECV);
+ skb->protocol = eth_type_trans(skb, ndev);
+
+ netif_receive_skb(skb);
+ ndev->stats.rx_packets++;
+ ndev->stats.rx_bytes += rx_len;
+ }
+
+ if (rx_count < budget) {
+ w5100_write(priv, W5100_IMR, IR_S0);
+ mmiowb();
+ napi_complete(napi);
+ }
+
+ return rx_count;
+}
+
+static irqreturn_t w5100_interrupt(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ int ir = w5100_read(priv, W5100_S0_IR);
+ if (!ir)
+ return IRQ_NONE;
+ w5100_write(priv, W5100_S0_IR, ir);
+ mmiowb();
+
+ if (IS_ENABLED(CONFIG_WIZNET_TX_FLOW) && (ir & S0_IR_SENDOK)) {
+ netif_dbg(priv, tx_done, ndev, "tx done\n");
+ netif_wake_queue(ndev);
+ }
+
+ if (ir & S0_IR_RECV) {
+ if (napi_schedule_prep(&priv->napi)) {
+ w5100_write(priv, W5100_IMR, 0);
+ mmiowb();
+ __napi_schedule(&priv->napi);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t w5100_detect_link(int irq, void *ndev_instance)
+{
+ struct net_device *ndev = ndev_instance;
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ if (gpio_get_value(priv->link_gpio) != 0) {
+ netif_info(priv, link, ndev, "link is up\n");
+ netif_carrier_on(ndev);
+ } else {
+ netif_info(priv, link, ndev, "link is down\n");
+ netif_carrier_off(ndev);
+ }
+ }
+
+ return IRQ_HANDLED;
+}
+
+static void w5100_set_rx_mode(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ bool set_promisc = (ndev->flags & IFF_PROMISC) != 0;
+
+ if (priv->promisc != set_promisc) {
+ priv->promisc = set_promisc;
+ w5100_hw_start(priv);
+ }
+}
+
+static int w5100_set_macaddr(struct net_device *ndev, void *addr)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+ struct sockaddr *sock_addr = addr;
+
+ if (!is_valid_ether_addr(sock_addr->sa_data))
+ return -EADDRNOTAVAIL;
+ memcpy(ndev->dev_addr, sock_addr->sa_data, ETH_ALEN);
+ ndev->addr_assign_type &= ~NET_ADDR_RANDOM;
+ w5100_write_macaddr(priv);
+ return 0;
+}
+
+static int w5100_open(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifup, ndev, "enabling\n");
+ if (!is_valid_ether_addr(ndev->dev_addr))
+ return -EINVAL;
+ w5100_hw_start(priv);
+ napi_enable(&priv->napi);
+ netif_start_queue(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ return 0;
+}
+
+static int w5100_stop(struct net_device *ndev)
+{
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ netif_info(priv, ifdown, ndev, "shutting down\n");
+ w5100_hw_close(priv);
+ netif_carrier_off(ndev);
+ netif_stop_queue(ndev);
+ napi_disable(&priv->napi);
+ return 0;
+}
+
+static const struct ethtool_ops w5100_ethtool_ops = {
+ .get_drvinfo = w5100_get_drvinfo,
+ .get_msglevel = w5100_get_msglevel,
+ .set_msglevel = w5100_set_msglevel,
+ .get_link = w5100_get_link,
+ .get_regs_len = w5100_get_regs_len,
+ .get_regs = w5100_get_regs,
+};
+
+static const struct net_device_ops w5100_netdev_ops = {
+ .ndo_open = w5100_open,
+ .ndo_stop = w5100_stop,
+ .ndo_start_xmit = w5100_start_tx,
+ .ndo_tx_timeout = w5100_tx_timeout,
+ .ndo_set_rx_mode = w5100_set_rx_mode,
+ .ndo_set_mac_address = w5100_set_macaddr,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+};
+
+static int __devinit w5100_hw_probe(struct platform_device *pdev)
+{
+ struct wiznet_platform_data *data = pdev->dev.platform_data;
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+ const char *name = netdev_name(ndev);
+ struct resource *mem;
+ int mem_size;
+ int irq;
+ int ret;
+
+ if (data && is_valid_ether_addr(data->mac_addr)) {
+ memcpy(ndev->dev_addr, data->mac_addr, ETH_ALEN);
+ } else {
+ random_ether_addr(ndev->dev_addr);
+ ndev->addr_assign_type |= NET_ADDR_RANDOM;
+ }
+
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!mem)
+ return -ENXIO;
+ mem_size = resource_size(mem);
+ if (!devm_request_mem_region(&pdev->dev, mem->start, mem_size, name))
+ return -EBUSY;
+ priv->base = devm_ioremap(&pdev->dev, mem->start, mem_size);
+ if (!priv->base)
+ return -EBUSY;
+
+ spin_lock_init(&priv->reg_lock);
+ priv->indirect = mem_size < W5100_BUS_DIRECT_SIZE;
+ if (priv->indirect) {
+ priv->read = w5100_read_indirect;
+ priv->write = w5100_write_indirect;
+ priv->read16 = w5100_read16_indirect;
+ priv->write16 = w5100_write16_indirect;
+ priv->readbuf = w5100_readbuf_indirect;
+ priv->writebuf = w5100_writebuf_indirect;
+ } else {
+ priv->read = w5100_read_direct;
+ priv->write = w5100_write_direct;
+ priv->read16 = w5100_read16_direct;
+ priv->write16 = w5100_write16_direct;
+ priv->readbuf = w5100_readbuf_direct;
+ priv->writebuf = w5100_writebuf_direct;
+ }
+
+ w5100_hw_reset(priv);
+ if (w5100_read16(priv, W5100_RTR) != RTR_DEFAULT)
+ return -ENODEV;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0)
+ return irq;
+ ret = request_irq(irq, w5100_interrupt,
+ IRQ_TYPE_LEVEL_LOW, name, ndev);
+ if (ret < 0)
+ return ret;
+ priv->irq = irq;
+
+ priv->link_gpio = data->link_gpio;
+ if (gpio_is_valid(priv->link_gpio)) {
+ char *link_name = devm_kzalloc(&pdev->dev, 16, GFP_KERNEL);
+ if (!link_name)
+ return -ENOMEM;
+ snprintf(link_name, 16, "%s-link", name);
+ priv->link_irq = gpio_to_irq(priv->link_gpio);
+ if (request_any_context_irq(priv->link_irq, w5100_detect_link,
+ IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+ link_name, priv->ndev) < 0)
+ priv->link_gpio = -EINVAL;
+ }
+
+ netdev_info(ndev, "at 0x%llx irq %d\n", (u64)mem->start, irq);
+ return 0;
+}
+
+static int __devinit w5100_probe(struct platform_device *pdev)
+{
+ struct w5100_priv *priv;
+ struct net_device *ndev;
+ int err;
+
+ ndev = alloc_etherdev(sizeof(*priv));
+ if (!ndev)
+ return -ENOMEM;
+ SET_NETDEV_DEV(ndev, &pdev->dev);
+ platform_set_drvdata(pdev, ndev);
+ priv = netdev_priv(ndev);
+ priv->ndev = ndev;
+
+ ether_setup(ndev);
+ ndev->netdev_ops = &w5100_netdev_ops;
+ ndev->ethtool_ops = &w5100_ethtool_ops;
+ ndev->watchdog_timeo = HZ;
+ netif_napi_add(ndev, &priv->napi, w5100_napi_poll, 16);
+
+ /* This chip doesn't support VLAN packets with normal MTU,
+ * so disable VLAN for this device.
+ */
+ ndev->features |= NETIF_F_VLAN_CHALLENGED;
+
+ err = register_netdev(ndev);
+ if (err < 0)
+ goto err_register;
+
+ err = w5100_hw_probe(pdev);
+ if (err < 0)
+ goto err_hw_probe;
+
+ return 0;
+
+err_hw_probe:
+ unregister_netdev(ndev);
+err_register:
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return err;
+}
+
+static int __devexit w5100_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ w5100_hw_reset(priv);
+ free_irq(priv->irq, ndev);
+ if (gpio_is_valid(priv->link_gpio))
+ free_irq(priv->link_irq, ndev);
+
+ unregister_netdev(ndev);
+ free_netdev(ndev);
+ platform_set_drvdata(pdev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int w5100_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ netif_carrier_off(ndev);
+ netif_device_detach(ndev);
+
+ w5100_hw_close(priv);
+ }
+ return 0;
+}
+
+static int w5100_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct w5100_priv *priv = netdev_priv(ndev);
+
+ if (netif_running(ndev)) {
+ w5100_hw_reset(priv);
+ w5100_hw_start(priv);
+
+ netif_device_attach(ndev);
+ if (!gpio_is_valid(priv->link_gpio) ||
+ gpio_get_value(priv->link_gpio) != 0)
+ netif_carrier_on(ndev);
+ }
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static SIMPLE_DEV_PM_OPS(w5100_pm_ops, w5100_suspend, w5100_resume);
+
+static struct platform_driver w5100_driver = {
+ .driver = {
+ .name = DRV_NAME,
+ .owner = THIS_MODULE,
+ .pm = &w5100_pm_ops,
+ },
+ .probe = w5100_probe,
+ .remove = __devexit_p(w5100_remove),
+};
+
+module_platform_driver(w5100_driver);
--
1.6.3.3
^ permalink raw reply related [flat|nested] 49+ messages in thread
* Re: [PATCH v8 0/2] Ethernet drivers for WIZnet chips
2012-04-05 1:15 ` David Miller
@ 2012-04-05 5:36 ` Mike Sinkovsky
0 siblings, 0 replies; 49+ messages in thread
From: Mike Sinkovsky @ 2012-04-05 5:36 UTC (permalink / raw)
To: David Miller; +Cc: netdev, linux-kernel, broonie
05.04.2012 7:15, David Miller wrote:
> From: Mike Sinkovsky<msink@trikom.ru>
> Date: Wed, 4 Apr 2012 17:57:38 +0600
>
>> From: Mike Sinkovsky<msink@permonline.ru>
>>
>> Based on original driver from chip manufacturer, but nearly full rewite.
>> Tested and used in production with Blackfin BF531 embedded processor.
>>
>> Signed-off-by: Mike Sinkovsky<msink@permonline.ru>
>
> I don't see the appropriate changes in your patches to make
> sure that drivers/net/ethernet/{Kconfig,Makefile} consider
> and traverse down into the wiznet/ subdirectory.
>
> Furthermore, once that is fixed these drivers generate warnings
> when built:
>
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ‘w5300_pm_ops.suspend’) [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ‘w5300_pm_ops.resume’) [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ‘w5300_pm_ops.freeze’) [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ‘w5300_pm_ops.thaw’) [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ‘w5300_pm_ops.poweroff’) [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: initialization from incompatible pointer type [enabled by default]
> drivers/net/ethernet/wiznet/w5300.c:708:8: warning: (near initialization for ‘w5300_pm_ops.restore’) [enabled by default]
>
> It seems that the arguments and return types for these operations have
> changed since you worked on these patches, but this should be easy
> to fix up.
>
> Please cure these two issues and I'll happily put these new drivers
> into net-next, and meanwhile you can continue to work with Eric
> Dumazet to correct the TX flow control and locking issues.
>
> Thanks.
Fixed and posted v9.
Thanks.
--
Mike
^ permalink raw reply [flat|nested] 49+ messages in thread
* Re: [PATCH v9 0/2] Ethernet drivers for WIZnet chips
2012-04-05 5:33 ` [PATCH v9 " Mike Sinkovsky
@ 2012-04-05 5:47 ` David Miller
0 siblings, 0 replies; 49+ messages in thread
From: David Miller @ 2012-04-05 5:47 UTC (permalink / raw)
To: msink; +Cc: netdev, linux-kernel, broonie
From: Mike Sinkovsky <msink@permonline.ru>
Date: Thu, 5 Apr 2012 11:33:52 +0600
> Based on original driver from chip manufacturer, but nearly full rewite.
> Tested and used in production with Blackfin BF531 embedded processor.
>
> Signed-off-by: Mike Sinkovsky <msink@permonline.ru>
Applied, thanks.
^ permalink raw reply [flat|nested] 49+ messages in thread
end of thread, other threads:[~2012-04-05 5:47 UTC | newest]
Thread overview: 49+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-03-19 9:23 [PATCH v2] ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-03-20 18:08 ` Ben Hutchings
2012-03-21 14:49 ` Florian Fainelli
2012-03-22 6:58 ` Mike Sinkovsky
2012-03-24 11:02 ` [PATCH v3] Ethernet " Mike Sinkovsky
2012-03-24 15:53 ` Joe Perches
2012-03-24 16:10 ` Eric Dumazet
2012-03-26 9:05 ` Mike Sinkovsky
2012-03-26 9:07 ` [PATCH v4] " Mike Sinkovsky
2012-03-28 2:35 ` David Miller
2012-03-30 7:00 ` [PATCH v5 1/2] " Mike Sinkovsky
2012-03-31 21:45 ` Mark Brown
2012-03-30 7:00 ` [PATCH v5 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
2012-03-30 9:23 ` Eric Dumazet
2012-03-31 9:40 ` Francois Romieu
2012-03-31 9:46 ` Francois Romieu
2012-03-31 9:52 ` Mike Sinkovsky
2012-03-31 10:24 ` Eric Dumazet
2012-03-31 21:23 ` Mark Brown
2012-04-02 9:40 ` Mike Sinkovsky
2012-04-02 11:21 ` Mark Brown
2012-04-03 10:58 ` [PATCH v6 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
2012-04-03 11:39 ` Eric Dumazet
2012-04-03 12:15 ` Mike Sinkovsky
2012-04-03 12:29 ` Eric Dumazet
2012-04-04 5:58 ` Mike Sinkovsky
2012-04-04 6:17 ` Eric Dumazet
2012-04-04 7:25 ` Mike Sinkovsky
2012-04-04 7:23 ` [PATCH v7 " Mike Sinkovsky
2012-04-04 11:57 ` [PATCH v8 " Mike Sinkovsky
2012-04-05 1:15 ` David Miller
2012-04-05 5:36 ` Mike Sinkovsky
2012-04-04 11:57 ` [PATCH v8 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-04 11:57 ` [PATCH v8 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
2012-04-04 12:08 ` [PATCH v8 0/2] Ethernet drivers for WIZnet chips Mike Sinkovsky
2012-04-05 5:33 ` [PATCH v9 " Mike Sinkovsky
2012-04-05 5:47 ` David Miller
2012-04-05 5:33 ` [PATCH v9 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-05 5:33 ` [PATCH v9 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
2012-04-04 12:08 ` [PATCH v8 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-04 12:08 ` [PATCH v8 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
2012-04-04 7:23 ` [PATCH v7 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-04 7:23 ` [PATCH v7 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
2012-04-03 10:58 ` [PATCH v6 1/2] Ethernet driver for the WIZnet W5300 chip Mike Sinkovsky
2012-04-03 13:36 ` Mark Brown
2012-04-04 6:18 ` Mike Sinkovsky
2012-04-04 10:01 ` Mark Brown
2012-04-04 11:00 ` Mike Sinkovsky
2012-04-03 10:58 ` [PATCH v6 2/2] Ethernet driver for the WIZnet W5100 chip Mike Sinkovsky
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