[PATCH 0/3] pwm: lpc32xx - Various small fixes

[PATCH 0/3] pwm: lpc32xx - Various small fixes

[Alban Bedel]

A few fixes for the LPC32 PWM driver:

* [PATCH 1/3] pwm: lpc32xx - Fix the PWM polarity
* [PATCH 2/3] pwm: lpc32xx - Properly disable the clock on device remove
* [PATCH 3/3] pwm: lpc32xx - Set the chip base for dynamic allocation

Alban

[PATCH 1/3] pwm: lpc32xx - Fix the PWM polarity

[Alban Bedel]

The duty cycles value goes from 1 (99% HIGH) to 256 (0% HIGH) but it
is stored modulo 256 in the register as it is only 8 bits wide.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
---
 drivers/pwm/pwm-lpc32xx.c |   17 ++++++++++++++++-
 1 files changed, 16 insertions(+), 1 deletions(-)

diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index adb87f0..03ec3ff 100644
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -49,9 +49,24 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 		c = 0; /* 0 set division by 256 */
 	period_cycles = c;
 
+	/* The duty value is a follow:
+	 *
+	 *  DUTY     HIGH LEVEL
+	 *   1         99.9%
+	 *   25        90.0%
+	 *   128       50.0%
+	 *   220       10.0%
+	 *   255        0.1%
+	 *   0          0.0%
+	 *
+	 * In other word the in-register value is duty % 256 with duty
+	 * in the range 1-256.
+	 */
 	c = 256 * duty_ns;
 	do_div(c, period_ns);
-	duty_cycles = c;
+	if (c > 255)
+		c = 255;
+	duty_cycles = 256 - c;
 
 	writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles),
 		lpc32xx->base + (pwm->hwpwm << 2));
-- 
1.7.0.4

[PATCH 2/3] pwm: lpc32xx - Properly disable the clock on device remove

[Alban Bedel]

A single clock is used for all PWMs meaning the clock ref count might
be between 0 and N when remove() is called. Instead of a single
clk_disable() call pwm_disable() on each PWM, that ensure that
clk_disable() is called for each PWM that were still enabled.

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
---
 drivers/pwm/pwm-lpc32xx.c |    5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index 03ec3ff..f45ce2c 100644
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -136,8 +136,11 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
 static int __devexit lpc32xx_pwm_remove(struct platform_device *pdev)
 {
 	struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev);
+	int i;
+
+	for (i = 0 ; i < lpc32xx->chip.npwm ; i += 1)
+		pwm_disable(&lpc32xx->chip.pwms[i]);
 
-	clk_disable(lpc32xx->clk);
 	return pwmchip_remove(&lpc32xx->chip);
 }
 
-- 
1.7.0.4

[PATCH 3/3] pwm: lpc32xx - Set the chip base for dynamic allocation

[Alban Bedel]

Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
---
 drivers/pwm/pwm-lpc32xx.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
index f45ce2c..3e63689 100644
--- a/drivers/pwm/pwm-lpc32xx.c
+++ b/drivers/pwm/pwm-lpc32xx.c
@@ -121,6 +121,7 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
 	lpc32xx->chip.dev = &pdev->dev;
 	lpc32xx->chip.ops = &lpc32xx_pwm_ops;
 	lpc32xx->chip.npwm = 2;
+	lpc32xx->chip.base = -1;
 
 	ret = pwmchip_add(&lpc32xx->chip);
 	if (ret < 0) {
-- 
1.7.0.4

Re: [PATCH 2/3] pwm: lpc32xx - Properly disable the clock on device remove

[Thierry Reding]

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On Wed, Nov 14, 2012 at 12:58:14PM +0100, Alban Bedel wrote:
[...]
>  static int __devexit lpc32xx_pwm_remove(struct platform_device *pdev)
>  {
>  	struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev);
> +	int i;

This should rather be unsigned int since pwm_chip.npwm is unsigned as
well.

> +
> +	for (i = 0 ; i < lpc32xx->chip.npwm ; i += 1)

No space before ';' and "i++" please.

Thierry

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Re: [PATCH 0/3] pwm: lpc32xx - Various small fixes

[Thierry Reding]

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On Wed, Nov 14, 2012 at 12:58:12PM +0100, Alban Bedel wrote:
> A few fixes for the LPC32 PWM driver:
> 
> * [PATCH 1/3] pwm: lpc32xx - Fix the PWM polarity
> * [PATCH 2/3] pwm: lpc32xx - Properly disable the clock on device remove
> * [PATCH 3/3] pwm: lpc32xx - Set the chip base for dynamic allocation

Roland, Alexandre,

can you guys take a look at these? At least 3 is very straightforward
but I'd still like your Acked-by or Reviewed-by on the other two. Are
there any potential issues? If Alban doesn't resend, I'm tempted to make
the stylistic changes that I requested myself and push them for 3.8.
That is if I get an Acked-by from one of you guys for 1 and 2.

Thierry

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Re: [PATCH 1/3] pwm: lpc32xx - Fix the PWM polarity

[Alexandre Pereira da Silva]

On Wed, Nov 14, 2012 at 9:58 AM, Alban Bedel
<alban.bedel@avionic-design.de> wrote:
> The duty cycles value goes from 1 (99% HIGH) to 256 (0% HIGH) but it
> is stored modulo 256 in the register as it is only 8 bits wide.
>
> Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>

Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

> ---
>  drivers/pwm/pwm-lpc32xx.c |   17 ++++++++++++++++-
>  1 files changed, 16 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
> index adb87f0..03ec3ff 100644
> --- a/drivers/pwm/pwm-lpc32xx.c
> +++ b/drivers/pwm/pwm-lpc32xx.c
> @@ -49,9 +49,24 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
>                 c = 0; /* 0 set division by 256 */
>         period_cycles = c;
>
> +       /* The duty value is a follow:
> +        *
> +        *  DUTY     HIGH LEVEL
> +        *   1         99.9%
> +        *   25        90.0%
> +        *   128       50.0%
> +        *   220       10.0%
> +        *   255        0.1%
> +        *   0          0.0%
> +        *
> +        * In other word the in-register value is duty % 256 with duty
> +        * in the range 1-256.
> +        */
>         c = 256 * duty_ns;
>         do_div(c, period_ns);
> -       duty_cycles = c;
> +       if (c > 255)
> +               c = 255;
> +       duty_cycles = 256 - c;
>
>         writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles),
>                 lpc32xx->base + (pwm->hwpwm << 2));
> --
> 1.7.0.4
>

Re: [PATCH 3/3] pwm: lpc32xx - Set the chip base for dynamic allocation

[Alexandre Pereira da Silva]

On Wed, Nov 14, 2012 at 9:58 AM, Alban Bedel
<alban.bedel@avionic-design.de> wrote:
> Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>

Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

> ---
>  drivers/pwm/pwm-lpc32xx.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
> index f45ce2c..3e63689 100644
> --- a/drivers/pwm/pwm-lpc32xx.c
> +++ b/drivers/pwm/pwm-lpc32xx.c
> @@ -121,6 +121,7 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
>         lpc32xx->chip.dev = &pdev->dev;
>         lpc32xx->chip.ops = &lpc32xx_pwm_ops;
>         lpc32xx->chip.npwm = 2;
> +       lpc32xx->chip.base = -1;
>
>         ret = pwmchip_add(&lpc32xx->chip);
>         if (ret < 0) {
> --
> 1.7.0.4
>

Re: [PATCH 3/3] pwm: lpc32xx - Set the chip base for dynamic allocation

[Roland Stigge]

On 11/23/2012 10:35 AM, Alexandre Pereira da Silva wrote:
> On Wed, Nov 14, 2012 at 9:58 AM, Alban Bedel
> <alban.bedel@avionic-design.de> wrote:
>> Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
> 
> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

Acked-by: Roland Stigge <stigge@antcom.de>

> 
>> ---
>>  drivers/pwm/pwm-lpc32xx.c |    1 +
>>  1 files changed, 1 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
>> index f45ce2c..3e63689 100644
>> --- a/drivers/pwm/pwm-lpc32xx.c
>> +++ b/drivers/pwm/pwm-lpc32xx.c
>> @@ -121,6 +121,7 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev)
>>         lpc32xx->chip.dev = &pdev->dev;
>>         lpc32xx->chip.ops = &lpc32xx_pwm_ops;
>>         lpc32xx->chip.npwm = 2;
>> +       lpc32xx->chip.base = -1;
>>
>>         ret = pwmchip_add(&lpc32xx->chip);
>>         if (ret < 0) {
>> --
>> 1.7.0.4
>>

Re: [PATCH 1/3] pwm: lpc32xx - Fix the PWM polarity

[Roland Stigge]

On 11/23/2012 10:34 AM, Alexandre Pereira da Silva wrote:
> On Wed, Nov 14, 2012 at 9:58 AM, Alban Bedel
> <alban.bedel@avionic-design.de> wrote:
>> The duty cycles value goes from 1 (99% HIGH) to 256 (0% HIGH) but it
>> is stored modulo 256 in the register as it is only 8 bits wide.
>>
>> Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
> 
> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

When the below doc typos are fixed,

Acked-by: Roland Stigge <stigge@antcom.de>

> 
>> ---
>>  drivers/pwm/pwm-lpc32xx.c |   17 ++++++++++++++++-
>>  1 files changed, 16 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
>> index adb87f0..03ec3ff 100644
>> --- a/drivers/pwm/pwm-lpc32xx.c
>> +++ b/drivers/pwm/pwm-lpc32xx.c
>> @@ -49,9 +49,24 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
>>                 c = 0; /* 0 set division by 256 */
>>         period_cycles = c;
>>
>> +       /* The duty value is a follow:
>> +        *
>> +        *  DUTY     HIGH LEVEL
>> +        *   1         99.9%
>> +        *   25        90.0%
>> +        *   128       50.0%
>> +        *   220       10.0%
>> +        *   255        0.1%
>> +        *   0          0.0%
>> +        *
>> +        * In other word the in-register value is duty % 256 with duty
>> +        * in the range 1-256.
>> +        */
>>         c = 256 * duty_ns;
>>         do_div(c, period_ns);
>> -       duty_cycles = c;
>> +       if (c > 255)
>> +               c = 255;
>> +       duty_cycles = 256 - c;
>>
>>         writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles),
>>                 lpc32xx->base + (pwm->hwpwm << 2));
>> --
>> 1.7.0.4
>>

Re: [PATCH 2/3] pwm: lpc32xx - Properly disable the clock on device remove

[Roland Stigge]

On 11/22/2012 11:31 PM, Alexandre Pereira da Silva wrote:
> Em 14/11/2012 09:58, "Alban Bedel" <alban.bedel@avionic-design.de> escreveu:
>>
>> A single clock is used for all PWMs meaning the clock ref count might
>> be between 0 and N when remove() is called. Instead of a single
>> clk_disable() call pwm_disable() on each PWM, that ensure that
>> clk_disable() is called for each PWM that were still enabled.
>>
>> Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
> 
> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>

Some style fixes necessary below (Thierry will take care of it), otherwise:

Acked-by: Roland Stigge <stigge@antcom.de>

> 
>> ---
>>  drivers/pwm/pwm-lpc32xx.c |    5 ++++-
>>  1 files changed, 4 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c
>> index 03ec3ff..f45ce2c 100644
>> --- a/drivers/pwm/pwm-lpc32xx.c
>> +++ b/drivers/pwm/pwm-lpc32xx.c
>> @@ -136,8 +136,11 @@ static int lpc32xx_pwm_probe(struct platform_device
> *pdev)
>>  static int __devexit lpc32xx_pwm_remove(struct platform_device *pdev)
>>  {
>>         struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev);
>> +       int i;
>> +
>> +       for (i = 0 ; i < lpc32xx->chip.npwm ; i += 1)
>> +               pwm_disable(&lpc32xx->chip.pwms[i]);
>>
>> -       clk_disable(lpc32xx->clk);
>>         return pwmchip_remove(&lpc32xx->chip);
>>  }
>>
>> --
>> 1.7.0.4
>>
> 

Re: [PATCH 0/3] pwm: lpc32xx - Various small fixes

[Thierry Reding]

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On Wed, Nov 14, 2012 at 12:58:12PM +0100, Alban Bedel wrote:
> A few fixes for the LPC32 PWM driver:
> 
> * [PATCH 1/3] pwm: lpc32xx - Fix the PWM polarity
> * [PATCH 2/3] pwm: lpc32xx - Properly disable the clock on device remove
> * [PATCH 3/3] pwm: lpc32xx - Set the chip base for dynamic allocation

All three patches applied, with the minor fixes that Roland and I
requested.

Thierry

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