[PATCH 01/11] PINCTRL: lantiq: pinconf uses port instead of pin

[PATCH 01/11] PINCTRL: lantiq: pinconf uses port instead of pin

[John Crispin]

The XWAY pinctrl driver invalidly uses the port and not the pin number to work
out the registeres and bits to be set for the opendrain and pullup/down
resistors.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-xway.c |   28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c
index 5f0eb04..69dec9b 100644
--- a/drivers/pinctrl/pinctrl-xway.c
+++ b/drivers/pinctrl/pinctrl-xway.c
@@ -441,17 +441,17 @@ static int xway_pinconf_get(struct pinctrl_dev *pctldev,
 		if (port == PORT3)
 			reg = GPIO3_OD;
 		else
-			reg = GPIO_OD(port);
+			reg = GPIO_OD(pin);
 		*config = LTQ_PINCONF_PACK(param,
-			!!gpio_getbit(info->membase[0], reg, PORT_PIN(port)));
+			!!gpio_getbit(info->membase[0], reg, PORT_PIN(pin)));
 		break;
 
 	case LTQ_PINCONF_PARAM_PULL:
 		if (port == PORT3)
 			reg = GPIO3_PUDEN;
 		else
-			reg = GPIO_PUDEN(port);
-		if (!gpio_getbit(info->membase[0], reg, PORT_PIN(port))) {
+			reg = GPIO_PUDEN(pin);
+		if (!gpio_getbit(info->membase[0], reg, PORT_PIN(pin))) {
 			*config = LTQ_PINCONF_PACK(param, 0);
 			break;
 		}
@@ -459,8 +459,8 @@ static int xway_pinconf_get(struct pinctrl_dev *pctldev,
 		if (port == PORT3)
 			reg = GPIO3_PUDSEL;
 		else
-			reg = GPIO_PUDSEL(port);
-		if (!gpio_getbit(info->membase[0], reg, PORT_PIN(port)))
+			reg = GPIO_PUDSEL(pin);
+		if (!gpio_getbit(info->membase[0], reg, PORT_PIN(pin)))
 			*config = LTQ_PINCONF_PACK(param, 2);
 		else
 			*config = LTQ_PINCONF_PACK(param, 1);
@@ -488,29 +488,29 @@ static int xway_pinconf_set(struct pinctrl_dev *pctldev,
 		if (port == PORT3)
 			reg = GPIO3_OD;
 		else
-			reg = GPIO_OD(port);
-		gpio_setbit(info->membase[0], reg, PORT_PIN(port));
+			reg = GPIO_OD(pin);
+		gpio_setbit(info->membase[0], reg, PORT_PIN(pin));
 		break;
 
 	case LTQ_PINCONF_PARAM_PULL:
 		if (port == PORT3)
 			reg = GPIO3_PUDEN;
 		else
-			reg = GPIO_PUDEN(port);
+			reg = GPIO_PUDEN(pin);
 		if (arg == 0) {
-			gpio_clearbit(info->membase[0], reg, PORT_PIN(port));
+			gpio_clearbit(info->membase[0], reg, PORT_PIN(pin));
 			break;
 		}
-		gpio_setbit(info->membase[0], reg, PORT_PIN(port));
+		gpio_setbit(info->membase[0], reg, PORT_PIN(pin));
 
 		if (port == PORT3)
 			reg = GPIO3_PUDSEL;
 		else
-			reg = GPIO_PUDSEL(port);
+			reg = GPIO_PUDSEL(pin);
 		if (arg == 1)
-			gpio_clearbit(info->membase[0], reg, PORT_PIN(port));
+			gpio_clearbit(info->membase[0], reg, PORT_PIN(pin));
 		else if (arg == 2)
-			gpio_setbit(info->membase[0], reg, PORT_PIN(port));
+			gpio_setbit(info->membase[0], reg, PORT_PIN(pin));
 		else
 			dev_err(pctldev->dev, "Invalid pull value %d\n", arg);
 		break;
-- 
1.7.10.4

[PATCH 02/11] PINCTRL: lantiq: faulty bit inversion

[John Crispin]

The logic of the OD bit was inverted when calling the pinconf get methode.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-xway.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c
index 69dec9b..c49c9db 100644
--- a/drivers/pinctrl/pinctrl-xway.c
+++ b/drivers/pinctrl/pinctrl-xway.c
@@ -443,7 +443,7 @@ static int xway_pinconf_get(struct pinctrl_dev *pctldev,
 		else
 			reg = GPIO_OD(pin);
 		*config = LTQ_PINCONF_PACK(param,
-			!!gpio_getbit(info->membase[0], reg, PORT_PIN(pin)));
+			!gpio_getbit(info->membase[0], reg, PORT_PIN(pin)));
 		break;
 
 	case LTQ_PINCONF_PARAM_PULL:
-- 
1.7.10.4

[PATCH 03/11] PINCTRL: lantiq: add pin_config_group_set support

[John Crispin]

While converting all the boards supported by OpenWrt to OF I noticed that this
feature is missing. Adding it makes the devicetrees more readable.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-lantiq.c |   54 ++++++++++++++++++++++++--------------
 drivers/pinctrl/pinctrl-xway.c   |   15 +++++++++++
 2 files changed, 49 insertions(+), 20 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-lantiq.c b/drivers/pinctrl/pinctrl-lantiq.c
index 15f501d..7d11072 100644
--- a/drivers/pinctrl/pinctrl-lantiq.c
+++ b/drivers/pinctrl/pinctrl-lantiq.c
@@ -64,11 +64,13 @@ static void ltq_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
 	seq_printf(s, " %s", dev_name(pctldev->dev));
 }
 
-static int ltq_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
+static void ltq_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 				struct device_node *np,
 				struct pinctrl_map **map)
 {
 	struct ltq_pinmux_info *info = pinctrl_dev_get_drvdata(pctldev);
+	struct property *pins = of_find_property(np, "lantiq,pins", NULL);
+	struct property *groups = of_find_property(np, "lantiq,groups", NULL);
 	unsigned long configs[3];
 	unsigned num_configs = 0;
 	struct property *prop;
@@ -76,8 +78,20 @@ static int ltq_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 	const char *function;
 	int ret, i;
 
+	if (!pins && !groups) {
+		dev_err(pctldev->dev, "%s defines neither pins nor groups\n",
+			np->name);
+		return;
+	}
+
+	if (pins && groups) {
+		dev_err(pctldev->dev, "%s defines both pins and groups\n",
+			np->name);
+		return;
+	}
+
 	ret = of_property_read_string(np, "lantiq,function", &function);
-	if (!ret) {
+	if (groups && !ret) {
 		of_property_for_each_string(np, "lantiq,groups", prop, group) {
 			(*map)->type = PIN_MAP_TYPE_MUX_GROUP;
 			(*map)->name = function;
@@ -85,11 +99,6 @@ static int ltq_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 			(*map)->data.mux.function = function;
 			(*map)++;
 		}
-		if (of_find_property(np, "lantiq,pins", NULL))
-			dev_err(pctldev->dev,
-				"%s mixes pins and groups settings\n",
-				np->name);
-		return 0;
 	}
 
 	for (i = 0; i < info->num_params; i++) {
@@ -103,7 +112,7 @@ static int ltq_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 	}
 
 	if (!num_configs)
-		return -EINVAL;
+		return;
 
 	of_property_for_each_string(np, "lantiq,pins", prop, pin) {
 		(*map)->data.configs.configs = kmemdup(configs,
@@ -115,7 +124,16 @@ static int ltq_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
 		(*map)->data.configs.num_configs = num_configs;
 		(*map)++;
 	}
-	return 0;
+	of_property_for_each_string(np, "lantiq,groups", prop, group) {
+		(*map)->data.configs.configs = kmemdup(configs,
+					num_configs * sizeof(unsigned long),
+					GFP_KERNEL);
+		(*map)->type = PIN_MAP_TYPE_CONFIGS_GROUP;
+		(*map)->name = group;
+		(*map)->data.configs.group_or_pin = group;
+		(*map)->data.configs.num_configs = num_configs;
+		(*map)++;
+	}
 }
 
 static int ltq_pinctrl_dt_subnode_size(struct device_node *np)
@@ -135,23 +153,19 @@ static int ltq_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
 {
 	struct pinctrl_map *tmp;
 	struct device_node *np;
-	int ret;
+	int max_maps = 0;
 
-	*num_maps = 0;
 	for_each_child_of_node(np_config, np)
-		*num_maps += ltq_pinctrl_dt_subnode_size(np);
-	*map = kzalloc(*num_maps * sizeof(struct pinctrl_map), GFP_KERNEL);
+		max_maps += ltq_pinctrl_dt_subnode_size(np);
+	*map = kzalloc(max_maps * sizeof(struct pinctrl_map) * 2, GFP_KERNEL);
 	if (!*map)
 		return -ENOMEM;
 	tmp = *map;
 
-	for_each_child_of_node(np_config, np) {
-		ret = ltq_pinctrl_dt_subnode_to_map(pctldev, np, &tmp);
-		if (ret < 0) {
-			ltq_pinctrl_dt_free_map(pctldev, *map, *num_maps);
-			return ret;
-		}
-	}
+	for_each_child_of_node(np_config, np)
+		ltq_pinctrl_dt_subnode_to_map(pctldev, np, &tmp);
+	*num_maps = ((int)(tmp - *map));
+
 	return 0;
 }
 
diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c
index c49c9db..aa4c8b8 100644
--- a/drivers/pinctrl/pinctrl-xway.c
+++ b/drivers/pinctrl/pinctrl-xway.c
@@ -522,9 +522,24 @@ static int xway_pinconf_set(struct pinctrl_dev *pctldev,
 	return 0;
 }
 
+int xway_pinconf_group_set(struct pinctrl_dev *pctldev,
+			unsigned selector,
+			unsigned long config)
+{
+	struct ltq_pinmux_info *info = pinctrl_dev_get_drvdata(pctldev);
+	int i, ret = 0;
+
+	for (i = 0; i < info->grps[selector].npins && !ret; i++)
+		ret = xway_pinconf_set(pctldev,
+				info->grps[selector].pins[i], config);
+
+	return ret;
+}
+
 static struct pinconf_ops xway_pinconf_ops = {
 	.pin_config_get	= xway_pinconf_get,
 	.pin_config_set	= xway_pinconf_set,
+	.pin_config_group_set = xway_pinconf_group_set,
 };
 
 static struct pinctrl_desc xway_pctrl_desc = {
-- 
1.7.10.4

[PATCH 04/11] PINCTRL: lantiq: add output pinconf parameter

[John Crispin]

While converting the boards inside OpenWrt to OF I noticed that the we are
missing a pinconf parameter to set a pin to output.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-lantiq.h |    1 +
 drivers/pinctrl/pinctrl-xway.c   |   14 ++++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-lantiq.h b/drivers/pinctrl/pinctrl-lantiq.h
index 4419d32..6d07f02 100644
--- a/drivers/pinctrl/pinctrl-lantiq.h
+++ b/drivers/pinctrl/pinctrl-lantiq.h
@@ -34,6 +34,7 @@ enum ltq_pinconf_param {
 	LTQ_PINCONF_PARAM_OPEN_DRAIN,
 	LTQ_PINCONF_PARAM_DRIVE_CURRENT,
 	LTQ_PINCONF_PARAM_SLEW_RATE,
+	LTQ_PINCONF_PARAM_OUTPUT,
 };
 
 struct ltq_cfg_param {
diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c
index aa4c8b8..b23b895 100644
--- a/drivers/pinctrl/pinctrl-xway.c
+++ b/drivers/pinctrl/pinctrl-xway.c
@@ -466,6 +466,11 @@ static int xway_pinconf_get(struct pinctrl_dev *pctldev,
 			*config = LTQ_PINCONF_PACK(param, 1);
 		break;
 
+	case LTQ_PINCONF_PARAM_OUTPUT:
+		reg = GPIO_DIR(pin);
+		*config = LTQ_PINCONF_PACK(param,
+			gpio_getbit(info->membase[0], reg, PORT_PIN(pin)));
+		break;
 	default:
 		dev_err(pctldev->dev, "Invalid config param %04x\n", param);
 		return -ENOTSUPP;
@@ -515,6 +520,14 @@ static int xway_pinconf_set(struct pinctrl_dev *pctldev,
 			dev_err(pctldev->dev, "Invalid pull value %d\n", arg);
 		break;
 
+	case LTQ_PINCONF_PARAM_OUTPUT:
+		reg = GPIO_DIR(pin);
+		if (arg == 0)
+			gpio_clearbit(info->membase[0], reg, PORT_PIN(pin));
+		else
+			gpio_setbit(info->membase[0], reg, PORT_PIN(pin));
+		break;
+
 	default:
 		dev_err(pctldev->dev, "Invalid config param %04x\n", param);
 		return -ENOTSUPP;
@@ -573,6 +586,7 @@ static inline int xway_mux_apply(struct pinctrl_dev *pctrldev,
 static const struct ltq_cfg_param xway_cfg_params[] = {
 	{"lantiq,pull",		LTQ_PINCONF_PARAM_PULL},
 	{"lantiq,open-drain",	LTQ_PINCONF_PARAM_OPEN_DRAIN},
+	{"lantiq,output",	LTQ_PINCONF_PARAM_OUTPUT},
 };
 
 static struct ltq_pinmux_info xway_info = {
-- 
1.7.10.4

[PATCH 05/11] PINCTRL: lantiq: the pinconf OD parameter argument was ignored

[John Crispin]

When setting the OpenDrain bit we should really honour the argument passed
inside the devicetree.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-xway.c |    5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-xway.c b/drivers/pinctrl/pinctrl-xway.c
index b23b895..53cb6a3 100644
--- a/drivers/pinctrl/pinctrl-xway.c
+++ b/drivers/pinctrl/pinctrl-xway.c
@@ -494,7 +494,10 @@ static int xway_pinconf_set(struct pinctrl_dev *pctldev,
 			reg = GPIO3_OD;
 		else
 			reg = GPIO_OD(pin);
-		gpio_setbit(info->membase[0], reg, PORT_PIN(pin));
+		if (arg == 0)
+			gpio_setbit(info->membase[0], reg, PORT_PIN(pin));
+		else
+			gpio_clearbit(info->membase[0], reg, PORT_PIN(pin));
 		break;
 
 	case LTQ_PINCONF_PARAM_PULL:
-- 
1.7.10.4

[PATCH 06/11] PINCTRL: lantiq: only probe available pad controllers

[John Crispin]

The template falcon.dtsi lists all 6 pad controllers that can be loaded. Only
probe those that have status = "okay"; inside the dts file.

Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-falcon.c |    3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index 8ed20e8..6331c5c 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -398,6 +398,9 @@ static int pinctrl_falcon_probe(struct platform_device *pdev)
 		u32 avail;
 		int pins;
 
+		if (!of_device_is_available(np))
+			continue;
+
 		if (!ppdev) {
 			dev_err(&pdev->dev, "failed to find pad pdev\n");
 			continue;
-- 
1.7.10.4

[PATCH 07/11] PINCTRL: lantiq: one of the boot leds was defined incorrectly

[John Crispin]

On the Falcon SoC the bootleds are located on pins 9->14.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-falcon.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index 6331c5c..249a405 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -170,7 +170,7 @@ static const unsigned pins_ntr[] = {GPIO4};
 static const unsigned pins_ntr8k[] = {GPIO5};
 static const unsigned pins_hrst[] = {GPIO6};
 static const unsigned pins_mdio[] = {GPIO7, GPIO8};
-static const unsigned pins_bled[] = {GPIO7, GPIO10, GPIO11,
+static const unsigned pins_bled[] = {GPIO9, GPIO10, GPIO11,
 					GPIO12, GPIO13, GPIO14};
 static const unsigned pins_asc0[] = {GPIO32, GPIO33};
 static const unsigned pins_spi[] = {GPIO34, GPIO35, GPIO36};
-- 
1.7.10.4

[PATCH 08/11] PINCTRL: lantiq: fix pinconfig parameters

[John Crispin]

The Falcon driver only defined the pinconf parameters but did not pass them
properly to the underlying api.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-falcon.c |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index 249a405..c5a9868 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -360,6 +360,8 @@ static const struct ltq_cfg_param falcon_cfg_params[] = {
 static struct ltq_pinmux_info falcon_info = {
 	.desc		= &falcon_pctrl_desc,
 	.apply_mux	= falcon_mux_apply,
+	.params		= falcon_cfg_params,
+	.num_params	= ARRAY_SIZE(falcon_cfg_params),
 };
 
 
-- 
1.7.10.4

[PATCH 09/11] PINCTRL: lantiq: add functionality to falcon_pinconf_dbg_show

[John Crispin]

The current code only has a stub for falcon_pinconf_dbg_show. This patch adds
proper functionality.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-falcon.c |   31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index c5a9868..4a0d54a 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -315,6 +315,37 @@ static int falcon_pinconf_set(struct pinctrl_dev *pctrldev,
 static void falcon_pinconf_dbg_show(struct pinctrl_dev *pctrldev,
 			struct seq_file *s, unsigned offset)
 {
+	unsigned long config;
+	struct pin_desc *desc;
+
+	struct ltq_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
+	int port = PORT(offset);
+
+	seq_printf(s, " (port %d) mux %d -- ", port,
+		pad_r32(info->membase[port], LTQ_PADC_MUX(PORT_PIN(offset))));
+
+	config = LTQ_PINCONF_PACK(LTQ_PINCONF_PARAM_PULL, 0);
+	if (!falcon_pinconf_get(pctrldev, offset, &config))
+		seq_printf(s, "pull %d ",
+			(int)LTQ_PINCONF_UNPACK_ARG(config));
+
+	config = LTQ_PINCONF_PACK(LTQ_PINCONF_PARAM_DRIVE_CURRENT, 0);
+	if (!falcon_pinconf_get(pctrldev, offset, &config))
+		seq_printf(s, "drive-current %d ",
+			(int)LTQ_PINCONF_UNPACK_ARG(config));
+
+	config = LTQ_PINCONF_PACK(LTQ_PINCONF_PARAM_SLEW_RATE, 0);
+	if (!falcon_pinconf_get(pctrldev, offset, &config))
+		seq_printf(s, "slew-rate %d ",
+			(int)LTQ_PINCONF_UNPACK_ARG(config));
+
+	desc = pin_desc_get(pctrldev, offset);
+	if (desc) {
+		if (desc->gpio_owner)
+			seq_printf(s, " owner: %s", desc->gpio_owner);
+	} else {
+		seq_printf(s, " not registered");
+	}
 }
 
 static void falcon_pinconf_group_dbg_show(struct pinctrl_dev *pctrldev,
-- 
1.7.10.4

[PATCH 10/11] PINCTRL: lantiq: fix pin availability check

[John Crispin]

The clock needs to be activated for the check to work. In order to be compatible
with future silicon make sure that at least 1 pin is available before probing
the pad controller.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-falcon.c |   11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-falcon.c b/drivers/pinctrl/pinctrl-falcon.c
index 4a0d54a..de9d1db 100644
--- a/drivers/pinctrl/pinctrl-falcon.c
+++ b/drivers/pinctrl/pinctrl-falcon.c
@@ -455,12 +455,17 @@ static int pinctrl_falcon_probe(struct platform_device *pdev)
 				*bank);
 			return -ENOMEM;
 		}
+		clk_activate(falcon_info.clk[*bank]);
 		avail = pad_r32(falcon_info.membase[*bank],
 					LTQ_PADC_AVAIL);
 		pins = fls(avail);
-		lantiq_load_pin_desc(&falcon_pads[pad_count], *bank, pins);
-		pad_count += pins;
-		clk_enable(falcon_info.clk[*bank]);
+		if (pins) {
+			lantiq_load_pin_desc(&falcon_pads[pad_count],
+								*bank, pins);
+			pad_count += pins;
+		} else {
+			clk_deactivate(falcon_info.clk[*bank]);
+		}
 		dev_dbg(&pdev->dev, "found %s with %d pads\n",
 				res.name, pins);
 	}
-- 
1.7.10.4

[PATCH 11/11] PINCTRL: lantiq: fix pin number in ltq_pmx_gpio_request_enable

[John Crispin]

The mapping logic inside ltq_pmx_gpio_request_enable() was broken. This only
effected Falcon SoC.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
---
 drivers/pinctrl/pinctrl-lantiq.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-lantiq.c b/drivers/pinctrl/pinctrl-lantiq.c
index 7d11072..a703846 100644
--- a/drivers/pinctrl/pinctrl-lantiq.c
+++ b/drivers/pinctrl/pinctrl-lantiq.c
@@ -294,7 +294,7 @@ static int ltq_pmx_gpio_request_enable(struct pinctrl_dev *pctrldev,
 				unsigned pin)
 {
 	struct ltq_pinmux_info *info = pinctrl_dev_get_drvdata(pctrldev);
-	int mfp = match_mfp(info, pin + (range->id * 32));
+	int mfp = match_mfp(info, pin);
 	int pin_func;
 
 	if (mfp < 0) {
-- 
1.7.10.4

Re: [PATCH 01/11] PINCTRL: lantiq: pinconf uses port instead of pin

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:04 PM, John Crispin <blogic@openwrt.org> wrote:

> The XWAY pinctrl driver invalidly uses the port and not the pin number to work
> out the registeres and bits to be set for the opendrain and pullup/down
> resistors.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>

Applied for fixes.

Thanks,
Linus Walleij

Re: [PATCH 02/11] PINCTRL: lantiq: faulty bit inversion

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:04 PM, John Crispin <blogic@openwrt.org> wrote:

> The logic of the OD bit was inverted when calling the pinconf get methode.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>

Applied for fixes.

Thanks,
Linus Walleij

Re: [PATCH 03/11] PINCTRL: lantiq: add pin_config_group_set support

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:04 PM, John Crispin <blogic@openwrt.org> wrote:

> While converting all the boards supported by OpenWrt to OF I noticed that this
> feature is missing. Adding it makes the devicetrees more readable.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>

Applied to my devel branch.

Thanks,
Linus Walleij

Re: [PATCH 04/11] PINCTRL: lantiq: add output pinconf parameter

[John Crispin]

On 05/02/13 15:46, Linus Walleij wrote:
> On Fri, Feb 1, 2013 at 1:04 PM, John Crispin<blogic@openwrt.org>  wrote:
>
>> While converting the boards inside OpenWrt to OF I noticed that the we are
>> missing a pinconf parameter to set a pin to output.
>>
>> Signed-off-by: John Crispin<blogic@openwrt.org>
> OK, I have applied this, BUT:
>
>> @@ -34,6 +34,7 @@ enum ltq_pinconf_param {
>>          LTQ_PINCONF_PARAM_OPEN_DRAIN,
>>          LTQ_PINCONF_PARAM_DRIVE_CURRENT,
>>          LTQ_PINCONF_PARAM_SLEW_RATE,
>> +       LTQ_PINCONF_PARAM_OUTPUT,
>>   };
> All of this exist in the generic pinconf library nowadays.
>
> How about cooking a patch that converts the lantiq driver
> to just use that? It'll be pretty straight forward I think.
>
> I mean you convert it to use the generic pinconf internally,
> the DT representation we'll have to live with.
>
> See for example the new drivers that are boiling in
> -next. All use generic pinconf I think. The parameter to
> set a pin as output was added for the abx500 driver
> this cycle.
>
> Yours,
> Linus Walleij
>
>

Hi,

i'll look into updating the driver to the new api

     John

Re: [PATCH 04/11] PINCTRL: lantiq: add output pinconf parameter

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:04 PM, John Crispin <blogic@openwrt.org> wrote:

> While converting the boards inside OpenWrt to OF I noticed that the we are
> missing a pinconf parameter to set a pin to output.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>

OK, I have applied this, BUT:

> @@ -34,6 +34,7 @@ enum ltq_pinconf_param {
>         LTQ_PINCONF_PARAM_OPEN_DRAIN,
>         LTQ_PINCONF_PARAM_DRIVE_CURRENT,
>         LTQ_PINCONF_PARAM_SLEW_RATE,
> +       LTQ_PINCONF_PARAM_OUTPUT,
>  };

All of this exist in the generic pinconf library nowadays.

How about cooking a patch that converts the lantiq driver
to just use that? It'll be pretty straight forward I think.

I mean you convert it to use the generic pinconf internally,
the DT representation we'll have to live with.

See for example the new drivers that are boiling in
-next. All use generic pinconf I think. The parameter to
set a pin as output was added for the abx500 driver
this cycle.

Yours,
Linus Walleij

Re: [PATCH 05/11] PINCTRL: lantiq: the pinconf OD parameter argument was ignored

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:04 PM, John Crispin <blogic@openwrt.org> wrote:

> When setting the OpenDrain bit we should really honour the argument passed
> inside the devicetree.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>

I have applied this to the fixes on top of patch 1/11 and 2/11.

I hope that is what you want, you realize that I cannot send all of
these patches to the -rc series, new stuff goes into devel for-next.

This one seemed to depend on the other fixes as well...

Please verify that this is OK for you, i.e. that you
don't have regressions when 1,2,5 are applied by themselves.

Yours,
Linus Walleij

Re: [PATCH 07/11] PINCTRL: lantiq: one of the boot leds was defined incorrectly

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:05 PM, John Crispin <blogic@openwrt.org> wrote:

> On the Falcon SoC the bootleds are located on pins 9->14.
>
> Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
> Signed-off-by: John Crispin <blogic@openwrt.org>

Applied to devel, half-guessing this is not a serious regression.

Thanks,
Linus Walleij

Re: [PATCH 09/11] PINCTRL: lantiq: add functionality to falcon_pinconf_dbg_show

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:05 PM, John Crispin <blogic@openwrt.org> wrote:

> The current code only has a stub for falcon_pinconf_dbg_show. This patch adds
> proper functionality.
>
> Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
> Signed-off-by: John Crispin <blogic@openwrt.org>

Applied to my devel branch.

Makes me think again I want a patch for this to use
generic pinconfig.

Yours,
Linus Walleij

Re: [PATCH 08/11] PINCTRL: lantiq: fix pinconfig parameters

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:05 PM, John Crispin <blogic@openwrt.org> wrote:

> The Falcon driver only defined the pinconf parameters but did not pass them
> properly to the underlying api.
>
> Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
> Signed-off-by: John Crispin <blogic@openwrt.org>

Patch applied, thanks.

Yours,
Linus Walleij

Re: [PATCH 06/11] PINCTRL: lantiq: only probe available pad controllers

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:05 PM, John Crispin <blogic@openwrt.org> wrote:

> The template falcon.dtsi lists all 6 pad controllers that can be loaded. Only
> probe those that have status = "okay"; inside the dts file.
>
> Signed-off-by: John Crispin <blogic@openwrt.org>

Applied, thanks.

Yours,
Linus Walleij

Re: [PATCH 01/11] PINCTRL: lantiq: pinconf uses port instead of pin

[Linus Walleij]

On Tue, Feb 5, 2013 at 3:39 PM, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Fri, Feb 1, 2013 at 1:04 PM, John Crispin <blogic@openwrt.org> wrote:
>
>> The XWAY pinctrl driver invalidly uses the port and not the pin number to work
>> out the registeres and bits to be set for the opendrain and pullup/down
>> resistors.
>>
>> Signed-off-by: John Crispin <blogic@openwrt.org>
>
> Applied for fixes.

Actually after looking at this I start to wonder.

Is the current kernel actually enabling the Lantiq pinctrl
driver or is it not *actually* causing any regressions?

Can I just move all these fixes over to the devel
branch?

Yours,
Linus Walleij

Re: [PATCH 01/11] PINCTRL: lantiq: pinconf uses port instead of pin

[John Crispin]

On 05/02/13 15:59, Linus Walleij wrote:
> Can I just move all these fixes over to the devel
> branch?

Hi,

I don't consider any of this as rc material.
sorry I should have put that in a cover letter.

     John

Re: [PATCH 11/11] PINCTRL: lantiq: fix pin number in ltq_pmx_gpio_request_enable

[Linus Walleij]

On Fri, Feb 1, 2013 at 1:05 PM, John Crispin <blogic@openwrt.org> wrote:

> The mapping logic inside ltq_pmx_gpio_request_enable() was broken. This only
> effected Falcon SoC.
>
> Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
> Signed-off-by: John Crispin <blogic@openwrt.org>

Applied as well.

But now I have no longer any clue on if this is a regression
or not...

Yours,
Linus Walleij

Re: [PATCH 01/11] PINCTRL: lantiq: pinconf uses port instead of pin

[Linus Walleij]

On Tue, Feb 5, 2013 at 4:00 PM, John Crispin <blogic@openwrt.org> wrote:
> On 05/02/13 15:59, Linus Walleij wrote:
>>
>> Can I just move all these fixes over to the devel
>> branch?
>
> I don't consider any of this as rc material.
> sorry I should have put that in a cover letter.

Ah, OK thanks, I'll put it into the devel branch and
be happy.

Yours,
Linus Walleij