From: Peter De Schrijver <pdeschrijver@nvidia.com>
To: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: <linux-tegra@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Grant Likely <grant.likely@secretlab.ca>,
Rob Herring <rob.herring@calxeda.com>,
Rob Landley <rob@landley.net>,
Stephen Warren <swarren@wwwdotorg.org>,
Russell King <linux@arm.linux.org.uk>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Simon Glass <sjg@chromium.org>,
Mike Turquette <mturquette@linaro.org>,
Joseph Lo <josephl@nvidia.com>,
<devicetree-discuss@lists.ozlabs.org>,
<linux-doc@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: [PATCH v7 06/12] clk: tegra: Add flags to tegra_clk_periph()
Date: Fri, 15 Feb 2013 14:36:36 +0200 [thread overview]
Message-ID: <1360931849-7090-7-git-send-email-pdeschrijver@nvidia.com> (raw)
In-Reply-To: <1360931849-7090-1-git-send-email-pdeschrijver@nvidia.com>
We will need some tegra peripheral clocks with the CLK_IGNORE_UNUSED flag,
most notably mselect, which is a bridge between AXI and most peripherals.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
drivers/clk/tegra/clk-periph.c | 11 ++++++-----
drivers/clk/tegra/clk-tegra20.c | 2 +-
drivers/clk/tegra/clk-tegra30.c | 2 +-
drivers/clk/tegra/clk.h | 9 ++++++---
4 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index 788486e..067abb3 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -170,14 +170,15 @@ const struct clk_ops tegra_clk_periph_nodiv_ops = {
static struct clk *_tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph,
- void __iomem *clk_base, u32 offset, bool div)
+ void __iomem *clk_base, u32 offset, bool div,
+ unsigned long flags)
{
struct clk *clk;
struct clk_init_data init;
init.name = name;
init.ops = div ? &tegra_clk_periph_ops : &tegra_clk_periph_nodiv_ops;
- init.flags = div ? 0 : CLK_SET_RATE_PARENT;
+ init.flags = flags;
init.parent_names = parent_names;
init.num_parents = num_parents;
@@ -202,10 +203,10 @@ static struct clk *_tegra_clk_register_periph(const char *name,
struct clk *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
- u32 offset)
+ u32 offset, unsigned long flags)
{
return _tegra_clk_register_periph(name, parent_names, num_parents,
- periph, clk_base, offset, true);
+ periph, clk_base, offset, true, flags);
}
struct clk *tegra_clk_register_periph_nodiv(const char *name,
@@ -214,5 +215,5 @@ struct clk *tegra_clk_register_periph_nodiv(const char *name,
u32 offset)
{
return _tegra_clk_register_periph(name, parent_names, num_parents,
- periph, clk_base, offset, false);
+ periph, clk_base, offset, false, CLK_SET_RATE_PARENT);
}
diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c
index 54c6777..870349e 100644
--- a/drivers/clk/tegra/clk-tegra20.c
+++ b/drivers/clk/tegra/clk-tegra20.c
@@ -1048,7 +1048,7 @@ static void __init tegra20_periph_clk_init(void)
data = &tegra_periph_clk_list[i];
clk = tegra_clk_register_periph(data->name, data->parent_names,
data->num_parents, &data->periph,
- clk_base, data->offset);
+ clk_base, data->offset, data->flags);
clk_register_clkdev(clk, data->con_id, data->dev_id);
clks[data->clk_id] = clk;
}
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index 078f9b8..126747b 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -1665,7 +1665,7 @@ static void __init tegra30_periph_clk_init(void)
data = &tegra_periph_clk_list[i];
clk = tegra_clk_register_periph(data->name, data->parent_names,
data->num_parents, &data->periph,
- clk_base, data->offset);
+ clk_base, data->offset, data->flags);
clk_register_clkdev(clk, data->con_id, data->dev_id);
clks[data->clk_id] = clk;
}
diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
index ea3cce2..4c4bf9a 100644
--- a/drivers/clk/tegra/clk.h
+++ b/drivers/clk/tegra/clk.h
@@ -415,7 +415,7 @@ extern const struct clk_ops tegra_clk_periph_ops;
struct clk *tegra_clk_register_periph(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
- u32 offset);
+ u32 offset, unsigned long flags);
struct clk *tegra_clk_register_periph_nodiv(const char *name,
const char **parent_names, int num_parents,
struct tegra_clk_periph *periph, void __iomem *clk_base,
@@ -458,12 +458,14 @@ struct tegra_periph_init_data {
u32 offset;
const char *con_id;
const char *dev_id;
+ unsigned long flags;
};
#define TEGRA_INIT_DATA_TABLE(_name, _con_id, _dev_id, _parent_names, _offset,\
_mux_shift, _mux_mask, _mux_flags, _div_shift, \
_div_width, _div_frac_width, _div_flags, _regs, \
- _clk_num, _enb_refcnt, _gate_flags, _clk_id, _table) \
+ _clk_num, _enb_refcnt, _gate_flags, _clk_id, _table,\
+ _flags) \
{ \
.name = _name, \
.clk_id = _clk_id, \
@@ -478,6 +480,7 @@ struct tegra_periph_init_data {
.offset = _offset, \
.con_id = _con_id, \
.dev_id = _dev_id, \
+ .flags = _flags \
}
#define TEGRA_INIT_DATA(_name, _con_id, _dev_id, _parent_names, _offset,\
@@ -488,7 +491,7 @@ struct tegra_periph_init_data {
_mux_shift, BIT(_mux_width) - 1, _mux_flags, \
_div_shift, _div_width, _div_frac_width, _div_flags, \
_regs, _clk_num, _enb_refcnt, _gate_flags, _clk_id,\
- NULL)
+ NULL, 0)
/**
* struct clk_super_mux - super clock
--
1.7.1
next prev parent reply other threads:[~2013-02-15 12:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-15 12:36 [PATCH v7 00/12] Tegra114 clockframework Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 01/12] clk: tegra: provide dummy cpu car ops Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 02/12] clk: tegra: Refactor PLL programming code Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 03/12] clk: tegra: Add TEGRA_PLL_BYPASS flag Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 04/12] clk: tegra: Add PLL post divider table Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 05/12] clk: tegra: Add new fields and PLL types for Tegra114 Peter De Schrijver
2013-02-15 12:36 ` Peter De Schrijver [this message]
2013-02-15 12:36 ` [PATCH v7 07/12] clk: tegra: Workaround for Tegra114 MSENC problem Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 08/12] ARM: tegra: Define Tegra114 CAR binding Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 09/12] clk: tegra: Implement clocks for Tegra114 Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 10/12] clk: tegra: devicetree match for nvidia,tegra114-car Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 11/12] ARM: dt: Add references to tegra_car clocks Peter De Schrijver
2013-02-15 12:36 ` [PATCH v7 12/12] clk: tegra: Remove forced clk_enable of uartd Peter De Schrijver
2013-02-18 15:40 ` [PATCH v7 00/12] Tegra114 clockframework Peter De Schrijver
2013-02-19 18:39 ` Stephen Warren
2013-02-19 18:50 ` Mike Turquette
2013-04-04 17:52 ` Peter De Schrijver
2013-02-21 12:58 ` Prashant Gaikwad
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