* [PATCH v4 0/3] DMA: Freescale: Add support for 8-channel DMA engine
@ 2013-07-22 5:55 hongbo.zhang
2013-07-22 5:55 ` [PATCH v4 1/3] DMA: Freescale: revise device tree binding document hongbo.zhang
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: hongbo.zhang @ 2013-07-22 5:55 UTC (permalink / raw)
To: vinod.koul, djbw, leoli, scottwood, linuxppc-dev
Cc: devicetree-discuss, linux-kernel, vakul, Hongbo Zhang
From: Hongbo Zhang <hongbo.zhang@freescale.com>
Hi Vinod, Dan, Scott and Leo, please have a look at these V2 patches.
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
adds support this DMA engine.
V3->V4 changes:
- introduce new patch [1/3] to revise the legacy dma binding document
- and then add new paragraph to describe new dt node binding in [2/3]
- rebase to latest kernel v3.11-rc1
V2->V3 changes:
- edit Documentation/devicetree/bindings/powerpc/fsl/dma.txt
- edit text string in Kconfig and the driver files, using "elo series" to
mention all the current "elo*"
V1->V2 changes:
- removed the codes handling the register dgsr1, since it isn't used corrently
- renamed the DMA DT compatible to "fsl,elo3-dma"
- renamed the new dts files to "elo3-dma-<n>.dtsi"
Hongbo Zhang (3):
DMA: Freescale: revise device tree binding document
DMA: Freescale: Add new 8-channel DMA engine device tree nodes
DMA: Freescale: update driver to support 8-channel DMA engine
.../devicetree/bindings/powerpc/fsl/dma.txt | 122 +++++++++++++++-----
arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 4 +-
arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 81 +++++++++++++
arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi | 81 +++++++++++++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 4 +-
drivers/dma/Kconfig | 9 +-
drivers/dma/fsldma.c | 9 +-
drivers/dma/fsldma.h | 2 +-
8 files changed, 274 insertions(+), 38 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
--
1.7.9.5
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v4 1/3] DMA: Freescale: revise device tree binding document
2013-07-22 5:55 [PATCH v4 0/3] DMA: Freescale: Add support for 8-channel DMA engine hongbo.zhang
@ 2013-07-22 5:55 ` hongbo.zhang
2013-07-22 17:53 ` Scott Wood
2013-07-22 5:55 ` [PATCH v4 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes hongbo.zhang
2013-07-22 5:55 ` [PATCH v4 3/3] DMA: Freescale: update driver to support 8-channel DMA engine hongbo.zhang
2 siblings, 1 reply; 5+ messages in thread
From: hongbo.zhang @ 2013-07-22 5:55 UTC (permalink / raw)
To: vinod.koul, djbw, leoli, scottwood, linuxppc-dev
Cc: devicetree-discuss, linux-kernel, vakul, Hongbo Zhang
From: Hongbo Zhang <hongbo.zhang@freescale.com>
This updates the discription of each type of DMA controller and its channels,
it is preparation for adding another new DMA controller binding, also fixes
some defects of indent for text alignment at the same time.
Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
.../devicetree/bindings/powerpc/fsl/dma.txt | 56 +++++++++++---------
1 file changed, 30 insertions(+), 26 deletions(-)
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index 2a4b4bc..0650171 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -1,33 +1,33 @@
-* Freescale 83xx DMA Controller
+* Freescale DMA Controllers
-Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+** Freescale ELO DMA Controller
+ This is a little-endian DMA controller.
+ Used in Freescale PowerPC 83xx series, such as:
+ mpc8313, mpc8315, mpc8323, mpc8347, mpc8349, mpc8360, mpc8377, mpc8378, mpc8379.
Required properties:
- compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-dma", where CHIP is the processor
- (mpc8349, mpc8360, etc.) and the second is
- "fsl,elo-dma"
+ "fsl,CHIP-dma", where CHIP is the processor
+ and the second is "fsl,elo-dma"
- reg : <registers mapping for DMA general status reg>
-- ranges : Should be defined as specified in 1) to describe the
- DMA controller channels.
+- ranges : physical address range of DMA controller channels
- cell-index : controller index. 0 for controller @ 0x8100
- interrupts : <interrupt mapping for DMA IRQ>
- interrupt-parent : optional, if needed for interrupt mapping
-
- DMA channel nodes:
- compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-dma-channel", where CHIP is the processor
- (mpc8349, mpc8350, etc.) and the second is
- "fsl,elo-dma-channel". However, see note below.
+ "fsl,CHIP-dma-channel", where CHIP is the processor
+ and the second is "fsl,elo-dma-channel".
+ However, see note below.
- reg : <registers mapping for channel>
- cell-index : dma channel index starts at 0.
Optional properties:
- interrupts : <interrupt mapping for DMA channel IRQ>
- (on 83xx this is expected to be identical to
- the interrupts property of the parent node)
+ (on 83xx this is expected to be identical to
+ the interrupts property of the parent node)
- interrupt-parent : optional, if needed for interrupt mapping
Example:
@@ -70,27 +70,31 @@ Example:
};
};
-* Freescale 85xx/86xx DMA Controller
-
-Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
+** Freescale ELOPLUS DMA Controller
+ This is DMA controller with extended addresses and chaining.
+ Used in Freescale PowerPC 85xx/86xx and pxxx series chips, such as:
+ [1] mpc8540, mpc8541, mpc8555, mpc8560, mpc8610, mpc8641,
+ [2] mpc8536, mpc8544, mpc8548, mpc8568, mpc8569, mpc8572, p1010, p1020, p1021,
+ p1022, p1023, p2020, p2041, p3041, p4080, p5020, p5040, and also bsc9131.
Required properties:
-- compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-dma", where CHIP is the processor
- (mpc8540, mpc8540, etc.) and the second is
- "fsl,eloplus-dma"
+- compatible : compatible list, contains 2 entries for chips in above
+ list[1], the first is "fsl,CHIP-dma", where CHIP is the
+ processor and the second is "fsl,eloplus-dma". contains
+ only one "fsl,eloplus-dma" for chips in above list[2]
- reg : <registers mapping for DMA general status reg>
- cell-index : controller index. 0 for controller @ 0x21000,
1 for controller @ 0xc000
-- ranges : Should be defined as specified in 1) to describe the
- DMA controller channels.
+- ranges : physical address range of DMA controller channels
- DMA channel nodes:
- - compatible : compatible list, contains 2 entries, first is
- "fsl,CHIP-dma-channel", where CHIP is the processor
- (mpc8540, mpc8560, etc.) and the second is
- "fsl,eloplus-dma-channel". However, see note below.
+ - compatible : compatible list, contains 2 entries for chips in
+ above list[1], the first is "fsl,CHIP-dma-channel",
+ where CHIP is the processor and the second is
+ "fsl,eloplus-dma-channel". contains only one
+ "fsl,eloplus-dma-channel" for chips in above list[2]
+ However, see note below.
- cell-index : dma channel index starts at 0.
- reg : <registers mapping for channel>
- interrupts : <interrupt mapping for DMA channel IRQ>
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v4 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes
2013-07-22 5:55 [PATCH v4 0/3] DMA: Freescale: Add support for 8-channel DMA engine hongbo.zhang
2013-07-22 5:55 ` [PATCH v4 1/3] DMA: Freescale: revise device tree binding document hongbo.zhang
@ 2013-07-22 5:55 ` hongbo.zhang
2013-07-22 5:55 ` [PATCH v4 3/3] DMA: Freescale: update driver to support 8-channel DMA engine hongbo.zhang
2 siblings, 0 replies; 5+ messages in thread
From: hongbo.zhang @ 2013-07-22 5:55 UTC (permalink / raw)
To: vinod.koul, djbw, leoli, scottwood, linuxppc-dev
Cc: devicetree-discuss, linux-kernel, vakul, Hongbo Zhang
From: Hongbo Zhang <hongbo.zhang@freescale.com>
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
.../devicetree/bindings/powerpc/fsl/dma.txt | 66 ++++++++++++++++
arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 4 +-
arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi | 81 ++++++++++++++++++++
arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi | 81 ++++++++++++++++++++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 4 +-
5 files changed, 232 insertions(+), 4 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
index 0650171..aa44e3c 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
@@ -138,6 +138,72 @@ Example:
};
};
+** Freescale ELO3 DMA Controller
+ This is ELOPLUS controller with 8 channels.
+ Used in Freescale new Txxx and Bxxx series chips, such as:
+ t4240, b4860, t1040
+
+Required properties:
+
+- compatible : should be "fsl,elo3-dma"
+- reg : <registers mapping for DMA general status reg>
+- ranges : physical address range of DMA controller channels
+
+- DMA channel nodes:
+ - compatible : should be "fsl,eloplus-dma-channel"
+ - reg : <registers mapping for channel>
+ - interrupts : <interrupt mapping for DMA channel IRQ>
+ - interrupt-parent : optional, if needed for interrupt mapping
+
+Example:
+dma@100300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,elo3-dma";
+ reg = <0x100300 0x4 0x100600 0x4>;
+ ranges = <0x0 0x100100 0x500>;
+ dma-channel@0 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ interrupts = <28 2 0 0>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ interrupts = <29 2 0 0>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ interrupts = <30 2 0 0>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ interrupts = <31 2 0 0>;
+ };
+ dma-channel@300 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x300 0x80>;
+ interrupts = <76 2 0 0>;
+ };
+ dma-channel@380 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x380 0x80>;
+ interrupts = <77 2 0 0>;
+ };
+ dma-channel@400 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x400 0x80>;
+ interrupts = <78 2 0 0>;
+ };
+ dma-channel@480 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x480 0x80>;
+ interrupts = <79 2 0 0>;
+ };
+};
+
Note on DMA channel compatible properties: The compatible property must say
"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
driver (fsldma). Any DMA channel used by fsldma cannot be used by another
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
index 7399154..ea53ea1 100644
--- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -223,13 +223,13 @@
reg = <0xe2000 0x1000>;
};
-/include/ "qoriq-dma-0.dtsi"
+/include/ "elo3-dma-0.dtsi"
dma@100300 {
fsl,iommu-parent = <&pamu0>;
fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
};
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-1.dtsi"
dma@101300 {
fsl,iommu-parent = <&pamu0>;
fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
new file mode 100644
index 0000000..bc8dc29
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
@@ -0,0 +1,81 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]
+ *
+ * Copyright 2011-2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma0: dma@100300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,elo3-dma";
+ reg = <0x100300 0x4 0x100600 0x4>;
+ ranges = <0x0 0x100100 0x500>;
+ dma-channel@0 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ interrupts = <28 2 0 0>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ interrupts = <29 2 0 0>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ interrupts = <30 2 0 0>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ interrupts = <31 2 0 0>;
+ };
+ dma-channel@300 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x300 0x80>;
+ interrupts = <76 2 0 0>;
+ };
+ dma-channel@380 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x380 0x80>;
+ interrupts = <77 2 0 0>;
+ };
+ dma-channel@400 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x400 0x80>;
+ interrupts = <78 2 0 0>;
+ };
+ dma-channel@480 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x480 0x80>;
+ interrupts = <79 2 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
new file mode 100644
index 0000000..06b38ff
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/elo3-dma-1.dtsi
@@ -0,0 +1,81 @@
+/*
+ * QorIQ DMA device tree stub [ controller @ offset 0x101000 ]
+ *
+ * Copyright 2011-2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+dma1: dma@101300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,elo3-dma";
+ reg = <0x101300 0x4 0x101600 0x4>;
+ ranges = <0x0 0x101100 0x500>;
+ dma-channel@0 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ interrupts = <32 2 0 0>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ interrupts = <33 2 0 0>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ interrupts = <34 2 0 0>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ interrupts = <35 2 0 0>;
+ };
+ dma-channel@300 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x300 0x80>;
+ interrupts = <80 2 0 0>;
+ };
+ dma-channel@380 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x380 0x80>;
+ interrupts = <81 2 0 0>;
+ };
+ dma-channel@400 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x400 0x80>;
+ interrupts = <82 2 0 0>;
+ };
+ dma-channel@480 {
+ compatible = "fsl,eloplus-dma-channel";
+ reg = <0x480 0x80>;
+ interrupts = <83 2 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9..ec95c60 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -387,8 +387,8 @@
reg = <0xea000 0x4000>;
};
-/include/ "qoriq-dma-0.dtsi"
-/include/ "qoriq-dma-1.dtsi"
+/include/ "elo3-dma-0.dtsi"
+/include/ "elo3-dma-1.dtsi"
/include/ "qoriq-espi-0.dtsi"
spi@110000 {
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v4 3/3] DMA: Freescale: update driver to support 8-channel DMA engine
2013-07-22 5:55 [PATCH v4 0/3] DMA: Freescale: Add support for 8-channel DMA engine hongbo.zhang
2013-07-22 5:55 ` [PATCH v4 1/3] DMA: Freescale: revise device tree binding document hongbo.zhang
2013-07-22 5:55 ` [PATCH v4 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes hongbo.zhang
@ 2013-07-22 5:55 ` hongbo.zhang
2 siblings, 0 replies; 5+ messages in thread
From: hongbo.zhang @ 2013-07-22 5:55 UTC (permalink / raw)
To: vinod.koul, djbw, leoli, scottwood, linuxppc-dev
Cc: devicetree-discuss, linux-kernel, vakul, Hongbo Zhang
From: Hongbo Zhang <hongbo.zhang@freescale.com>
This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.
Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
---
drivers/dma/Kconfig | 9 +++++----
drivers/dma/fsldma.c | 9 ++++++---
drivers/dma/fsldma.h | 2 +-
3 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 6825957..f3642fc 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -89,14 +89,15 @@ config AT_HDMAC
Support the Atmel AHB DMA controller.
config FSL_DMA
- tristate "Freescale Elo and Elo Plus DMA support"
+ tristate "Freescale ELO series DMA support"
depends on FSL_SOC
select DMA_ENGINE
select ASYNC_TX_ENABLE_CHANNEL_SWITCH
---help---
- Enable support for the Freescale Elo and Elo Plus DMA controllers.
- The Elo is the DMA controller on some 82xx and 83xx parts, and the
- Elo Plus is the DMA controller on 85xx and 86xx parts.
+ Enable support for the Freescale ELO series DMA controllers.
+ The ELO is the DMA controller on some mpc82xx and mpc83xx parts, the
+ ELOPLUS is on mpc85xx and mpc86xx and Pxxx parts, and the ELO3 is on
+ some Txxx and Bxxx parts. Look up user manuals for details anyway.
config MPC512X_DMA
tristate "Freescale MPC512x built-in DMA engine support"
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 49e8fbd..16a9a48 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev,
WARN_ON(fdev->feature != chan->feature);
chan->dev = fdev->dev;
- chan->id = ((res.start - 0x100) & 0xfff) >> 7;
+ chan->id = (res.start & 0xfff) < 0x300 ?
+ ((res.start - 0x100) & 0xfff) >> 7 :
+ ((res.start - 0x200) & 0xfff) >> 7;
if (chan->id >= FSL_DMA_MAX_CHANS_PER_DEVICE) {
dev_err(fdev->dev, "too many channels for device\n");
err = -EINVAL;
@@ -1434,6 +1436,7 @@ static int fsldma_of_remove(struct platform_device *op)
}
static const struct of_device_id fsldma_of_ids[] = {
+ { .compatible = "fsl,elo3-dma", },
{ .compatible = "fsl,eloplus-dma", },
{ .compatible = "fsl,elo-dma", },
{}
@@ -1455,7 +1458,7 @@ static struct platform_driver fsldma_of_driver = {
static __init int fsldma_init(void)
{
- pr_info("Freescale Elo / Elo Plus DMA driver\n");
+ pr_info("Freescale Elo series DMA driver\n");
return platform_driver_register(&fsldma_of_driver);
}
@@ -1467,5 +1470,5 @@ static void __exit fsldma_exit(void)
subsys_initcall(fsldma_init);
module_exit(fsldma_exit);
-MODULE_DESCRIPTION("Freescale Elo / Elo Plus DMA driver");
+MODULE_DESCRIPTION("Freescale Elo series DMA driver");
MODULE_LICENSE("GPL");
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index f5c3879..1ffc244 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -112,7 +112,7 @@ struct fsldma_chan_regs {
};
struct fsldma_chan;
-#define FSL_DMA_MAX_CHANS_PER_DEVICE 4
+#define FSL_DMA_MAX_CHANS_PER_DEVICE 8
struct fsldma_device {
void __iomem *regs; /* DGSR register base */
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v4 1/3] DMA: Freescale: revise device tree binding document
2013-07-22 5:55 ` [PATCH v4 1/3] DMA: Freescale: revise device tree binding document hongbo.zhang
@ 2013-07-22 17:53 ` Scott Wood
0 siblings, 0 replies; 5+ messages in thread
From: Scott Wood @ 2013-07-22 17:53 UTC (permalink / raw)
To: hongbo.zhang
Cc: vinod.koul, djbw, leoli, linuxppc-dev, devicetree-discuss,
linux-kernel, vakul, Hongbo Zhang
On 07/22/2013 12:55:38 AM, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>
> This updates the discription of each type of DMA controller and its
> channels,
> it is preparation for adding another new DMA controller binding, also
> fixes
> some defects of indent for text alignment at the same time.
>
> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
> ---
> .../devicetree/bindings/powerpc/fsl/dma.txt | 56
> +++++++++++---------
> 1 file changed, 30 insertions(+), 26 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> index 2a4b4bc..0650171 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> @@ -1,33 +1,33 @@
> -* Freescale 83xx DMA Controller
> +* Freescale DMA Controllers
>
> -Freescale PowerPC 83xx have on chip general purpose DMA controllers.
> +** Freescale ELO DMA Controller
> + This is a little-endian DMA controller.
> + Used in Freescale PowerPC 83xx series, such as:
> + mpc8313, mpc8315, mpc8323, mpc8347, mpc8349, mpc8360, mpc8377,
> mpc8378, mpc8379.
You don't need to list every single chip... What happens when new
chips come out (not so likely with mpc83xx, but more likely for
eloplus/elo3)? Do we keep updating this, or have a list that looks
complete but isn't?
My point in suggesting that some examples be given is just so that the
reader knows where to find a manual that documents a particular version
of "elo", and to give a rough idea of what product families use it.
> -Freescale PowerPC 85xx/86xx have on chip general purpose DMA
> controllers.
> +** Freescale ELOPLUS DMA Controller
> + This is DMA controller with extended addresses and chaining.
> + Used in Freescale PowerPC 85xx/86xx and pxxx series chips, such
> as:
> + [1] mpc8540, mpc8541, mpc8555, mpc8560, mpc8610, mpc8641,
> + [2] mpc8536, mpc8544, mpc8548, mpc8568, mpc8569, mpc8572, p1010,
> p1020, p1021,
> + p1022, p1023, p2020, p2041, p3041, p4080, p5020, p5040, and
> also bsc9131.
What do [1] and [2] signify here?
Oh, I see. It's weird for footnotes to come before the place they're
referenced...
> Required properties:
>
> -- compatible : compatible list, contains 2 entries, first is
> - "fsl,CHIP-dma", where CHIP is the processor
> - (mpc8540, mpc8540, etc.) and the second is
> - "fsl,eloplus-dma"
> +- compatible : compatible list, contains 2 entries for chips
> in above
> + list[1], the first is "fsl,CHIP-dma", where
> CHIP is the
> + processor and the second is "fsl,eloplus-dma".
> contains
> + only one "fsl,eloplus-dma" for chips in above
> list[2]
Don't encode this difference in the binding document. It wasn't on
purpose, but rather an artifact of factoring things out into dtsi
files. Just make it optional.
Why can't we just talk about what compatible must include, as I
suggested earlier, rather than what it must *be*?
> - reg : <registers mapping for DMA general status reg>
> - cell-index : controller index. 0 for controller @ 0x21000,
> 1 for controller @ 0xc000
> -- ranges : Should be defined as specified in 1) to
> describe the
> - DMA controller channels.
> +- ranges : physical address range of DMA controller
> channels
ranges will not have physical addresses at this level. They'll only
become physical addresses when translated by the ccsr node's ranges.
-Scott
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-07-22 17:53 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2013-07-22 5:55 [PATCH v4 0/3] DMA: Freescale: Add support for 8-channel DMA engine hongbo.zhang
2013-07-22 5:55 ` [PATCH v4 1/3] DMA: Freescale: revise device tree binding document hongbo.zhang
2013-07-22 17:53 ` Scott Wood
2013-07-22 5:55 ` [PATCH v4 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes hongbo.zhang
2013-07-22 5:55 ` [PATCH v4 3/3] DMA: Freescale: update driver to support 8-channel DMA engine hongbo.zhang
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