* [PATCH V5 0/2] genirq: arm64: perf: support for percpu pmu interrupt
@ 2013-11-25 9:45 Vinayak Kale
2013-11-25 9:45 ` [PATCH V5 1/2] genirq: Add an accessor for IRQ_PER_CPU flag Vinayak Kale
2013-11-25 9:45 ` [PATCH V5 2/2] arm64: perf: add support for percpu pmu interrupt Vinayak Kale
0 siblings, 2 replies; 6+ messages in thread
From: Vinayak Kale @ 2013-11-25 9:45 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel
Cc: tglx, will.deacon, patches, jcm, sboyd, marc.zyngier, Vinayak Kale
This patch series adds support to handle interrupt registration/deregistration
in arm64 pmu driver when pmu interrupt type is percpu.
Changelog:
V5:
* In irqdesc.h: Added Chris Smith's sign-off.
In arm64 pmu driver: Handle the invalid irq-0 case for platform_get_irq().
V4:
* In arm64 pmu driver: Avoid using irq_to_desc() to check validity of irq.
V3:
* Remove validity check for 'desc' from accessor function in irqdesc.h .
Instead, check the irq 'desc' validity in arm64 pmu driver.
V2:
* To determine whether an IRQ is percpu or not, added an accessor function in
irqdesc.h . This approach was used by Chris Smith here[1] for similar changes
in arm pmu driver.
* In arm64 pmu driver: Got rid of unnecessary pointer typecastings.
[1] http://lkml.indiana.edu/hypermail/linux/kernel/1207.3/02955.html
Vinayak Kale (2):
genirq: Add an accessor for IRQ_PER_CPU flag
arm64: perf: add support for percpu pmu interrupt
arch/arm64/kernel/perf_event.c | 108 ++++++++++++++++++++++++++++++----------
include/linux/irqdesc.h | 8 +++
2 files changed, 89 insertions(+), 27 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH V5 1/2] genirq: Add an accessor for IRQ_PER_CPU flag
2013-11-25 9:45 [PATCH V5 0/2] genirq: arm64: perf: support for percpu pmu interrupt Vinayak Kale
@ 2013-11-25 9:45 ` Vinayak Kale
2013-11-25 9:45 ` [PATCH V5 2/2] arm64: perf: add support for percpu pmu interrupt Vinayak Kale
1 sibling, 0 replies; 6+ messages in thread
From: Vinayak Kale @ 2013-11-25 9:45 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel
Cc: tglx, will.deacon, patches, jcm, sboyd, marc.zyngier,
Vinayak Kale, Chris Smith
This patch adds an accessor function for IRQ_PER_CPU flag.
The accessor function is useful to determine whether an IRQ is percpu or not.
This patch is based on an older patch posted by Chris Smith here [1].
There is a minor change w.r.t. Chris's original patch: I have kept the
accessor function name as 'irq_is_percpu' instead of 'irq_is_per_cpu'.
[1]: http://lkml.indiana.edu/hypermail/linux/kernel/1207.3/02955.html
Signed-off-by: Chris Smith <chris.smith@st.com>
Signed-off-by: Vinayak Kale <vkale@apm.com>
---
include/linux/irqdesc.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index 56fb646..26e2661 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -152,6 +152,14 @@ static inline int irq_balancing_disabled(unsigned int irq)
return desc->status_use_accessors & IRQ_NO_BALANCING_MASK;
}
+static inline int irq_is_percpu(unsigned int irq)
+{
+ struct irq_desc *desc;
+
+ desc = irq_to_desc(irq);
+ return desc->status_use_accessors & IRQ_PER_CPU;
+}
+
static inline void
irq_set_lockdep_class(unsigned int irq, struct lock_class_key *class)
{
--
1.7.9.5
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH V5 2/2] arm64: perf: add support for percpu pmu interrupt
2013-11-25 9:45 [PATCH V5 0/2] genirq: arm64: perf: support for percpu pmu interrupt Vinayak Kale
2013-11-25 9:45 ` [PATCH V5 1/2] genirq: Add an accessor for IRQ_PER_CPU flag Vinayak Kale
@ 2013-11-25 9:45 ` Vinayak Kale
2013-11-25 18:41 ` Will Deacon
1 sibling, 1 reply; 6+ messages in thread
From: Vinayak Kale @ 2013-11-25 9:45 UTC (permalink / raw)
To: linux-kernel, linux-arm-kernel
Cc: tglx, will.deacon, patches, jcm, sboyd, marc.zyngier,
Vinayak Kale, Tuan Phan
Add support for irq registration when pmu interrupt is percpu.
Signed-off-by: Vinayak Kale <vkale@apm.com>
Signed-off-by: Tuan Phan <tphan@apm.com>
---
arch/arm64/kernel/perf_event.c | 108 ++++++++++++++++++++++++++++++----------
1 file changed, 81 insertions(+), 27 deletions(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index cea1594..a2efab3 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -22,6 +22,7 @@
#include <linux/bitmap.h>
#include <linux/interrupt.h>
+#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/export.h>
#include <linux/perf_event.h>
@@ -363,22 +364,55 @@ validate_group(struct perf_event *event)
}
static void
+armpmu_disable_percpu_irq(void *data)
+{
+ struct arm_pmu *armpmu = data;
+ struct platform_device *pmu_device = armpmu->plat_device;
+ int irq = platform_get_irq(pmu_device, 0);
+
+ cpumask_test_and_clear_cpu(smp_processor_id(), &armpmu->active_irqs);
+ disable_percpu_irq(irq);
+}
+
+static void
armpmu_release_hardware(struct arm_pmu *armpmu)
{
int i, irq, irqs;
struct platform_device *pmu_device = armpmu->plat_device;
irqs = min(pmu_device->num_resources, num_possible_cpus());
+ if (irqs < 1)
+ return;
- for (i = 0; i < irqs; ++i) {
- if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
- continue;
- irq = platform_get_irq(pmu_device, i);
- if (irq >= 0)
- free_irq(irq, armpmu);
+ irq = platform_get_irq(pmu_device, 0);
+ if (irq <= 0)
+ return;
+
+ if (irq_is_percpu(irq)) {
+ on_each_cpu(armpmu_disable_percpu_irq, armpmu, 1);
+ free_percpu_irq(irq, &cpu_hw_events);
+ } else {
+ for (i = 0; i < irqs; ++i) {
+ if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
+ continue;
+ irq = platform_get_irq(pmu_device, i);
+ if (irq > 0)
+ free_irq(irq, armpmu);
+ }
}
}
+static void
+armpmu_enable_percpu_irq(void *data)
+{
+ struct arm_pmu *armpmu = data;
+ struct platform_device *pmu_device = armpmu->plat_device;
+ int irq = platform_get_irq(pmu_device, 0);
+
+ enable_percpu_irq(irq, 0);
+ cpumask_set_cpu(smp_processor_id(), &armpmu->active_irqs);
+}
+
static int
armpmu_reserve_hardware(struct arm_pmu *armpmu)
{
@@ -396,34 +430,54 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
return -ENODEV;
}
- for (i = 0; i < irqs; ++i) {
- err = 0;
- irq = platform_get_irq(pmu_device, i);
- if (irq < 0)
- continue;
+ irq = platform_get_irq(pmu_device, 0);
+ if (irq <= 0) {
+ pr_err("failed to get valid irq for PMU device\n");
+ return -ENODEV;
+ }
- /*
- * If we have a single PMU interrupt that we can't shift,
- * assume that we're running on a uniprocessor machine and
- * continue. Otherwise, continue without this interrupt.
- */
- if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
- pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
- irq, i);
- continue;
- }
+ if (irq_is_percpu(irq)) {
+ err = request_percpu_irq(irq, armpmu->handle_irq,
+ "arm-pmu", &cpu_hw_events);
- err = request_irq(irq, armpmu->handle_irq,
- IRQF_NOBALANCING,
- "arm-pmu", armpmu);
if (err) {
- pr_err("unable to request IRQ%d for ARM PMU counters\n",
- irq);
+ pr_err("unable to request percpu IRQ%d for ARM PMU counters\n",
+ irq);
armpmu_release_hardware(armpmu);
return err;
}
- cpumask_set_cpu(i, &armpmu->active_irqs);
+ on_each_cpu(armpmu_enable_percpu_irq, armpmu, 1);
+ } else {
+ for (i = 0; i < irqs; ++i) {
+ err = 0;
+ irq = platform_get_irq(pmu_device, i);
+ if (irq <= 0)
+ continue;
+
+ /*
+ * If we have a single PMU interrupt that we can't shift,
+ * assume that we're running on a uniprocessor machine and
+ * continue. Otherwise, continue without this interrupt.
+ */
+ if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
+ pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
+ irq, i);
+ continue;
+ }
+
+ err = request_irq(irq, armpmu->handle_irq,
+ IRQF_NOBALANCING,
+ "arm-pmu", armpmu);
+ if (err) {
+ pr_err("unable to request IRQ%d for ARM PMU counters\n",
+ irq);
+ armpmu_release_hardware(armpmu);
+ return err;
+ }
+
+ cpumask_set_cpu(i, &armpmu->active_irqs);
+ }
}
return 0;
--
1.7.9.5
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH V5 2/2] arm64: perf: add support for percpu pmu interrupt
2013-11-25 9:45 ` [PATCH V5 2/2] arm64: perf: add support for percpu pmu interrupt Vinayak Kale
@ 2013-11-25 18:41 ` Will Deacon
2013-11-26 8:44 ` Vinayak Kale
0 siblings, 1 reply; 6+ messages in thread
From: Will Deacon @ 2013-11-25 18:41 UTC (permalink / raw)
To: Vinayak Kale
Cc: linux-kernel, linux-arm-kernel, tglx, patches, jcm, sboyd,
Marc Zyngier, Tuan Phan
On Mon, Nov 25, 2013 at 09:45:53AM +0000, Vinayak Kale wrote:
> Add support for irq registration when pmu interrupt is percpu.
>
> Signed-off-by: Vinayak Kale <vkale@apm.com>
> Signed-off-by: Tuan Phan <tphan@apm.com>
> ---
> arch/arm64/kernel/perf_event.c | 108 ++++++++++++++++++++++++++++++----------
> 1 file changed, 81 insertions(+), 27 deletions(-)
>
> diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
> index cea1594..a2efab3 100644
> --- a/arch/arm64/kernel/perf_event.c
> +++ b/arch/arm64/kernel/perf_event.c
> @@ -22,6 +22,7 @@
>
> #include <linux/bitmap.h>
> #include <linux/interrupt.h>
> +#include <linux/irq.h>
> #include <linux/kernel.h>
> #include <linux/export.h>
> #include <linux/perf_event.h>
> @@ -363,22 +364,55 @@ validate_group(struct perf_event *event)
> }
>
> static void
> +armpmu_disable_percpu_irq(void *data)
> +{
> + struct arm_pmu *armpmu = data;
> + struct platform_device *pmu_device = armpmu->plat_device;
> + int irq = platform_get_irq(pmu_device, 0);
> +
> + cpumask_test_and_clear_cpu(smp_processor_id(), &armpmu->active_irqs);
> + disable_percpu_irq(irq);
> +}
> +
> +static void
> armpmu_release_hardware(struct arm_pmu *armpmu)
> {
> int i, irq, irqs;
> struct platform_device *pmu_device = armpmu->plat_device;
>
> irqs = min(pmu_device->num_resources, num_possible_cpus());
> + if (irqs < 1)
Can you just make irqs unsigned, then do if (!irqs) instead?
> + return;
>
> - for (i = 0; i < irqs; ++i) {
> - if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
> - continue;
> - irq = platform_get_irq(pmu_device, i);
> - if (irq >= 0)
> - free_irq(irq, armpmu);
> + irq = platform_get_irq(pmu_device, 0);
> + if (irq <= 0)
> + return;
> +
> + if (irq_is_percpu(irq)) {
> + on_each_cpu(armpmu_disable_percpu_irq, armpmu, 1);
> + free_percpu_irq(irq, &cpu_hw_events);
> + } else {
> + for (i = 0; i < irqs; ++i) {
> + if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
> + continue;
> + irq = platform_get_irq(pmu_device, i);
> + if (irq > 0)
> + free_irq(irq, armpmu);
> + }
> }
> }
>
> +static void
> +armpmu_enable_percpu_irq(void *data)
> +{
> + struct arm_pmu *armpmu = data;
> + struct platform_device *pmu_device = armpmu->plat_device;
> + int irq = platform_get_irq(pmu_device, 0);
> +
> + enable_percpu_irq(irq, 0);
IRQ_TYPE_NONE?
> + cpumask_set_cpu(smp_processor_id(), &armpmu->active_irqs);
> +}
> +
> static int
> armpmu_reserve_hardware(struct arm_pmu *armpmu)
> {
> @@ -396,34 +430,54 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
> return -ENODEV;
> }
>
> - for (i = 0; i < irqs; ++i) {
> - err = 0;
> - irq = platform_get_irq(pmu_device, i);
> - if (irq < 0)
> - continue;
> + irq = platform_get_irq(pmu_device, 0);
> + if (irq <= 0) {
> + pr_err("failed to get valid irq for PMU device\n");
> + return -ENODEV;
> + }
>
> - /*
> - * If we have a single PMU interrupt that we can't shift,
> - * assume that we're running on a uniprocessor machine and
> - * continue. Otherwise, continue without this interrupt.
> - */
> - if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
> - pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
> - irq, i);
> - continue;
> - }
> + if (irq_is_percpu(irq)) {
> + err = request_percpu_irq(irq, armpmu->handle_irq,
> + "arm-pmu", &cpu_hw_events);
This is a bit of a kludge passing in the cpu_hw_events as the per-cpu token,
but I guess that will do for now. There is potential for something like a
master-aware L2 PMU which uses PPIs and expects to pass something different
back to the IRQ handler.
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH V5 2/2] arm64: perf: add support for percpu pmu interrupt
2013-11-25 18:41 ` Will Deacon
@ 2013-11-26 8:44 ` Vinayak Kale
2013-11-29 18:48 ` Will Deacon
0 siblings, 1 reply; 6+ messages in thread
From: Vinayak Kale @ 2013-11-26 8:44 UTC (permalink / raw)
To: Will Deacon
Cc: linux-kernel, linux-arm-kernel, tglx, patches, jcm, sboyd,
Marc Zyngier, Tuan Phan
On Tue, Nov 26, 2013 at 12:11 AM, Will Deacon <will.deacon@arm.com> wrote:
> On Mon, Nov 25, 2013 at 09:45:53AM +0000, Vinayak Kale wrote:
>> Add support for irq registration when pmu interrupt is percpu.
>>
>> Signed-off-by: Vinayak Kale <vkale@apm.com>
>> Signed-off-by: Tuan Phan <tphan@apm.com>
>> ---
>> arch/arm64/kernel/perf_event.c | 108 ++++++++++++++++++++++++++++++----------
>> 1 file changed, 81 insertions(+), 27 deletions(-)
>>
>> diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
>> index cea1594..a2efab3 100644
>> --- a/arch/arm64/kernel/perf_event.c
>> +++ b/arch/arm64/kernel/perf_event.c
>> @@ -22,6 +22,7 @@
>>
>> #include <linux/bitmap.h>
>> #include <linux/interrupt.h>
>> +#include <linux/irq.h>
>> #include <linux/kernel.h>
>> #include <linux/export.h>
>> #include <linux/perf_event.h>
>> @@ -363,22 +364,55 @@ validate_group(struct perf_event *event)
>> }
>>
>> static void
>> +armpmu_disable_percpu_irq(void *data)
>> +{
>> + struct arm_pmu *armpmu = data;
>> + struct platform_device *pmu_device = armpmu->plat_device;
>> + int irq = platform_get_irq(pmu_device, 0);
>> +
>> + cpumask_test_and_clear_cpu(smp_processor_id(), &armpmu->active_irqs);
>> + disable_percpu_irq(irq);
>> +}
>> +
>> +static void
>> armpmu_release_hardware(struct arm_pmu *armpmu)
>> {
>> int i, irq, irqs;
>> struct platform_device *pmu_device = armpmu->plat_device;
>>
>> irqs = min(pmu_device->num_resources, num_possible_cpus());
>> + if (irqs < 1)
>
> Can you just make irqs unsigned, then do if (!irqs) instead?
Okay. I will also modify already existing similar check in function
'armpmu_reserve_hardware'.
>
>> + return;
>>
>> - for (i = 0; i < irqs; ++i) {
>> - if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
>> - continue;
>> - irq = platform_get_irq(pmu_device, i);
>> - if (irq >= 0)
>> - free_irq(irq, armpmu);
>> + irq = platform_get_irq(pmu_device, 0);
>> + if (irq <= 0)
>> + return;
>> +
>> + if (irq_is_percpu(irq)) {
>> + on_each_cpu(armpmu_disable_percpu_irq, armpmu, 1);
>> + free_percpu_irq(irq, &cpu_hw_events);
>> + } else {
>> + for (i = 0; i < irqs; ++i) {
>> + if (!cpumask_test_and_clear_cpu(i, &armpmu->active_irqs))
>> + continue;
>> + irq = platform_get_irq(pmu_device, i);
>> + if (irq > 0)
>> + free_irq(irq, armpmu);
>> + }
>> }
>> }
>>
>> +static void
>> +armpmu_enable_percpu_irq(void *data)
>> +{
>> + struct arm_pmu *armpmu = data;
>> + struct platform_device *pmu_device = armpmu->plat_device;
>> + int irq = platform_get_irq(pmu_device, 0);
>> +
>> + enable_percpu_irq(irq, 0);
>
> IRQ_TYPE_NONE?
Did you mean to use macro instead or 0? If yes, I will modify.
Or, are you asking why are we using 0? For this part here is my comment:
Inside GIC it's 'implementation specific' whether to allow
configuration of level/edge type for PPIs.
So maybe we should leave it to boot-loader to do such config if any
such explicit config is needed.
Passing 0 (=IRQ_TYPE_NONE) to 'enable_percpu_irq' ensures that kernel
doesn't touch the existing configuration.
I observed that arm arch timer code also passes 0 (IRQ_TYPE_NONE) to
'enable_percpu_irq'.
>
>> + cpumask_set_cpu(smp_processor_id(), &armpmu->active_irqs);
>> +}
>> +
>> static int
>> armpmu_reserve_hardware(struct arm_pmu *armpmu)
>> {
>> @@ -396,34 +430,54 @@ armpmu_reserve_hardware(struct arm_pmu *armpmu)
>> return -ENODEV;
>> }
>>
>> - for (i = 0; i < irqs; ++i) {
>> - err = 0;
>> - irq = platform_get_irq(pmu_device, i);
>> - if (irq < 0)
>> - continue;
>> + irq = platform_get_irq(pmu_device, 0);
>> + if (irq <= 0) {
>> + pr_err("failed to get valid irq for PMU device\n");
>> + return -ENODEV;
>> + }
>>
>> - /*
>> - * If we have a single PMU interrupt that we can't shift,
>> - * assume that we're running on a uniprocessor machine and
>> - * continue. Otherwise, continue without this interrupt.
>> - */
>> - if (irq_set_affinity(irq, cpumask_of(i)) && irqs > 1) {
>> - pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
>> - irq, i);
>> - continue;
>> - }
>> + if (irq_is_percpu(irq)) {
>> + err = request_percpu_irq(irq, armpmu->handle_irq,
>> + "arm-pmu", &cpu_hw_events);
>
> This is a bit of a kludge passing in the cpu_hw_events as the per-cpu token,
> but I guess that will do for now. There is potential for something like a
> master-aware L2 PMU which uses PPIs and expects to pass something different
> back to the IRQ handler.
>
> Will
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH V5 2/2] arm64: perf: add support for percpu pmu interrupt
2013-11-26 8:44 ` Vinayak Kale
@ 2013-11-29 18:48 ` Will Deacon
0 siblings, 0 replies; 6+ messages in thread
From: Will Deacon @ 2013-11-29 18:48 UTC (permalink / raw)
To: Vinayak Kale
Cc: linux-kernel, linux-arm-kernel, tglx, patches, jcm, sboyd,
Marc Zyngier, Tuan Phan
On Tue, Nov 26, 2013 at 08:44:24AM +0000, Vinayak Kale wrote:
> On Tue, Nov 26, 2013 at 12:11 AM, Will Deacon <will.deacon@arm.com> wrote:
> > On Mon, Nov 25, 2013 at 09:45:53AM +0000, Vinayak Kale wrote:
> >> +static void
> >> +armpmu_enable_percpu_irq(void *data)
> >> +{
> >> + struct arm_pmu *armpmu = data;
> >> + struct platform_device *pmu_device = armpmu->plat_device;
> >> + int irq = platform_get_irq(pmu_device, 0);
> >> +
> >> + enable_percpu_irq(irq, 0);
> >
> > IRQ_TYPE_NONE?
>
> Did you mean to use macro instead or 0? If yes, I will modify.
Yes.
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-11-29 18:49 UTC | newest]
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2013-11-25 9:45 [PATCH V5 0/2] genirq: arm64: perf: support for percpu pmu interrupt Vinayak Kale
2013-11-25 9:45 ` [PATCH V5 1/2] genirq: Add an accessor for IRQ_PER_CPU flag Vinayak Kale
2013-11-25 9:45 ` [PATCH V5 2/2] arm64: perf: add support for percpu pmu interrupt Vinayak Kale
2013-11-25 18:41 ` Will Deacon
2013-11-26 8:44 ` Vinayak Kale
2013-11-29 18:48 ` Will Deacon
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