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* RESEND [PATCH V9 2/2] ARM: dts: exynos5250: Enable ahci sata and sata phy
@ 2014-03-04 11:10 Yuvaraj Kumar C D
  2014-03-04 13:32 ` Kishon Vijay Abraham I
  0 siblings, 1 reply; 4+ messages in thread
From: Yuvaraj Kumar C D @ 2014-03-04 11:10 UTC (permalink / raw)
  To: kishon, kgene.kim, linux-kernel, linux-arm-kernel, devicetree, linux-doc
  Cc: grant.likely, joshi, swarren, mark.rutland, galak, jg1.han,
	ks.giri, b.zolnierkie, t.figa, christoffer.dall,
	Yuvaraj Kumar C D

This patch adds dt entry for ahci sata controller and its
corresponding phy controller.phy node has been added w.r.t
new generic phy framework.

Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
---
 .../devicetree/bindings/ata/exynos-sata-phy.txt    |   14 --------
 .../devicetree/bindings/ata/exynos-sata.txt        |   25 +++++++++-----
 .../devicetree/bindings/phy/samsung-phy.txt        |   36 ++++++++++++++++++++
 arch/arm/boot/dts/exynos5250-arndale.dts           |   21 ++++++++++++
 arch/arm/boot/dts/exynos5250-smdk5250.dts          |   17 +++++----
 arch/arm/boot/dts/exynos5250.dtsi                  |   18 +++++++---
 6 files changed, 98 insertions(+), 33 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/ata/exynos-sata-phy.txt

diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
deleted file mode 100644
index 37824fa..0000000
--- a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-* Samsung SATA PHY Controller
-
-SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
-Each SATA PHY controller should have its own node.
-
-Required properties:
-- compatible        : compatible list, contains "samsung,exynos5-sata-phy"
-- reg               : <registers mapping>
-
-Example:
-        sata@ffe07000 {
-                compatible = "samsung,exynos5-sata-phy";
-                reg = <0xffe07000 0x1000>;
-        };
diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt b/Documentation/devicetree/bindings/ata/exynos-sata.txt
index 0849f10..b2adb1f 100644
--- a/Documentation/devicetree/bindings/ata/exynos-sata.txt
+++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt
@@ -4,14 +4,21 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
 Each SATA controller should have its own node.
 
 Required properties:
-- compatible        : compatible list, contains "samsung,exynos5-sata"
-- interrupts        : <interrupt mapping for SATA IRQ>
-- reg               : <registers mapping>
-- samsung,sata-freq : <frequency in MHz>
+- compatible		: compatible list, contains "samsung,exynos5-sata"
+- interrupts		: <interrupt mapping for SATA IRQ>
+- reg			: <registers mapping>
+- samsung,sata-freq	: <frequency in MHz>
+- phys			: as mentioned in phy-bindings.txt
+- phy-names		: as mentioned in phy-bindings.txt
 
 Example:
-        sata@ffe08000 {
-                compatible = "samsung,exynos5-sata";
-                reg = <0xffe08000 0x1000>;
-                interrupts = <115>;
-        };
+	sata@122f0000 {
+		compatible = "snps,dwc-ahci";
+		samsung,sata-freq = <66>;
+		reg = <0x122f0000 0x1ff>;
+		interrupts = <0 115 0>;
+		clocks = <&clock 277>, <&clock 143>;
+		clock-names = "sata", "sclk_sata";
+		phys = <&sata_phy>;
+		phy-names = "sata-phy";
+	};
diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index c0fccaa..a937f75 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -20,3 +20,39 @@ Required properties:
 - compatible : should be "samsung,exynos5250-dp-video-phy";
 - reg : offset and length of the Display Port PHY register set;
 - #phy-cells : from the generic PHY bindings, must be 0;
+
+Samsung SATA PHY Controller
+---------------------------
+
+SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
+Each SATA PHY controller should have its own node.
+
+Required properties:
+- compatible        : compatible list, contains "samsung,exynos5250-sata-phy"
+- reg : offset and length of the SATA PHY register set;
+- #phy-cells : from the generic phy bindings;
+
+Example:
+	sata_phy: sata-phy@12170000 {
+		compatible = "samsung,exynos5250-sata-phy";
+		reg = <0x12170000 0x1ff>;
+		clocks = <&clock 287>;
+		clock-names = "sata_phyctrl";
+		#phy-cells = <0>;
+		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
+		samsung,syscon-phandle = <&pmu_syscon>;
+	};
+
+Device-Tree bindings for sataphy i2c client driver
+--------------------------------------------------
+
+Required properties:
+compatible: Should be "samsung,exynos-sataphy-i2c"
+- reg: I2C address of the sataphy i2c device.
+
+Example:
+
+	sata_phy_i2c:sata-phy@38 {
+		compatible = "samsung,exynos-sataphy-i2c";
+		reg = <0x38>;
+	};
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 38b96a4..97eef40 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -375,6 +375,27 @@
 		};
 	};
 
+	i2c@121D0000 {
+		status = "okay";
+		samsung,i2c-sda-delay = <100>;
+		samsung,i2c-max-bus-freq = <40000>;
+		samsung,i2c-slave-addr = <0x38>;
+
+		sata_phy_i2c:sata-phy@38 {
+			compatible = "samsung,exynos-sataphy-i2c";
+			reg = <0x38>;
+		};
+	};
+
+	sata@122F0000 {
+		status = "okay";
+	};
+
+	sata-phy@12170000 {
+		status = "okay";
+		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
+	};
+
 	mmc_0: mmc@12200000 {
 		status = "okay";
 		num-slots = <1>;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index f76946e..81782c1b 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -242,16 +242,12 @@
 		samsung,i2c-slave-addr = <0x38>;
 		status = "okay";
 
-		sata-phy {
-			compatible = "samsung,sata-phy";
+		sata_phy_i2c:sata-phy@38 {
+			compatible = "samsung,exynos-sataphy-i2c";
 			reg = <0x38>;
 		};
 	};
 
-	sata@122F0000 {
-		samsung,sata-freq = <66>;
-	};
-
 	i2c@12C80000 {
 		samsung,i2c-sda-delay = <100>;
 		samsung,i2c-max-bus-freq = <66000>;
@@ -274,6 +270,15 @@
 		};
 	};
 
+	sata@122F0000 {
+		status = "okay";
+	};
+
+	sata-phy@12170000 {
+		status = "okay";
+		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
+	};
+
 	mmc@12200000 {
 		status = "okay";
 		num-slots = <1>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 8f6300f..31f7cab 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -46,6 +46,7 @@
 		i2c6 = &i2c_6;
 		i2c7 = &i2c_7;
 		i2c8 = &i2c_8;
+		i2c9 = &i2c_9;
 		pinctrl0 = &pinctrl_0;
 		pinctrl1 = &pinctrl_1;
 		pinctrl2 = &pinctrl_2;
@@ -233,16 +234,25 @@
 	};
 
 	sata@122F0000 {
-		compatible = "samsung,exynos5-sata-ahci";
+		compatible = "snps,dwc-ahci";
+		samsung,sata-freq = <66>;
 		reg = <0x122F0000 0x1ff>;
 		interrupts = <0 115 0>;
 		clocks = <&clock 277>, <&clock 143>;
 		clock-names = "sata", "sclk_sata";
+		phys = <&sata_phy>;
+		phy-names = "sata-phy";
+		status = "disabled";
 	};
 
-	sata-phy@12170000 {
-		compatible = "samsung,exynos5-sata-phy";
+	sata_phy: sata-phy@12170000 {
+		compatible = "samsung,exynos5250-sata-phy";
 		reg = <0x12170000 0x1ff>;
+		clocks = <&clock 287>;
+		clock-names = "sata_phyctrl";
+		#phy-cells = <0>;
+		samsung,syscon-phandle = <&pmu_system_controller>;
+		status = "disabled";
 	};
 
 	i2c_0: i2c@12C60000 {
@@ -360,7 +370,7 @@
 		status = "disabled";
 	};
 
-	i2c@121D0000 {
+	i2c_9: i2c@121D0000 {
                 compatible = "samsung,exynos5-sata-phy-i2c";
                 reg = <0x121D0000 0x100>;
                 #address-cells = <1>;
-- 
1.7.10.4


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: RESEND [PATCH V9 2/2] ARM: dts: exynos5250: Enable ahci sata and sata phy
  2014-03-04 11:10 RESEND [PATCH V9 2/2] ARM: dts: exynos5250: Enable ahci sata and sata phy Yuvaraj Kumar C D
@ 2014-03-04 13:32 ` Kishon Vijay Abraham I
  2014-03-14  8:25   ` Yuvaraj Kumar
  0 siblings, 1 reply; 4+ messages in thread
From: Kishon Vijay Abraham I @ 2014-03-04 13:32 UTC (permalink / raw)
  To: Yuvaraj Kumar C D, kgene.kim, linux-kernel, linux-arm-kernel,
	devicetree, linux-doc
  Cc: grant.likely, joshi, swarren, mark.rutland, galak, jg1.han,
	ks.giri, b.zolnierkie, t.figa, christoffer.dall,
	Yuvaraj Kumar C D



On Tuesday 04 March 2014 04:40 PM, Yuvaraj Kumar C D wrote:
> This patch adds dt entry for ahci sata controller and its
> corresponding phy controller.phy node has been added w.r.t
> new generic phy framework.
>
> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>

FWIW
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>   .../devicetree/bindings/ata/exynos-sata-phy.txt    |   14 --------
>   .../devicetree/bindings/ata/exynos-sata.txt        |   25 +++++++++-----
>   .../devicetree/bindings/phy/samsung-phy.txt        |   36 ++++++++++++++++++++
>   arch/arm/boot/dts/exynos5250-arndale.dts           |   21 ++++++++++++
>   arch/arm/boot/dts/exynos5250-smdk5250.dts          |   17 +++++----
>   arch/arm/boot/dts/exynos5250.dtsi                  |   18 +++++++---
>   6 files changed, 98 insertions(+), 33 deletions(-)
>   delete mode 100644 Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>
> diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
> deleted file mode 100644
> index 37824fa..0000000
> --- a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
> +++ /dev/null
> @@ -1,14 +0,0 @@
> -* Samsung SATA PHY Controller
> -
> -SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
> -Each SATA PHY controller should have its own node.
> -
> -Required properties:
> -- compatible        : compatible list, contains "samsung,exynos5-sata-phy"
> -- reg               : <registers mapping>
> -
> -Example:
> -        sata@ffe07000 {
> -                compatible = "samsung,exynos5-sata-phy";
> -                reg = <0xffe07000 0x1000>;
> -        };
> diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt b/Documentation/devicetree/bindings/ata/exynos-sata.txt
> index 0849f10..b2adb1f 100644
> --- a/Documentation/devicetree/bindings/ata/exynos-sata.txt
> +++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt
> @@ -4,14 +4,21 @@ SATA nodes are defined to describe on-chip Serial ATA controllers.
>   Each SATA controller should have its own node.
>
>   Required properties:
> -- compatible        : compatible list, contains "samsung,exynos5-sata"
> -- interrupts        : <interrupt mapping for SATA IRQ>
> -- reg               : <registers mapping>
> -- samsung,sata-freq : <frequency in MHz>
> +- compatible		: compatible list, contains "samsung,exynos5-sata"
> +- interrupts		: <interrupt mapping for SATA IRQ>
> +- reg			: <registers mapping>
> +- samsung,sata-freq	: <frequency in MHz>
> +- phys			: as mentioned in phy-bindings.txt
> +- phy-names		: as mentioned in phy-bindings.txt
>
>   Example:
> -        sata@ffe08000 {
> -                compatible = "samsung,exynos5-sata";
> -                reg = <0xffe08000 0x1000>;
> -                interrupts = <115>;
> -        };
> +	sata@122f0000 {
> +		compatible = "snps,dwc-ahci";
> +		samsung,sata-freq = <66>;
> +		reg = <0x122f0000 0x1ff>;
> +		interrupts = <0 115 0>;
> +		clocks = <&clock 277>, <&clock 143>;
> +		clock-names = "sata", "sclk_sata";
> +		phys = <&sata_phy>;
> +		phy-names = "sata-phy";
> +	};
> diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt
> index c0fccaa..a937f75 100644
> --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
> +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
> @@ -20,3 +20,39 @@ Required properties:
>   - compatible : should be "samsung,exynos5250-dp-video-phy";
>   - reg : offset and length of the Display Port PHY register set;
>   - #phy-cells : from the generic PHY bindings, must be 0;
> +
> +Samsung SATA PHY Controller
> +---------------------------
> +
> +SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
> +Each SATA PHY controller should have its own node.
> +
> +Required properties:
> +- compatible        : compatible list, contains "samsung,exynos5250-sata-phy"
> +- reg : offset and length of the SATA PHY register set;
> +- #phy-cells : from the generic phy bindings;
> +
> +Example:
> +	sata_phy: sata-phy@12170000 {
> +		compatible = "samsung,exynos5250-sata-phy";
> +		reg = <0x12170000 0x1ff>;
> +		clocks = <&clock 287>;
> +		clock-names = "sata_phyctrl";
> +		#phy-cells = <0>;
> +		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
> +		samsung,syscon-phandle = <&pmu_syscon>;
> +	};
> +
> +Device-Tree bindings for sataphy i2c client driver
> +--------------------------------------------------
> +
> +Required properties:
> +compatible: Should be "samsung,exynos-sataphy-i2c"
> +- reg: I2C address of the sataphy i2c device.
> +
> +Example:
> +
> +	sata_phy_i2c:sata-phy@38 {
> +		compatible = "samsung,exynos-sataphy-i2c";
> +		reg = <0x38>;
> +	};
> diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
> index 38b96a4..97eef40 100644
> --- a/arch/arm/boot/dts/exynos5250-arndale.dts
> +++ b/arch/arm/boot/dts/exynos5250-arndale.dts
> @@ -375,6 +375,27 @@
>   		};
>   	};
>
> +	i2c@121D0000 {
> +		status = "okay";
> +		samsung,i2c-sda-delay = <100>;
> +		samsung,i2c-max-bus-freq = <40000>;
> +		samsung,i2c-slave-addr = <0x38>;
> +
> +		sata_phy_i2c:sata-phy@38 {
> +			compatible = "samsung,exynos-sataphy-i2c";
> +			reg = <0x38>;
> +		};
> +	};
> +
> +	sata@122F0000 {
> +		status = "okay";
> +	};
> +
> +	sata-phy@12170000 {
> +		status = "okay";
> +		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
> +	};
> +
>   	mmc_0: mmc@12200000 {
>   		status = "okay";
>   		num-slots = <1>;
> diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
> index f76946e..81782c1b 100644
> --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
> +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
> @@ -242,16 +242,12 @@
>   		samsung,i2c-slave-addr = <0x38>;
>   		status = "okay";
>
> -		sata-phy {
> -			compatible = "samsung,sata-phy";
> +		sata_phy_i2c:sata-phy@38 {
> +			compatible = "samsung,exynos-sataphy-i2c";
>   			reg = <0x38>;
>   		};
>   	};
>
> -	sata@122F0000 {
> -		samsung,sata-freq = <66>;
> -	};
> -
>   	i2c@12C80000 {
>   		samsung,i2c-sda-delay = <100>;
>   		samsung,i2c-max-bus-freq = <66000>;
> @@ -274,6 +270,15 @@
>   		};
>   	};
>
> +	sata@122F0000 {
> +		status = "okay";
> +	};
> +
> +	sata-phy@12170000 {
> +		status = "okay";
> +		samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
> +	};
> +
>   	mmc@12200000 {
>   		status = "okay";
>   		num-slots = <1>;
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index 8f6300f..31f7cab 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -46,6 +46,7 @@
>   		i2c6 = &i2c_6;
>   		i2c7 = &i2c_7;
>   		i2c8 = &i2c_8;
> +		i2c9 = &i2c_9;
>   		pinctrl0 = &pinctrl_0;
>   		pinctrl1 = &pinctrl_1;
>   		pinctrl2 = &pinctrl_2;
> @@ -233,16 +234,25 @@
>   	};
>
>   	sata@122F0000 {
> -		compatible = "samsung,exynos5-sata-ahci";
> +		compatible = "snps,dwc-ahci";
> +		samsung,sata-freq = <66>;
>   		reg = <0x122F0000 0x1ff>;
>   		interrupts = <0 115 0>;
>   		clocks = <&clock 277>, <&clock 143>;
>   		clock-names = "sata", "sclk_sata";
> +		phys = <&sata_phy>;
> +		phy-names = "sata-phy";
> +		status = "disabled";
>   	};
>
> -	sata-phy@12170000 {
> -		compatible = "samsung,exynos5-sata-phy";
> +	sata_phy: sata-phy@12170000 {
> +		compatible = "samsung,exynos5250-sata-phy";
>   		reg = <0x12170000 0x1ff>;
> +		clocks = <&clock 287>;
> +		clock-names = "sata_phyctrl";
> +		#phy-cells = <0>;
> +		samsung,syscon-phandle = <&pmu_system_controller>;
> +		status = "disabled";
>   	};
>
>   	i2c_0: i2c@12C60000 {
> @@ -360,7 +370,7 @@
>   		status = "disabled";
>   	};
>
> -	i2c@121D0000 {
> +	i2c_9: i2c@121D0000 {
>                   compatible = "samsung,exynos5-sata-phy-i2c";
>                   reg = <0x121D0000 0x100>;
>                   #address-cells = <1>;
>

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: RESEND [PATCH V9 2/2] ARM: dts: exynos5250: Enable ahci sata and sata phy
  2014-03-04 13:32 ` Kishon Vijay Abraham I
@ 2014-03-14  8:25   ` Yuvaraj Kumar
  2014-03-14 17:17     ` Tomasz Figa
  0 siblings, 1 reply; 4+ messages in thread
From: Yuvaraj Kumar @ 2014-03-14  8:25 UTC (permalink / raw)
  To: Kishon Vijay Abraham I
  Cc: kgene.kim, linux-kernel, linux-arm-kernel, devicetree, linux-doc,
	Grant Likely, sunil joshi, Stephen Warren, Mark Rutland,
	Kumar Gala, Jingoo Han, ks.giri, Bartlomiej Zolnierkiewicz,
	Tomasz Figa, Christoffer Dall, Yuvaraj Kumar C D

kgene,
Please pick this patch.

On Tue, Mar 4, 2014 at 7:02 PM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
>
>
> On Tuesday 04 March 2014 04:40 PM, Yuvaraj Kumar C D wrote:
>>
>> This patch adds dt entry for ahci sata controller and its
>> corresponding phy controller.phy node has been added w.r.t
>> new generic phy framework.
>>
>> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
>
>
> FWIW
> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
>
>> ---
>>   .../devicetree/bindings/ata/exynos-sata-phy.txt    |   14 --------
>>   .../devicetree/bindings/ata/exynos-sata.txt        |   25 +++++++++-----
>>   .../devicetree/bindings/phy/samsung-phy.txt        |   36
>> ++++++++++++++++++++
>>   arch/arm/boot/dts/exynos5250-arndale.dts           |   21 ++++++++++++
>>   arch/arm/boot/dts/exynos5250-smdk5250.dts          |   17 +++++----
>>   arch/arm/boot/dts/exynos5250.dtsi                  |   18 +++++++---
>>   6 files changed, 98 insertions(+), 33 deletions(-)
>>   delete mode 100644
>> Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>>
>> diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>> b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>> deleted file mode 100644
>> index 37824fa..0000000
>> --- a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>> +++ /dev/null
>> @@ -1,14 +0,0 @@
>> -* Samsung SATA PHY Controller
>> -
>> -SATA PHY nodes are defined to describe on-chip SATA Physical layer
>> controllers.
>> -Each SATA PHY controller should have its own node.
>> -
>> -Required properties:
>> -- compatible        : compatible list, contains
>> "samsung,exynos5-sata-phy"
>> -- reg               : <registers mapping>
>> -
>> -Example:
>> -        sata@ffe07000 {
>> -                compatible = "samsung,exynos5-sata-phy";
>> -                reg = <0xffe07000 0x1000>;
>> -        };
>> diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt
>> b/Documentation/devicetree/bindings/ata/exynos-sata.txt
>> index 0849f10..b2adb1f 100644
>> --- a/Documentation/devicetree/bindings/ata/exynos-sata.txt
>> +++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt
>> @@ -4,14 +4,21 @@ SATA nodes are defined to describe on-chip Serial ATA
>> controllers.
>>   Each SATA controller should have its own node.
>>
>>   Required properties:
>> -- compatible        : compatible list, contains "samsung,exynos5-sata"
>> -- interrupts        : <interrupt mapping for SATA IRQ>
>> -- reg               : <registers mapping>
>> -- samsung,sata-freq : <frequency in MHz>
>> +- compatible           : compatible list, contains "samsung,exynos5-sata"
>> +- interrupts           : <interrupt mapping for SATA IRQ>
>> +- reg                  : <registers mapping>
>> +- samsung,sata-freq    : <frequency in MHz>
>> +- phys                 : as mentioned in phy-bindings.txt
>> +- phy-names            : as mentioned in phy-bindings.txt
>>
>>   Example:
>> -        sata@ffe08000 {
>> -                compatible = "samsung,exynos5-sata";
>> -                reg = <0xffe08000 0x1000>;
>> -                interrupts = <115>;
>> -        };
>> +       sata@122f0000 {
>> +               compatible = "snps,dwc-ahci";
>> +               samsung,sata-freq = <66>;
>> +               reg = <0x122f0000 0x1ff>;
>> +               interrupts = <0 115 0>;
>> +               clocks = <&clock 277>, <&clock 143>;
>> +               clock-names = "sata", "sclk_sata";
>> +               phys = <&sata_phy>;
>> +               phy-names = "sata-phy";
>> +       };
>> diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> b/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> index c0fccaa..a937f75 100644
>> --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
>> @@ -20,3 +20,39 @@ Required properties:
>>   - compatible : should be "samsung,exynos5250-dp-video-phy";
>>   - reg : offset and length of the Display Port PHY register set;
>>   - #phy-cells : from the generic PHY bindings, must be 0;
>> +
>> +Samsung SATA PHY Controller
>> +---------------------------
>> +
>> +SATA PHY nodes are defined to describe on-chip SATA Physical layer
>> controllers.
>> +Each SATA PHY controller should have its own node.
>> +
>> +Required properties:
>> +- compatible        : compatible list, contains
>> "samsung,exynos5250-sata-phy"
>> +- reg : offset and length of the SATA PHY register set;
>> +- #phy-cells : from the generic phy bindings;
>> +
>> +Example:
>> +       sata_phy: sata-phy@12170000 {
>> +               compatible = "samsung,exynos5250-sata-phy";
>> +               reg = <0x12170000 0x1ff>;
>> +               clocks = <&clock 287>;
>> +               clock-names = "sata_phyctrl";
>> +               #phy-cells = <0>;
>> +               samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
>> +               samsung,syscon-phandle = <&pmu_syscon>;
>> +       };
>> +
>> +Device-Tree bindings for sataphy i2c client driver
>> +--------------------------------------------------
>> +
>> +Required properties:
>> +compatible: Should be "samsung,exynos-sataphy-i2c"
>> +- reg: I2C address of the sataphy i2c device.
>> +
>> +Example:
>> +
>> +       sata_phy_i2c:sata-phy@38 {
>> +               compatible = "samsung,exynos-sataphy-i2c";
>> +               reg = <0x38>;
>> +       };
>> diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
>> b/arch/arm/boot/dts/exynos5250-arndale.dts
>> index 38b96a4..97eef40 100644
>> --- a/arch/arm/boot/dts/exynos5250-arndale.dts
>> +++ b/arch/arm/boot/dts/exynos5250-arndale.dts
>> @@ -375,6 +375,27 @@
>>                 };
>>         };
>>
>> +       i2c@121D0000 {
>> +               status = "okay";
>> +               samsung,i2c-sda-delay = <100>;
>> +               samsung,i2c-max-bus-freq = <40000>;
>> +               samsung,i2c-slave-addr = <0x38>;
>> +
>> +               sata_phy_i2c:sata-phy@38 {
>> +                       compatible = "samsung,exynos-sataphy-i2c";
>> +                       reg = <0x38>;
>> +               };
>> +       };
>> +
>> +       sata@122F0000 {
>> +               status = "okay";
>> +       };
>> +
>> +       sata-phy@12170000 {
>> +               status = "okay";
>> +               samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
>> +       };
>> +
>>         mmc_0: mmc@12200000 {
>>                 status = "okay";
>>                 num-slots = <1>;
>> diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> b/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> index f76946e..81782c1b 100644
>> --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
>> @@ -242,16 +242,12 @@
>>                 samsung,i2c-slave-addr = <0x38>;
>>                 status = "okay";
>>
>> -               sata-phy {
>> -                       compatible = "samsung,sata-phy";
>> +               sata_phy_i2c:sata-phy@38 {
>> +                       compatible = "samsung,exynos-sataphy-i2c";
>>                         reg = <0x38>;
>>                 };
>>         };
>>
>> -       sata@122F0000 {
>> -               samsung,sata-freq = <66>;
>> -       };
>> -
>>         i2c@12C80000 {
>>                 samsung,i2c-sda-delay = <100>;
>>                 samsung,i2c-max-bus-freq = <66000>;
>> @@ -274,6 +270,15 @@
>>                 };
>>         };
>>
>> +       sata@122F0000 {
>> +               status = "okay";
>> +       };
>> +
>> +       sata-phy@12170000 {
>> +               status = "okay";
>> +               samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
>> +       };
>> +
>>         mmc@12200000 {
>>                 status = "okay";
>>                 num-slots = <1>;
>> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
>> b/arch/arm/boot/dts/exynos5250.dtsi
>> index 8f6300f..31f7cab 100644
>> --- a/arch/arm/boot/dts/exynos5250.dtsi
>> +++ b/arch/arm/boot/dts/exynos5250.dtsi
>> @@ -46,6 +46,7 @@
>>                 i2c6 = &i2c_6;
>>                 i2c7 = &i2c_7;
>>                 i2c8 = &i2c_8;
>> +               i2c9 = &i2c_9;
>>                 pinctrl0 = &pinctrl_0;
>>                 pinctrl1 = &pinctrl_1;
>>                 pinctrl2 = &pinctrl_2;
>> @@ -233,16 +234,25 @@
>>         };
>>
>>         sata@122F0000 {
>> -               compatible = "samsung,exynos5-sata-ahci";
>> +               compatible = "snps,dwc-ahci";
>> +               samsung,sata-freq = <66>;
>>                 reg = <0x122F0000 0x1ff>;
>>                 interrupts = <0 115 0>;
>>                 clocks = <&clock 277>, <&clock 143>;
>>                 clock-names = "sata", "sclk_sata";
>> +               phys = <&sata_phy>;
>> +               phy-names = "sata-phy";
>> +               status = "disabled";
>>         };
>>
>> -       sata-phy@12170000 {
>> -               compatible = "samsung,exynos5-sata-phy";
>> +       sata_phy: sata-phy@12170000 {
>> +               compatible = "samsung,exynos5250-sata-phy";
>>                 reg = <0x12170000 0x1ff>;
>> +               clocks = <&clock 287>;
>> +               clock-names = "sata_phyctrl";
>> +               #phy-cells = <0>;
>> +               samsung,syscon-phandle = <&pmu_system_controller>;
>> +               status = "disabled";
>>         };
>>
>>         i2c_0: i2c@12C60000 {
>> @@ -360,7 +370,7 @@
>>                 status = "disabled";
>>         };
>>
>> -       i2c@121D0000 {
>> +       i2c_9: i2c@121D0000 {
>>                   compatible = "samsung,exynos5-sata-phy-i2c";
>>                   reg = <0x121D0000 0x100>;
>>                   #address-cells = <1>;
>>
>

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: RESEND [PATCH V9 2/2] ARM: dts: exynos5250: Enable ahci sata and sata phy
  2014-03-14  8:25   ` Yuvaraj Kumar
@ 2014-03-14 17:17     ` Tomasz Figa
  0 siblings, 0 replies; 4+ messages in thread
From: Tomasz Figa @ 2014-03-14 17:17 UTC (permalink / raw)
  To: Yuvaraj Kumar, Kishon Vijay Abraham I
  Cc: kgene.kim, linux-kernel, linux-arm-kernel, devicetree, linux-doc,
	Grant Likely, sunil joshi, Stephen Warren, Mark Rutland,
	Kumar Gala, Jingoo Han, ks.giri, Bartlomiej Zolnierkiewicz,
	Christoffer Dall, Yuvaraj Kumar C D

Hi Yuvaraj,

On 14.03.2014 09:25, Yuvaraj Kumar wrote:
> kgene,
> Please pick this patch.
>
> On Tue, Mar 4, 2014 at 7:02 PM, Kishon Vijay Abraham I <kishon@ti.com> wrote:
>>
>>
>> On Tuesday 04 March 2014 04:40 PM, Yuvaraj Kumar C D wrote:
>>>
>>> This patch adds dt entry for ahci sata controller and its
>>> corresponding phy controller.phy node has been added w.r.t
>>> new generic phy framework.
>>>
>>> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
>>
>>
>> FWIW
>> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
>>
>>> ---
>>>    .../devicetree/bindings/ata/exynos-sata-phy.txt    |   14 --------
>>>    .../devicetree/bindings/ata/exynos-sata.txt        |   25 +++++++++-----
>>>    .../devicetree/bindings/phy/samsung-phy.txt        |   36
>>> ++++++++++++++++++++
>>>    arch/arm/boot/dts/exynos5250-arndale.dts           |   21 ++++++++++++
>>>    arch/arm/boot/dts/exynos5250-smdk5250.dts          |   17 +++++----
>>>    arch/arm/boot/dts/exynos5250.dtsi                  |   18 +++++++---
>>>    6 files changed, 98 insertions(+), 33 deletions(-)
>>>    delete mode 100644
>>> Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>>> b/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>>> deleted file mode 100644
>>> index 37824fa..0000000
>>> --- a/Documentation/devicetree/bindings/ata/exynos-sata-phy.txt
>>> +++ /dev/null
>>> @@ -1,14 +0,0 @@
>>> -* Samsung SATA PHY Controller
>>> -
>>> -SATA PHY nodes are defined to describe on-chip SATA Physical layer
>>> controllers.
>>> -Each SATA PHY controller should have its own node.
>>> -
>>> -Required properties:
>>> -- compatible        : compatible list, contains
>>> "samsung,exynos5-sata-phy"
>>> -- reg               : <registers mapping>
>>> -
>>> -Example:
>>> -        sata@ffe07000 {
>>> -                compatible = "samsung,exynos5-sata-phy";
>>> -                reg = <0xffe07000 0x1000>;
>>> -        };
>>> diff --git a/Documentation/devicetree/bindings/ata/exynos-sata.txt
>>> b/Documentation/devicetree/bindings/ata/exynos-sata.txt
>>> index 0849f10..b2adb1f 100644
>>> --- a/Documentation/devicetree/bindings/ata/exynos-sata.txt
>>> +++ b/Documentation/devicetree/bindings/ata/exynos-sata.txt
>>> @@ -4,14 +4,21 @@ SATA nodes are defined to describe on-chip Serial ATA
>>> controllers.
>>>    Each SATA controller should have its own node.
>>>
>>>    Required properties:
>>> -- compatible        : compatible list, contains "samsung,exynos5-sata"
>>> -- interrupts        : <interrupt mapping for SATA IRQ>
>>> -- reg               : <registers mapping>
>>> -- samsung,sata-freq : <frequency in MHz>
>>> +- compatible           : compatible list, contains "samsung,exynos5-sata"
>>> +- interrupts           : <interrupt mapping for SATA IRQ>
>>> +- reg                  : <registers mapping>
>>> +- samsung,sata-freq    : <frequency in MHz>
>>> +- phys                 : as mentioned in phy-bindings.txt
>>> +- phy-names            : as mentioned in phy-bindings.txt
>>>
>>>    Example:
>>> -        sata@ffe08000 {
>>> -                compatible = "samsung,exynos5-sata";
>>> -                reg = <0xffe08000 0x1000>;
>>> -                interrupts = <115>;
>>> -        };
>>> +       sata@122f0000 {
>>> +               compatible = "snps,dwc-ahci";
>>> +               samsung,sata-freq = <66>;
>>> +               reg = <0x122f0000 0x1ff>;
>>> +               interrupts = <0 115 0>;
>>> +               clocks = <&clock 277>, <&clock 143>;
>>> +               clock-names = "sata", "sclk_sata";
>>> +               phys = <&sata_phy>;
>>> +               phy-names = "sata-phy";
>>> +       };
>>> diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt
>>> b/Documentation/devicetree/bindings/phy/samsung-phy.txt
>>> index c0fccaa..a937f75 100644
>>> --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
>>> +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
>>> @@ -20,3 +20,39 @@ Required properties:
>>>    - compatible : should be "samsung,exynos5250-dp-video-phy";
>>>    - reg : offset and length of the Display Port PHY register set;
>>>    - #phy-cells : from the generic PHY bindings, must be 0;
>>> +
>>> +Samsung SATA PHY Controller
>>> +---------------------------
>>> +
>>> +SATA PHY nodes are defined to describe on-chip SATA Physical layer
>>> controllers.
>>> +Each SATA PHY controller should have its own node.
>>> +
>>> +Required properties:
>>> +- compatible        : compatible list, contains
>>> "samsung,exynos5250-sata-phy"
>>> +- reg : offset and length of the SATA PHY register set;
>>> +- #phy-cells : from the generic phy bindings;
>>> +
>>> +Example:
>>> +       sata_phy: sata-phy@12170000 {
>>> +               compatible = "samsung,exynos5250-sata-phy";
>>> +               reg = <0x12170000 0x1ff>;
>>> +               clocks = <&clock 287>;
>>> +               clock-names = "sata_phyctrl";
>>> +               #phy-cells = <0>;
>>> +               samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
>>> +               samsung,syscon-phandle = <&pmu_syscon>;

The example lists properties that are not documented by the text above 
(clocks, clock-names, samsung,exynos-sataphy-i2c-phandle, 
samsung,syscon-phandle). Why is so?

>>> +       };
>>> +
>>> +Device-Tree bindings for sataphy i2c client driver
>>> +--------------------------------------------------
>>> +
>>> +Required properties:
>>> +compatible: Should be "samsung,exynos-sataphy-i2c"
>>> +- reg: I2C address of the sataphy i2c device.
>>> +
>>> +Example:
>>> +
>>> +       sata_phy_i2c:sata-phy@38 {
>>> +               compatible = "samsung,exynos-sataphy-i2c";
>>> +               reg = <0x38>;
>>> +       };
>>> diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
>>> b/arch/arm/boot/dts/exynos5250-arndale.dts
>>> index 38b96a4..97eef40 100644
>>> --- a/arch/arm/boot/dts/exynos5250-arndale.dts
>>> +++ b/arch/arm/boot/dts/exynos5250-arndale.dts
>>> @@ -375,6 +375,27 @@
>>>                  };
>>>          };
>>>
>>> +       i2c@121D0000 {
>>> +               status = "okay";
>>> +               samsung,i2c-sda-delay = <100>;
>>> +               samsung,i2c-max-bus-freq = <40000>;
>>> +               samsung,i2c-slave-addr = <0x38>;
>>> +
>>> +               sata_phy_i2c:sata-phy@38 {
>>> +                       compatible = "samsung,exynos-sataphy-i2c";
>>> +                       reg = <0x38>;
>>> +               };

This node should be present in SoC-level dtsi file, as the address of 
the PHY does not depend on particular board.

>>> +       };
>>> +
>>> +       sata@122F0000 {
>>> +               status = "okay";
>>> +       };
>>> +
>>> +       sata-phy@12170000 {
>>> +               status = "okay";
>>> +               samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;

Same here. The value of samsung,exynos-sataphy-i2c-phandle property is 
not board-specific and should be in higher level dtsi file.

>>> +       };
>>> +
>>>          mmc_0: mmc@12200000 {
>>>                  status = "okay";
>>>                  num-slots = <1>;
>>> diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
>>> b/arch/arm/boot/dts/exynos5250-smdk5250.dts
>>> index f76946e..81782c1b 100644
>>> --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
>>> +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
>>> @@ -242,16 +242,12 @@
>>>                  samsung,i2c-slave-addr = <0x38>;
>>>                  status = "okay";
>>>
>>> -               sata-phy {
>>> -                       compatible = "samsung,sata-phy";
>>> +               sata_phy_i2c:sata-phy@38 {
>>> +                       compatible = "samsung,exynos-sataphy-i2c";
>>>                          reg = <0x38>;
>>>                  };

Ditto.

>>>          };
>>>
>>> -       sata@122F0000 {
>>> -               samsung,sata-freq = <66>;
>>> -       };
>>> -
>>>          i2c@12C80000 {
>>>                  samsung,i2c-sda-delay = <100>;
>>>                  samsung,i2c-max-bus-freq = <66000>;
>>> @@ -274,6 +270,15 @@
>>>                  };
>>>          };
>>>
>>> +       sata@122F0000 {
>>> +               status = "okay";
>>> +       };
>>> +
>>> +       sata-phy@12170000 {
>>> +               status = "okay";
>>> +               samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
>>> +       };

Ditto.

Best regards,
Tomasz

^ permalink raw reply	[flat|nested] 4+ messages in thread

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2014-03-04 11:10 RESEND [PATCH V9 2/2] ARM: dts: exynos5250: Enable ahci sata and sata phy Yuvaraj Kumar C D
2014-03-04 13:32 ` Kishon Vijay Abraham I
2014-03-14  8:25   ` Yuvaraj Kumar
2014-03-14 17:17     ` Tomasz Figa

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