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* [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors
@ 2014-04-23  8:53 Alexandre Belloni
  2014-04-23  8:53 ` [PATCH 2/3] ARM: at91/dt: sam9261: Add ssc2, SSC clocks and pcks Alexandre Belloni
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Alexandre Belloni @ 2014-04-23  8:53 UTC (permalink / raw)
  To: Nicolas Ferre
  Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
	Boris Brezillon, Alexandre Belloni

Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing.
Also, the at91sam9261 doesn't really have a by 3 divisor.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
 arch/arm/boot/dts/at91sam9261.dtsi | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 561addceb81e..3ff239b26d72 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -564,7 +564,8 @@
 					reg = <0>;
 					atmel,clk-input-range = <1000000 32000000>;
 					#atmel,pll-clk-output-range-cells = <4>;
-					atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+								<190000000 240000000 2 1>;
 				};
 
 				pllb: pllbck {
@@ -575,7 +576,8 @@
 					reg = <1>;
 					atmel,clk-input-range = <1000000 32000000>;
 					#atmel,pll-clk-output-range-cells = <4>;
-					atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
+								<190000000 240000000 2 1>;
 				};
 
 				mck: masterck {
@@ -584,13 +586,13 @@
 					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
 					atmel,clk-output-range = <0 94000000>;
-					atmel,clk-divisors = <1 2 4 3>;
+					atmel,clk-divisors = <1 2 4 0>;
 				};
 
 				usb: usbck {
 					compatible = "atmel,at91rm9200-clk-usb";
 					#clock-cells = <0>;
-					atmel,clk-divisors = <1 2 4 3>;
+					atmel,clk-divisors = <1 2 4 0>;
 					clocks = <&pllb>;
 				};
 
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/3] ARM: at91/dt: sam9261: Add ssc2, SSC clocks and pcks
  2014-04-23  8:53 [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors Alexandre Belloni
@ 2014-04-23  8:53 ` Alexandre Belloni
  2014-04-23  8:53 ` [PATCH 3/3] ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors Alexandre Belloni
  2014-05-12 13:04 ` [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors Nicolas Ferre
  2 siblings, 0 replies; 5+ messages in thread
From: Alexandre Belloni @ 2014-04-23  8:53 UTC (permalink / raw)
  To: Nicolas Ferre
  Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
	Boris Brezillon, Alexandre Belloni

Add ssc2 support, ssc2 pinctrl and clocks for the three SSCs.
Also add support for the programmable clocks.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
 arch/arm/boot/dts/at91sam9261.dtsi | 103 +++++++++++++++++++++++++++++++++++++
 1 file changed, 103 insertions(+)

diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index 3ff239b26d72..698063addca9 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -29,6 +29,7 @@
 		i2c0 = &i2c0;
 		ssc0 = &ssc0;
 		ssc1 = &ssc1;
+		ssc2 = &ssc2;
 	};
 
 	cpus {
@@ -194,6 +195,8 @@
 				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
+				clocks = <&ssc0_clk>;
+				clock-names = "pclk";
 				status = "disabled";
 			};
 
@@ -203,6 +206,19 @@
 				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 				pinctrl-names = "default";
 				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
+				clocks = <&ssc1_clk>;
+				clock-names = "pclk";
+				status = "disabled";
+			};
+
+			ssc2: ssc@fffc4000 {
+				compatible = "atmel,at91rm9200-ssc";
+				reg = <0xfffc4000 0x4000>;
+				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
+				clocks = <&ssc2_clk>;
+				clock-names = "pclk";
 				status = "disabled";
 			};
 
@@ -397,6 +413,22 @@
 					};
 				};
 
+				ssc2 {
+					pinctrl_ssc2_tx: ssc2_tx-0 {
+						atmel,pins =
+							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+							<AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+							<AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+
+					pinctrl_ssc2_rx: ssc2_rx-0 {
+						atmel,pins =
+							<AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+							<AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
+							<AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
+					};
+				};
+
 				spi0 {
 					pinctrl_spi0: spi0-0 {
 						atmel,pins =
@@ -596,6 +628,38 @@
 					clocks = <&pllb>;
 				};
 
+				prog: progck {
+					compatible = "atmel,at91rm9200-clk-programmable";
+					#address-cells = <1>;
+					#size-cells = <0>;
+					interrupt-parent = <&pmc>;
+					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
+
+					prog0: prog0 {
+						#clock-cells = <0>;
+						reg = <0>;
+						interrupts = <AT91_PMC_PCKRDY(0)>;
+					};
+
+					prog1: prog1 {
+						#clock-cells = <0>;
+						reg = <1>;
+						interrupts = <AT91_PMC_PCKRDY(1)>;
+					};
+
+					prog2: prog2 {
+						#clock-cells = <0>;
+						reg = <2>;
+						interrupts = <AT91_PMC_PCKRDY(2)>;
+					};
+
+					prog3: prog3 {
+						#clock-cells = <0>;
+						reg = <3>;
+						interrupts = <AT91_PMC_PCKRDY(3)>;
+					};
+				};
+
 				systemck {
 					compatible = "atmel,at91rm9200-clk-system";
 					#address-cells = <1>;
@@ -613,6 +677,30 @@
 						clocks = <&usb>;
 					};
 
+					pck0: pck0 {
+						#clock-cells = <0>;
+						reg = <8>;
+						clocks = <&prog0>;
+					};
+
+					pck1: pck1 {
+						#clock-cells = <0>;
+						reg = <9>;
+						clocks = <&prog1>;
+					};
+
+					pck2: pck2 {
+						#clock-cells = <0>;
+						reg = <10>;
+						clocks = <&prog2>;
+					};
+
+					pck3: pck3 {
+						#clock-cells = <0>;
+						reg = <11>;
+						clocks = <&prog3>;
+					};
+
 					hclk0: hclk0 {
 						#clock-cells = <0>;
 						reg = <16>;
@@ -687,6 +775,21 @@
 						reg = <13>;
 					};
 
+					ssc0_clk: ssc0_clk {
+						#clock-cells = <0>;
+						reg = <14>;
+					};
+
+					ssc1_clk: ssc1_clk {
+						#clock-cells = <0>;
+						reg = <15>;
+					};
+
+					ssc2_clk: ssc2_clk {
+						#clock-cells = <0>;
+						reg = <16>;
+					};
+
 					tc0_clk: tc0_clk {
 						#clock-cells = <0>;
 						reg = <17>;
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 3/3] ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors
  2014-04-23  8:53 [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors Alexandre Belloni
  2014-04-23  8:53 ` [PATCH 2/3] ARM: at91/dt: sam9261: Add ssc2, SSC clocks and pcks Alexandre Belloni
@ 2014-04-23  8:53 ` Alexandre Belloni
  2014-04-23  9:45   ` Boris BREZILLON
  2014-05-12 13:04 ` [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors Nicolas Ferre
  2 siblings, 1 reply; 5+ messages in thread
From: Alexandre Belloni @ 2014-04-23  8:53 UTC (permalink / raw)
  To: Nicolas Ferre
  Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
	Boris Brezillon, Alexandre Belloni

Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing.
Also, the at91sam9rl doesn't really have a by 3 divisor.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
 arch/arm/boot/dts/at91sam9rl.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index a19a7c26a7fc..1109e7fbf9bd 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -574,8 +574,9 @@
 					clocks = <&main>;
 					reg = <0>;
 					atmel,clk-input-range = <1000000 32000000>;
-					#atmel,pll-clk-output-range-cells = <4>;
-					atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
+					#atmel,pll-clk-output-range-cells = <3>;
+					atmel,pll-clk-output-ranges = <80000000 200000000 0>,
+								<190000000 240000000 2>;
 				};
 
 				utmi: utmick {
@@ -592,7 +593,7 @@
 					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 					clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
 					atmel,clk-output-range = <0 94000000>;
-					atmel,clk-divisors = <1 2 4 3>;
+					atmel,clk-divisors = <1 2 4 0>;
 				};
 
 				prog: progck {
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 3/3] ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors
  2014-04-23  8:53 ` [PATCH 3/3] ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors Alexandre Belloni
@ 2014-04-23  9:45   ` Boris BREZILLON
  0 siblings, 0 replies; 5+ messages in thread
From: Boris BREZILLON @ 2014-04-23  9:45 UTC (permalink / raw)
  To: Alexandre Belloni, Nicolas Ferre
  Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel


On 23/04/2014 10:53, Alexandre Belloni wrote:
> Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing.
> Also, the at91sam9rl doesn't really have a by 3 divisor.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
> ---
>  arch/arm/boot/dts/at91sam9rl.dtsi | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
> index a19a7c26a7fc..1109e7fbf9bd 100644
> --- a/arch/arm/boot/dts/at91sam9rl.dtsi
> +++ b/arch/arm/boot/dts/at91sam9rl.dtsi
> @@ -574,8 +574,9 @@
>  					clocks = <&main>;
>  					reg = <0>;
>  					atmel,clk-input-range = <1000000 32000000>;
> -					#atmel,pll-clk-output-range-cells = <4>;
> -					atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
> +					#atmel,pll-clk-output-range-cells = <3>;
> +					atmel,pll-clk-output-ranges = <80000000 200000000 0>,
> +								<190000000 240000000 2>;
>  				};
>  
>  				utmi: utmick {
> @@ -592,7 +593,7 @@
>  					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
>  					clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
>  					atmel,clk-output-range = <0 94000000>;
> -					atmel,clk-divisors = <1 2 4 3>;
> +					atmel,clk-divisors = <1 2 4 0>;
>  				};
>  
>  				prog: progck {

-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors
  2014-04-23  8:53 [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors Alexandre Belloni
  2014-04-23  8:53 ` [PATCH 2/3] ARM: at91/dt: sam9261: Add ssc2, SSC clocks and pcks Alexandre Belloni
  2014-04-23  8:53 ` [PATCH 3/3] ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors Alexandre Belloni
@ 2014-05-12 13:04 ` Nicolas Ferre
  2 siblings, 0 replies; 5+ messages in thread
From: Nicolas Ferre @ 2014-05-12 13:04 UTC (permalink / raw)
  To: Alexandre Belloni, Boris Brezillon
  Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel

Hi,

To the whole series:

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

and pushed on at91-3.16-dt2

Thanks, bye,

On 23/04/2014 10:53, Alexandre Belloni :
> Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing.
> Also, the at91sam9261 doesn't really have a by 3 divisor.
> 
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> ---
>  arch/arm/boot/dts/at91sam9261.dtsi | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
> index 561addceb81e..3ff239b26d72 100644
> --- a/arch/arm/boot/dts/at91sam9261.dtsi
> +++ b/arch/arm/boot/dts/at91sam9261.dtsi
> @@ -564,7 +564,8 @@
>  					reg = <0>;
>  					atmel,clk-input-range = <1000000 32000000>;
>  					#atmel,pll-clk-output-range-cells = <4>;
> -					atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
> +					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
> +								<190000000 240000000 2 1>;
>  				};
>  
>  				pllb: pllbck {
> @@ -575,7 +576,8 @@
>  					reg = <1>;
>  					atmel,clk-input-range = <1000000 32000000>;
>  					#atmel,pll-clk-output-range-cells = <4>;
> -					atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
> +					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
> +								<190000000 240000000 2 1>;
>  				};
>  
>  				mck: masterck {
> @@ -584,13 +586,13 @@
>  					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
>  					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
>  					atmel,clk-output-range = <0 94000000>;
> -					atmel,clk-divisors = <1 2 4 3>;
> +					atmel,clk-divisors = <1 2 4 0>;
>  				};
>  
>  				usb: usbck {
>  					compatible = "atmel,at91rm9200-clk-usb";
>  					#clock-cells = <0>;
> -					atmel,clk-divisors = <1 2 4 3>;
> +					atmel,clk-divisors = <1 2 4 0>;
>  					clocks = <&pllb>;
>  				};
>  
> 


-- 
Nicolas Ferre

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2014-05-12 13:04 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-04-23  8:53 [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors Alexandre Belloni
2014-04-23  8:53 ` [PATCH 2/3] ARM: at91/dt: sam9261: Add ssc2, SSC clocks and pcks Alexandre Belloni
2014-04-23  8:53 ` [PATCH 3/3] ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors Alexandre Belloni
2014-04-23  9:45   ` Boris BREZILLON
2014-05-12 13:04 ` [PATCH 1/3] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors Nicolas Ferre

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