* [PATCH 1/3] arm64: adjust el0_sync so that a function can be called
2014-04-27 19:44 [PATCH 0/3] context tracker support for arm64 Larry Bassel
@ 2014-04-27 19:44 ` Larry Bassel
2014-04-29 9:42 ` Catalin Marinas
2014-04-27 19:44 ` [PATCH 2/3] arm64: add support for context tracking Larry Bassel
2014-04-27 19:44 ` [PATCH 3/3] arm64: enable " Larry Bassel
2 siblings, 1 reply; 7+ messages in thread
From: Larry Bassel @ 2014-04-27 19:44 UTC (permalink / raw)
To: catalin.marinas, will.deacon
Cc: linux-kernel, linux-arm-kernel, linaro-kernel, khilman, Larry Bassel
To implement the context tracker properly on arm64,
a function call needs to be made after debugging and
interrupts are turned on, but before the lr is changed
to point to ret_from_exception(). If the function call
is made after the lr is changed the function will not
return to the correct place. For similar reasons, defer
the setting of x0 so that it doesn't need to be saved
around the function call.
Signed-off-by: Larry Bassel <larry.bassel@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
---
arch/arm64/kernel/entry.S | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 39ac630..eda7755 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -349,11 +349,11 @@ el0_sync:
lsr x24, x25, #ESR_EL1_EC_SHIFT // exception class
cmp x24, #ESR_EL1_EC_SVC64 // SVC in 64-bit state
b.eq el0_svc
- adr lr, ret_from_exception
cmp x24, #ESR_EL1_EC_DABT_EL0 // data abort in EL0
b.eq el0_da
cmp x24, #ESR_EL1_EC_IABT_EL0 // instruction abort in EL0
b.eq el0_ia
+ adr lr, ret_from_exception
cmp x24, #ESR_EL1_EC_FP_ASIMD // FP/ASIMD access
b.eq el0_fpsimd_acc
cmp x24, #ESR_EL1_EC_FP_EXC64 // FP/ASIMD exception
@@ -378,11 +378,11 @@ el0_sync_compat:
lsr x24, x25, #ESR_EL1_EC_SHIFT // exception class
cmp x24, #ESR_EL1_EC_SVC32 // SVC in 32-bit state
b.eq el0_svc_compat
- adr lr, ret_from_exception
cmp x24, #ESR_EL1_EC_DABT_EL0 // data abort in EL0
b.eq el0_da
cmp x24, #ESR_EL1_EC_IABT_EL0 // instruction abort in EL0
b.eq el0_ia
+ adr lr, ret_from_exception
cmp x24, #ESR_EL1_EC_FP_ASIMD // FP/ASIMD access
b.eq el0_fpsimd_acc
cmp x24, #ESR_EL1_EC_FP_EXC32 // FP/ASIMD exception
@@ -421,28 +421,30 @@ el0_da:
/*
* Data abort handling
*/
- mrs x0, far_el1
- bic x0, x0, #(0xff << 56)
disable_step x1
isb
enable_dbg
// enable interrupts before calling the main handler
enable_irq
+ mrs x0, far_el1
+ bic x0, x0, #(0xff << 56)
mov x1, x25
mov x2, sp
+ adr lr, ret_from_exception
b do_mem_abort
el0_ia:
/*
* Instruction abort handling
*/
- mrs x0, far_el1
disable_step x1
isb
enable_dbg
// enable interrupts before calling the main handler
enable_irq
+ mrs x0, far_el1
orr x1, x25, #1 << 24 // use reserved ISS bit for instruction aborts
mov x2, sp
+ adr lr, ret_from_exception
b do_mem_abort
el0_fpsimd_acc:
/*
--
1.8.3.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] arm64: adjust el0_sync so that a function can be called
2014-04-27 19:44 ` [PATCH 1/3] arm64: adjust el0_sync so that a function can be called Larry Bassel
@ 2014-04-29 9:42 ` Catalin Marinas
2014-05-05 22:44 ` Kevin Hilman
0 siblings, 1 reply; 7+ messages in thread
From: Catalin Marinas @ 2014-04-29 9:42 UTC (permalink / raw)
To: Larry Bassel
Cc: Will Deacon, linux-kernel, linux-arm-kernel, linaro-kernel, khilman
On Sun, Apr 27, 2014 at 08:44:12PM +0100, Larry Bassel wrote:
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index 39ac630..eda7755 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
[...]
> @@ -421,28 +421,30 @@ el0_da:
> /*
> * Data abort handling
> */
> - mrs x0, far_el1
> - bic x0, x0, #(0xff << 56)
> disable_step x1
> isb
> enable_dbg
> // enable interrupts before calling the main handler
> enable_irq
> + mrs x0, far_el1
> + bic x0, x0, #(0xff << 56)
> mov x1, x25
> mov x2, sp
> + adr lr, ret_from_exception
> b do_mem_abort
Reading the far_el1 after enable_dbg and enable_irq is racy, we can no
longer guarantee its value in the original data abort context.
> el0_ia:
> /*
> * Instruction abort handling
> */
> - mrs x0, far_el1
> disable_step x1
> isb
> enable_dbg
> // enable interrupts before calling the main handler
> enable_irq
> + mrs x0, far_el1
> orr x1, x25, #1 << 24 // use reserved ISS bit for instruction aborts
> mov x2, sp
> + adr lr, ret_from_exception
> b do_mem_abort
> el0_fpsimd_acc:
Same here.
--
Catalin
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] arm64: adjust el0_sync so that a function can be called
2014-04-29 9:42 ` Catalin Marinas
@ 2014-05-05 22:44 ` Kevin Hilman
0 siblings, 0 replies; 7+ messages in thread
From: Kevin Hilman @ 2014-05-05 22:44 UTC (permalink / raw)
To: Catalin Marinas
Cc: Will Deacon, Mark Rutland, linux-kernel, linux-arm-kernel,
linaro-kernel, khilman
[+ Mark R. since we looked at this together a little at ELC]
Catalin Marinas <catalin.marinas@arm.com> writes:
> On Sun, Apr 27, 2014 at 08:44:12PM +0100, Larry Bassel wrote:
>> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
>> index 39ac630..eda7755 100644
>> --- a/arch/arm64/kernel/entry.S
>> +++ b/arch/arm64/kernel/entry.S
> [...]
>> @@ -421,28 +421,30 @@ el0_da:
>> /*
>> * Data abort handling
>> */
>> - mrs x0, far_el1
>> - bic x0, x0, #(0xff << 56)
>> disable_step x1
>> isb
>> enable_dbg
>> // enable interrupts before calling the main handler
>> enable_irq
>> + mrs x0, far_el1
>> + bic x0, x0, #(0xff << 56)
>> mov x1, x25
>> mov x2, sp
>> b do_mem_abort
>
> Reading the far_el1 after enable_dbg and enable_irq is racy, we can no
> longer guarantee its value in the original data abort context.
Catalin, can you confirm x26 would be a safe place to stash far_el1 and
then restore it after ct_user_exit. Something like this (which seems to
work for me):
el0_da:
/* * Data abort handling */
mrs x26, far_el1
disable_step x1
isb
enable_dbg
// enable interrupts before calling the main handler
enable_irq
ct_user_exit
mov x0, x26
bic x0, x0, #(0xff << 56)
mov x1, x25
mov x2, sp
adr lr, ret_from_exception
b do_mem_abort
Kevin
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/3] arm64: add support for context tracking
2014-04-27 19:44 [PATCH 0/3] context tracker support for arm64 Larry Bassel
2014-04-27 19:44 ` [PATCH 1/3] arm64: adjust el0_sync so that a function can be called Larry Bassel
@ 2014-04-27 19:44 ` Larry Bassel
2014-04-27 19:44 ` [PATCH 3/3] arm64: enable " Larry Bassel
2 siblings, 0 replies; 7+ messages in thread
From: Larry Bassel @ 2014-04-27 19:44 UTC (permalink / raw)
To: catalin.marinas, will.deacon
Cc: linux-kernel, linux-arm-kernel, linaro-kernel, khilman, Larry Bassel
From: Kevin Hilman <khilman@linaro.org>
Add the macros and defines needed to implement
context tracking on arm64.
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Larry Bassel <larry.bassel@linaro.org>
---
arch/arm64/Kconfig | 1 +
arch/arm64/include/asm/thread_info.h | 1 +
arch/arm64/kernel/entry.S | 16 ++++++++++++++++
3 files changed, 18 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index e6e4d37..152d92b 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -55,6 +55,7 @@ config ARM64
select RTC_LIB
select SPARSE_IRQ
select SYSCTL_EXCEPTION_TRACE
+ select HAVE_CONTEXT_TRACKING
help
ARM 64-bit (AArch64) Linux support.
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index 720e70b..301ea6a 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -108,6 +108,7 @@ static inline struct thread_info *current_thread_info(void)
#define TIF_SINGLESTEP 21
#define TIF_32BIT 22 /* 32bit process */
#define TIF_SWITCH_MM 23 /* deferred switch_mm */
+#define TIF_NOHZ 24
#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index eda7755..76b09d8 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -30,6 +30,22 @@
#include <asm/unistd32.h>
/*
+ * Context tracking subsystem. Used to instrument transitions
+ * between user and kernel mode.
+ */
+ .macro ct_user_exit
+#ifdef CONFIG_CONTEXT_TRACKING
+ bl context_tracking_user_exit
+#endif
+ .endm
+
+ .macro ct_user_enter
+#ifdef CONFIG_CONTEXT_TRACKING
+ bl context_tracking_user_enter
+#endif
+ .endm
+
+/*
* Bad Abort numbers
*-----------------
*/
--
1.8.3.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 3/3] arm64: enable context tracking
2014-04-27 19:44 [PATCH 0/3] context tracker support for arm64 Larry Bassel
2014-04-27 19:44 ` [PATCH 1/3] arm64: adjust el0_sync so that a function can be called Larry Bassel
2014-04-27 19:44 ` [PATCH 2/3] arm64: add support for context tracking Larry Bassel
@ 2014-04-27 19:44 ` Larry Bassel
2014-04-29 9:43 ` Catalin Marinas
2 siblings, 1 reply; 7+ messages in thread
From: Larry Bassel @ 2014-04-27 19:44 UTC (permalink / raw)
To: catalin.marinas, will.deacon
Cc: linux-kernel, linux-arm-kernel, linaro-kernel, khilman, Larry Bassel
Make calls to ct_user_enter when the kernel is exited
and ct_user_exit when the kernel is entered (in el0_da,
el0_ia, el0_svc, el0_irq).
These macros expand to function calls which will only work
properly if el0_sync and related code has been rearranged
(in a previous patch of this series).
The calls to ct_user_exit are made after hw debugging has been
enabled (enable_dbg).
The call to ct_user_enter is made at the end of the kernel_exit
macro.
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Larry Bassel <larry.bassel@linaro.org>
---
arch/arm64/kernel/entry.S | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 76b09d8..e949435 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -104,6 +104,7 @@
.macro kernel_exit, el, ret = 0
ldp x21, x22, [sp, #S_PC] // load ELR, SPSR
.if \el == 0
+ ct_user_enter
ldr x23, [sp, #S_SP] // load return stack pointer
.endif
.if \ret
@@ -442,6 +443,7 @@ el0_da:
enable_dbg
// enable interrupts before calling the main handler
enable_irq
+ ct_user_exit
mrs x0, far_el1
bic x0, x0, #(0xff << 56)
mov x1, x25
@@ -457,6 +459,7 @@ el0_ia:
enable_dbg
// enable interrupts before calling the main handler
enable_irq
+ ct_user_exit
mrs x0, far_el1
orr x1, x25, #1 << 24 // use reserved ISS bit for instruction aborts
mov x2, sp
@@ -525,6 +528,7 @@ el0_irq_naked:
bl trace_hardirqs_off
#endif
+ ct_user_exit
irq_handler
get_thread_info tsk
@@ -647,6 +651,7 @@ el0_svc_naked: // compat entry point
isb
enable_dbg
enable_irq
+ ct_user_exit
get_thread_info tsk
ldr x16, [tsk, #TI_FLAGS] // check for syscall tracing
--
1.8.3.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 3/3] arm64: enable context tracking
2014-04-27 19:44 ` [PATCH 3/3] arm64: enable " Larry Bassel
@ 2014-04-29 9:43 ` Catalin Marinas
0 siblings, 0 replies; 7+ messages in thread
From: Catalin Marinas @ 2014-04-29 9:43 UTC (permalink / raw)
To: Larry Bassel
Cc: Will Deacon, linux-kernel, linux-arm-kernel, linaro-kernel, khilman
On Sun, Apr 27, 2014 at 08:44:14PM +0100, Larry Bassel wrote:
> Make calls to ct_user_enter when the kernel is exited
> and ct_user_exit when the kernel is entered (in el0_da,
> el0_ia, el0_svc, el0_irq).
>
> These macros expand to function calls which will only work
> properly if el0_sync and related code has been rearranged
> (in a previous patch of this series).
>
> The calls to ct_user_exit are made after hw debugging has been
> enabled (enable_dbg).
>
> The call to ct_user_enter is made at the end of the kernel_exit
> macro.
>
> Signed-off-by: Kevin Hilman <khilman@linaro.org>
> Signed-off-by: Larry Bassel <larry.bassel@linaro.org>
You could actually merge this patch with 2/3.
--
Catalin
^ permalink raw reply [flat|nested] 7+ messages in thread