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From: Nishanth Menon <nm@ti.com>
To: Tony Lindgren <tony@atomide.com>,
	Santosh Shilimkar <santosh.shilimkar@ti.com>,
	Sricharan R <r.sricharan@ti.com>, Sekhar Nori <nsekhar@ti.com>,
	Rajendra Nayak <rnayak@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-omap@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<nm@ti.com>
Subject: [PATCH V3 12/20] bus: omap_l3_noc: fix masterid detection
Date: Mon, 28 Apr 2014 10:14:52 -0500	[thread overview]
Message-ID: <1398698101-25513-13-git-send-email-nm@ti.com> (raw)
In-Reply-To: <1398698101-25513-1-git-send-email-nm@ti.com>

As per Documentation (OMAP4+), then masterid is infact encoded as
follows:
"L3_TARG_STDERRLOG_MSTADDR[7:0] STDERRLOG_MSTADDR stores the NTTP
master address. The master address is the concatenation of Prefix &
Initiator ConnID. It is defined on 8 bits. The 6 MSBs are used to
distinguish the different initiators."

So, when we matchup currently with the master ID list, we never get a
proper match other than when MPU is the master (thanks to 0).

Now, on other platforms such as AM437x, this tends to be bits[5:0].

Fix this by using the relevant 6MSBits to identify the master ID for
standard and custom errors.

Reported-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Darren Etheridge <detheridge@ti.com>
---

V3: made master id information into a structure field thanks to AM437x
information recently recieved.

 drivers/bus/omap_l3_noc.c |    6 +++++-
 drivers/bus/omap_l3_noc.h |    4 ++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 9524452..8a1926d 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -127,7 +127,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 					  L3_TARG_STDERRLOG_MSTADDR;
 
 			std_err_main = readl_relaxed(l3_targ_stderr);
-			masterid = readl_relaxed(l3_targ_mstaddr);
+
+			/* STDERRLOG_MSTADDR Stores the NTTP master address. */
+			masterid = (readl_relaxed(l3_targ_mstaddr) &
+				    l3->mst_addr_mask) >>
+					__ffs(l3->mst_addr_mask);
 
 			switch (std_err_main & CUSTOM_ERROR) {
 			case STANDARD_ERROR:
diff --git a/drivers/bus/omap_l3_noc.h b/drivers/bus/omap_l3_noc.h
index 64869fe..ba86924 100644
--- a/drivers/bus/omap_l3_noc.h
+++ b/drivers/bus/omap_l3_noc.h
@@ -84,6 +84,7 @@ struct l3_flagmux_data {
  * @l3_masters:	array pointing to master data containing name and register
  *		offset for the master.
  * @num_master: number of masters
+ * @mst_addr_mask: Mask representing MSTADDR information of NTTP packet
  * @debug_irq:	irq number of the debug interrupt (populated runtime)
  * @app_irq:	irq number of the application interrupt (populated runtime)
  */
@@ -96,6 +97,7 @@ struct omap_l3 {
 
 	struct l3_masters_data *l3_masters;
 	int num_masters;
+	u32 mst_addr_mask;
 
 	int debug_irq;
 	int app_irq;
@@ -200,6 +202,8 @@ static const struct omap_l3 omap_l3_data = {
 	.num_modules = ARRAY_SIZE(omap_l3_flagmux),
 	.l3_masters = omap_l3_masters,
 	.num_masters = ARRAY_SIZE(omap_l3_masters),
+	/* The 6 MSBs of register field used to distinguish initiator */
+	.mst_addr_mask = 0xFC,
 };
 
 #endif	/* __OMAP_L3_NOC_H */
-- 
1.7.9.5


  parent reply	other threads:[~2014-04-28 15:36 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-14 16:25 [PATCH 00/15] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Nishanth Menon
2014-04-14 16:25 ` [PATCH 01/15] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-14 16:25 ` [PATCH 02/15] bus: omap_l3_noc: switched over to relaxed variants of readl/writel Nishanth Menon
2014-04-14 16:27   ` Nishanth Menon
2014-04-14 16:25 ` [PATCH 02/15] bus: omap_l3_noc: switch " Nishanth Menon
2014-04-14 16:25 ` [PATCH 03/15] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-14 16:25 ` [PATCH 04/15] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-14 16:25 ` [PATCH 05/15] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-14 16:25 ` [PATCH 06/15] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-14 16:25 ` [PATCH 07/15] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-14 16:25 ` [PATCH 08/15] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-14 16:25 ` [PATCH 09/15] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-14 16:25 ` [PATCH 10/15] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-14 16:25 ` [PATCH 11/15] bus: omap_l3_noc: use of_match_data to pick up SoC information Nishanth Menon
2014-04-14 16:25 ` [PATCH 12/15] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-14 16:25 ` [PATCH 13/15] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-14 16:25 ` [PATCH 14/15] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-14 16:25 ` [PATCH 15/15] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-17 20:49 ` [PATCH V2 00/19] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 01/19] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-17 20:51     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 02/19] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-17 20:52     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 03/19] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-17 20:52     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 04/19] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 05/19] bus: omap_l3_noc: switch over to relaxed variants of readl/writel Nishanth Menon
2014-04-17 21:52     ` Felipe Balbi
2014-04-17 21:56       ` Santosh Shilimkar
2014-04-17 22:03         ` Felipe Balbi
2014-04-21 13:16           ` Nishanth Menon
2014-04-21 15:09             ` Felipe Balbi
2014-04-21 15:31               ` Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 06/19] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-17 22:00     ` Felipe Balbi
2014-04-21 13:08       ` Nishanth Menon
2014-04-21 15:11         ` Felipe Balbi
2014-04-17 20:49   ` [PATCH V2 07/19] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 08/19] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 09/19] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 10/19] bus: omap_l3_noc: use of_match_data to pick up SoC information Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 11/19] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 12/19] bus: omap_l3_noc: fix masterid detection Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 13/19] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 14/19] bus: omap_l3_noc: improve readability by using helper for slave event parsing Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 15/19] bus: omap_l3_noc: add information about the type of operation Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 16/19] bus: omap_l3_noc: Add information about the context " Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 17/19] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 18/19] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 19/19] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-17 20:57   ` [PATCH V2 00/19] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Santosh Shilimkar
2014-04-17 21:00     ` Nishanth Menon
2014-04-24  8:55       ` Peter Ujfalusi
2014-04-24 14:19         ` Nishanth Menon
2014-04-25  6:27           ` Peter Ujfalusi
2014-04-25 13:44             ` Nishanth Menon
2014-04-24 16:25         ` Tony Lindgren
2014-04-24 16:31           ` Nishanth Menon
2014-04-24 15:54   ` Darren Etheridge
2014-04-24 16:06     ` Nishanth Menon
2014-04-28 15:14 ` [PATCH V3 00/20] " Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 01/20] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 02/20] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 03/20] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 04/20] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 05/20] bus: omap_l3_noc: switch over to relaxed variants of readl/writel Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 06/20] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 07/20] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 08/20] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 09/20] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 10/20] bus: omap_l3_noc: use of_match_data to pick up SoC information Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 11/20] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-28 15:14   ` Nishanth Menon [this message]
2014-04-28 15:14   ` [PATCH V3 13/20] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 14/20] bus: omap_l3_noc: improve readability by using helper for slave event parsing Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 15/20] bus: omap_l3_noc: ignore masked out unclearable targets Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 16/20] bus: omap_l3_noc: add information about the type of operation Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 17/20] bus: omap_l3_noc: Add information about the context " Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 18/20] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 19/20] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-28 15:15   ` [PATCH V3 20/20] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-29 13:42   ` [PATCH V3 00/20] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Sekhar Nori
2014-05-05 20:03   ` [GIT PULL #1/2] bus: omap_l3_noc: driver fixes and DRA7/AM437x support Nishanth Menon
2014-05-05 20:06     ` [GIT PULL #2/2] ARM: dts: DRA7/AM437x l3noc dts updates Nishanth Menon
2014-05-08 15:04       ` Tony Lindgren
2014-05-08 15:03     ` [GIT PULL #1/2] bus: omap_l3_noc: driver fixes and DRA7/AM437x support Tony Lindgren

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