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From: Nishanth Menon <nm@ti.com>
To: Tony Lindgren <tony@atomide.com>,
	Santosh Shilimkar <santosh.shilimkar@ti.com>,
	Sricharan R <r.sricharan@ti.com>, Sekhar Nori <nsekhar@ti.com>,
	Rajendra Nayak <rnayak@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>,
	<devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-omap@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<nm@ti.com>
Subject: [PATCH V3 14/20] bus: omap_l3_noc: improve readability by using helper for slave event parsing
Date: Mon, 28 Apr 2014 10:14:54 -0500	[thread overview]
Message-ID: <1398698101-25513-15-git-send-email-nm@ti.com> (raw)
In-Reply-To: <1398698101-25513-1-git-send-email-nm@ti.com>

Current interrupt handler does the first level parse to identify the
slave and then handles the slave even identification, reporting and
clearing of event as well. It is hence logical to split the handler
into two where the primary handler just parses the flagmux till it
identifies a slave and the slave handling, reporting and clearing is
done in a helper function.

While at it update the documentation in kerneldoc style.

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Tested-by: Darren Etheridge <detheridge@ti.com>
---
V3: no change
 drivers/bus/omap_l3_noc.c |  211 ++++++++++++++++++++++++---------------------
 1 file changed, 113 insertions(+), 98 deletions(-)

diff --git a/drivers/bus/omap_l3_noc.c b/drivers/bus/omap_l3_noc.c
index 42e4114..0691e6d 100644
--- a/drivers/bus/omap_l3_noc.c
+++ b/drivers/bus/omap_l3_noc.c
@@ -26,14 +26,20 @@
 
 #include "omap_l3_noc.h"
 
-/*
- * Interrupt Handler for L3 error detection.
- *	1) Identify the L3 clockdomain partition to which the error belongs to.
- *	2) Identify the slave where the error information is logged
- *	3) Print the logged information.
- *	4) Add dump stack to provide kernel trace.
+/**
+ * l3_handle_target() - Handle Target specific parse and reporting
+ * @l3:		pointer to l3 struct
+ * @base:	base address of clkdm
+ * @flag_mux:	flagmux corresponding to the event
+ * @err_src:	error source index of the slave (target)
  *
- * Two Types of errors :
+ * This does the second part of the error interrupt handling:
+ *	3) Parse in the slave information
+ *	4) Print the logged information.
+ *	5) Add dump stack to provide kernel trace.
+ *	6) Clear the source if known.
+ *
+ * This handles two types of errors:
  *	1) Custom errors in L3 :
  *		Target like DMM/FW/EMIF generates SRESP=ERR error
  *	2) Standard L3 error:
@@ -49,22 +55,107 @@
  *	can be trapped as well. But the trapping is implemented as part
  *	secure software and hence need not be implemented here.
  */
-static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
+static int l3_handle_target(struct omap_l3 *l3, void __iomem *base,
+			    struct l3_flagmux_data *flag_mux, int err_src)
 {
-
-	struct omap_l3 *l3 = _l3;
-	int inttype, i, k;
-	int err_src = 0;
-	u32 std_err_main, err_reg, clear, masterid;
-	void __iomem *base, *l3_targ_base;
+	int k;
+	u32 std_err_main, clear, masterid;
+	void __iomem *l3_targ_base;
 	void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
-	char *target_name, *master_name = "UN IDENTIFIED";
 	struct l3_target_data *l3_targ_inst;
-	struct l3_flagmux_data *flag_mux;
 	struct l3_masters_data *master;
+	char *target_name, *master_name = "UN IDENTIFIED";
 	char *err_description;
 	char err_string[30] = { 0 };
 
+	/* We DONOT expect err_src to go out of bounds */
+	BUG_ON(err_src > MAX_CLKDM_TARGETS);
+
+	if (err_src < flag_mux->num_targ_data) {
+		l3_targ_inst = &flag_mux->l3_targ[err_src];
+		target_name = l3_targ_inst->name;
+		l3_targ_base = base + l3_targ_inst->offset;
+	} else {
+		target_name = L3_TARGET_NOT_SUPPORTED;
+	}
+
+	if (target_name == L3_TARGET_NOT_SUPPORTED)
+		return -ENODEV;
+
+	/* Read the stderrlog_main_source from clk domain */
+	l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
+	l3_targ_slvofslsb = l3_targ_base + L3_TARG_STDERRLOG_SLVOFSLSB;
+
+	std_err_main = readl_relaxed(l3_targ_stderr);
+
+	switch (std_err_main & CUSTOM_ERROR) {
+	case STANDARD_ERROR:
+		err_description = "Standard";
+		snprintf(err_string, sizeof(err_string),
+			 ": At Address: 0x%08X ",
+			 readl_relaxed(l3_targ_slvofslsb));
+
+		l3_targ_mstaddr = l3_targ_base + L3_TARG_STDERRLOG_MSTADDR;
+		break;
+
+	case CUSTOM_ERROR:
+		err_description = "Custom";
+
+		l3_targ_mstaddr = l3_targ_base +
+				  L3_TARG_STDERRLOG_CINFO_MSTADDR;
+		break;
+
+	default:
+		/* Nothing to be handled here as of now */
+		return 0;
+	}
+
+	/* STDERRLOG_MSTADDR Stores the NTTP master address. */
+	masterid = (readl_relaxed(l3_targ_mstaddr) &
+		    l3->mst_addr_mask) >> __ffs(l3->mst_addr_mask);
+
+	for (k = 0, master = l3->l3_masters; k < l3->num_masters;
+	     k++, master++) {
+		if (masterid == master->id) {
+			master_name = master->name;
+			break;
+		}
+	}
+
+	WARN(true,
+	     "%s:L3 %s Error: MASTER %s TARGET %s%s\n",
+	     dev_name(l3->dev),
+	     err_description,
+	     master_name, target_name,
+	     err_string);
+
+	/* clear the std error log*/
+	clear = std_err_main | CLEAR_STDERR_LOG;
+	writel_relaxed(clear, l3_targ_stderr);
+
+	return 0;
+}
+
+/**
+ * l3_interrupt_handler() - interrupt handler for l3 events
+ * @irq:	irq number
+ * @_l3:	pointer to l3 structure
+ *
+ * Interrupt Handler for L3 error detection.
+ *	1) Identify the L3 clockdomain partition to which the error belongs to.
+ *	2) Identify the slave where the error information is logged
+ *	... handle the slave event..
+ *	7) if the slave is unknown, mask out the slave.
+ */
+static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
+{
+	struct omap_l3 *l3 = _l3;
+	int inttype, i, ret;
+	int err_src = 0;
+	u32 err_reg, mask_val;
+	void __iomem *base, *mask_reg;
+	struct l3_flagmux_data *flag_mux;
+
 	/* Get the Type of interrupt */
 	inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
 
@@ -80,35 +171,18 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 
 		/* Get the corresponding error and analyse */
 		if (err_reg) {
-			bool std_err = true;
-
 			/* Identify the source from control status register */
 			err_src = __ffs(err_reg);
 
-			/* We DONOT expect err_src to go out of bounds */
-			BUG_ON(err_src > MAX_CLKDM_TARGETS);
-
-			if (err_src < flag_mux->num_targ_data) {
-				l3_targ_inst = &flag_mux->l3_targ[err_src];
-				target_name = l3_targ_inst->name;
-				l3_targ_base = base + l3_targ_inst->offset;
-			} else {
-				target_name = L3_TARGET_NOT_SUPPORTED;
-			}
+			ret = l3_handle_target(l3, base, flag_mux, err_src);
 
 			/*
-			 * If we do not know of a register offset to decode
-			 * and clear, then mask.
+			 * Certain plaforms may have "undocumented" status
+			 * pending on boot. So dont generate a severe warning
+			 * here. Just mask it off to prevent the error from
+			 * reoccuring and locking up the system.
 			 */
-			if (target_name == L3_TARGET_NOT_SUPPORTED) {
-				u32 mask_val;
-				void __iomem *mask_reg;
-
-				/*
-				 * Certain plaforms may have "undocumented"
-				 * status pending on boot.. So dont generate
-				 * a severe warning here.
-				 */
+			if (ret) {
 				dev_err(l3->dev,
 					"L3 %s error: target %d mod:%d %s\n",
 					inttype ? "debug" : "application",
@@ -119,67 +193,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
 				mask_val = readl_relaxed(mask_reg);
 				mask_val &= ~(1 << err_src);
 				writel_relaxed(mask_val, mask_reg);
-
-				break;
 			}
 
-			/* Read the stderrlog_main_source from clk domain */
-			l3_targ_stderr = l3_targ_base + L3_TARG_STDERRLOG_MAIN;
-			l3_targ_slvofslsb = l3_targ_base +
-					    L3_TARG_STDERRLOG_SLVOFSLSB;
-
-			std_err_main = readl_relaxed(l3_targ_stderr);
-
-			switch (std_err_main & CUSTOM_ERROR) {
-			case STANDARD_ERROR:
-				err_description = "Standard";
-				snprintf(err_string, sizeof(err_string),
-					 ": At Address: 0x%08X ",
-					 readl_relaxed(l3_targ_slvofslsb));
-
-				l3_targ_mstaddr = l3_targ_base +
-						L3_TARG_STDERRLOG_MSTADDR;
-				break;
-
-			case CUSTOM_ERROR:
-				err_description = "Custom";
-
-				l3_targ_mstaddr = l3_targ_base +
-						L3_TARG_STDERRLOG_CINFO_MSTADDR;
-				break;
-
-			default:
-				std_err = false;
-				/* Nothing to be handled here as of now */
-				break;
-			}
-
-			if (!std_err)
-				break;
-
-			/* STDERRLOG_MSTADDR Stores the NTTP master address. */
-			masterid = (readl_relaxed(l3_targ_mstaddr) &
-				    l3->mst_addr_mask) >>
-					__ffs(l3->mst_addr_mask);
-
-			for (k = 0, master = l3->l3_masters;
-			     k < l3->num_masters; k++, master++) {
-				if (masterid == master->id) {
-					master_name = master->name;
-					break;
-				}
-			}
-
-			WARN(true,
-			     "%s:L3 %s Error: MASTER %s TARGET %s%s\n",
-			     dev_name(l3->dev),
-			     err_description,
-			     master_name, target_name,
-			     err_string);
-			/* clear the std error log*/
-			clear = std_err_main | CLEAR_STDERR_LOG;
-			writel_relaxed(clear, l3_targ_stderr);
-
 			/* Error found so break the for loop */
 			break;
 		}
-- 
1.7.9.5


  parent reply	other threads:[~2014-04-28 15:29 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-14 16:25 [PATCH 00/15] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Nishanth Menon
2014-04-14 16:25 ` [PATCH 01/15] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-14 16:25 ` [PATCH 02/15] bus: omap_l3_noc: switched over to relaxed variants of readl/writel Nishanth Menon
2014-04-14 16:27   ` Nishanth Menon
2014-04-14 16:25 ` [PATCH 02/15] bus: omap_l3_noc: switch " Nishanth Menon
2014-04-14 16:25 ` [PATCH 03/15] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-14 16:25 ` [PATCH 04/15] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-14 16:25 ` [PATCH 05/15] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-14 16:25 ` [PATCH 06/15] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-14 16:25 ` [PATCH 07/15] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-14 16:25 ` [PATCH 08/15] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-14 16:25 ` [PATCH 09/15] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-14 16:25 ` [PATCH 10/15] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-14 16:25 ` [PATCH 11/15] bus: omap_l3_noc: use of_match_data to pick up SoC information Nishanth Menon
2014-04-14 16:25 ` [PATCH 12/15] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-14 16:25 ` [PATCH 13/15] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-14 16:25 ` [PATCH 14/15] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-14 16:25 ` [PATCH 15/15] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-17 20:49 ` [PATCH V2 00/19] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 01/19] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-17 20:51     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 02/19] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-17 20:52     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 03/19] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-17 20:52     ` Santosh Shilimkar
2014-04-17 20:49   ` [PATCH V2 04/19] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 05/19] bus: omap_l3_noc: switch over to relaxed variants of readl/writel Nishanth Menon
2014-04-17 21:52     ` Felipe Balbi
2014-04-17 21:56       ` Santosh Shilimkar
2014-04-17 22:03         ` Felipe Balbi
2014-04-21 13:16           ` Nishanth Menon
2014-04-21 15:09             ` Felipe Balbi
2014-04-21 15:31               ` Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 06/19] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-17 22:00     ` Felipe Balbi
2014-04-21 13:08       ` Nishanth Menon
2014-04-21 15:11         ` Felipe Balbi
2014-04-17 20:49   ` [PATCH V2 07/19] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 08/19] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 09/19] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 10/19] bus: omap_l3_noc: use of_match_data to pick up SoC information Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 11/19] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 12/19] bus: omap_l3_noc: fix masterid detection Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 13/19] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 14/19] bus: omap_l3_noc: improve readability by using helper for slave event parsing Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 15/19] bus: omap_l3_noc: add information about the type of operation Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 16/19] bus: omap_l3_noc: Add information about the context " Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 17/19] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 18/19] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-17 20:49   ` [PATCH V2 19/19] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-17 20:57   ` [PATCH V2 00/19] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Santosh Shilimkar
2014-04-17 21:00     ` Nishanth Menon
2014-04-24  8:55       ` Peter Ujfalusi
2014-04-24 14:19         ` Nishanth Menon
2014-04-25  6:27           ` Peter Ujfalusi
2014-04-25 13:44             ` Nishanth Menon
2014-04-24 16:25         ` Tony Lindgren
2014-04-24 16:31           ` Nishanth Menon
2014-04-24 15:54   ` Darren Etheridge
2014-04-24 16:06     ` Nishanth Menon
2014-04-28 15:14 ` [PATCH V3 00/20] " Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 01/20] bus: omap_l3_noc: Fix copyright information Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 02/20] bus: omap_l3_noc: rename functions and data to omap_l3 Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 03/20] bus: omap_l3_noc: remove iclk from omap_l3 struct Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 04/20] bus: omap_l3_noc: populate l3->dev and use it Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 05/20] bus: omap_l3_noc: switch over to relaxed variants of readl/writel Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 06/20] bus: omap_l3_noc: un-obfuscate l3_targ address computation Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 07/20] bus: omap_l3_noc: move L3 master data structure out Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 08/20] bus: omap_l3_noc: convert target information into a structure Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 09/20] bus: omap_l3_noc: Add support for discountinous flag mux input numbers Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 10/20] bus: omap_l3_noc: use of_match_data to pick up SoC information Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 11/20] bus: omap_l3_noc: convert flagmux information into a structure Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 12/20] bus: omap_l3_noc: fix masterid detection Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 13/20] bus: omap_l3_noc: make error reporting and handling common Nishanth Menon
2014-04-28 15:14   ` Nishanth Menon [this message]
2014-04-28 15:14   ` [PATCH V3 15/20] bus: omap_l3_noc: ignore masked out unclearable targets Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 16/20] bus: omap_l3_noc: add information about the type of operation Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 17/20] bus: omap_l3_noc: Add information about the context " Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 18/20] bus: omap_l3_noc: introduce concept of submodule Nishanth Menon
2014-04-28 15:14   ` [PATCH V3 19/20] bus: omap_l3_noc: Add DRA7 interconnect error data Nishanth Menon
2014-04-28 15:15   ` [PATCH V3 20/20] bus: omap_l3_noc: Add AM4372 " Nishanth Menon
2014-04-29 13:42   ` [PATCH V3 00/20] bus: omap_l3_noc: driver cleanups and support for DRA7/AM4372 Sekhar Nori
2014-05-05 20:03   ` [GIT PULL #1/2] bus: omap_l3_noc: driver fixes and DRA7/AM437x support Nishanth Menon
2014-05-05 20:06     ` [GIT PULL #2/2] ARM: dts: DRA7/AM437x l3noc dts updates Nishanth Menon
2014-05-08 15:04       ` Tony Lindgren
2014-05-08 15:03     ` [GIT PULL #1/2] bus: omap_l3_noc: driver fixes and DRA7/AM437x support Tony Lindgren

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