* [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
@ 2014-07-23 13:24 Mugunthan V N
2014-07-23 13:24 ` [PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC Mugunthan V N
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Mugunthan V N @ 2014-07-23 13:24 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel, Mugunthan V N
Adding device tree entry for CPSW to make it work in Dual EMAC mode.
These patches were tested with DRA7 hwmod patches on top of linux-next.
The patches were already reviewed [1] and has been waiting for cross bar
and hwmod to be pulled in. Now since all dependent patches has already
pulled in, so reposting the patches again.
[1] https://lkml.org/lkml/2014/5/13/89
Mugunthan V N (3):
pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx
arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
arch/arm/boot/dts/dra7-evm.dts | 105 ++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/dra7.dtsi | 58 +++++++++++++++++++++
include/dt-bindings/pinctrl/dra.h | 8 +++
3 files changed, 171 insertions(+)
--
2.0.2.673.g9ab0882
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
2014-07-23 13:24 [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
@ 2014-07-23 13:24 ` Mugunthan V N
2014-07-23 13:24 ` [PATCH 2/3] arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx Mugunthan V N
2014-07-23 13:24 ` [PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM Mugunthan V N
2 siblings, 0 replies; 7+ messages in thread
From: Mugunthan V N @ 2014-07-23 13:24 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel, Mugunthan V N
Add pin off modes for dra7 SoC so that during module disable or suspend
state it can help saving power
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
include/dt-bindings/pinctrl/dra.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/dt-bindings/pinctrl/dra.h b/include/dt-bindings/pinctrl/dra.h
index 002a285..a0ff2d0 100644
--- a/include/dt-bindings/pinctrl/dra.h
+++ b/include/dt-bindings/pinctrl/dra.h
@@ -46,5 +46,13 @@
#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN)
+/* Off mode states */
+#define PIN_OFF_NONE 0
+#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL)
+#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN)
+#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP)
+#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN)
+#define PIN_OFF_WAKEUPENABLE WAKEUP_EN
+
#endif
--
2.0.2.673.g9ab0882
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/3] arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx
2014-07-23 13:24 [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
2014-07-23 13:24 ` [PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC Mugunthan V N
@ 2014-07-23 13:24 ` Mugunthan V N
2014-07-23 13:24 ` [PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM Mugunthan V N
2 siblings, 0 replies; 7+ messages in thread
From: Mugunthan V N @ 2014-07-23 13:24 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel, Mugunthan V N
Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/boot/dts/dra7.dtsi | 58 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 6563b98..d576b51 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -34,6 +34,8 @@
serial3 = &uart4;
serial4 = &uart5;
serial5 = &uart6;
+ ethernet0 = &cpsw_emac0;
+ ethernet1 = &cpsw_emac1;
};
timer {
@@ -1145,6 +1147,62 @@
ti,irqs-skip = <10 133 139 140>;
ti,irqs-safe-map = <0>;
};
+
+ mac: ethernet@4a100000 {
+ compatible = "ti,cpsw";
+ ti,hwmods = "gmac";
+ cpdma_channels = <8>;
+ ale_entries = <1024>;
+ bd_ram_size = <0x2000>;
+ no_bd_ram = <0>;
+ rx_descs = <64>;
+ mac_control = <0x20>;
+ slaves = <2>;
+ active_slave = <0>;
+ cpts_clock_mult = <0x80000000>;
+ cpts_clock_shift = <29>;
+ reg = <0x48484000 0x1000
+ 0x48485200 0xE00>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /*
+ * rx_thresh_pend
+ * rx_pend
+ * tx_pend
+ * misc_pend
+ */
+ interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
+ ranges;
+ status = "disabled";
+
+ davinci_mdio: mdio@48485000 {
+ compatible = "ti,davinci_mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ti,hwmods = "davinci_mdio";
+ bus_freq = <1000000>;
+ reg = <0x48485000 0x100>;
+ };
+
+ cpsw_emac0: slave@48480200 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ cpsw_emac1: slave@48480300 {
+ /* Filled in by U-Boot */
+ mac-address = [ 00 00 00 00 00 00 ];
+ };
+
+ phy_sel: cpsw-phy-sel@4a002554 {
+ compatible = "ti,dra7xx-cpsw-phy-sel";
+ reg= <0x4a002554 0x4>;
+ reg-names = "gmii-sel";
+ };
+ };
};
};
--
2.0.2.673.g9ab0882
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
2014-07-23 13:24 [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
2014-07-23 13:24 ` [PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC Mugunthan V N
2014-07-23 13:24 ` [PATCH 2/3] arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx Mugunthan V N
@ 2014-07-23 13:24 ` Mugunthan V N
2 siblings, 0 replies; 7+ messages in thread
From: Mugunthan V N @ 2014-07-23 13:24 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel, Mugunthan V N
Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and
sleep states and enable them in board evm dts file.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/boot/dts/dra7-evm.dts | 105 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 50f8022..743feef 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -149,6 +149,85 @@
0xc4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
0xc8 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */
+ >;
+ };
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
+ 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
+ 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
+ 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
+ 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
+ 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
+ 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
+ 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
+ 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
+ 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
+ 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
+ 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
+
+ /* Slave 2 */
+ 0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
+ 0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
+ 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
+ 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
+ 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
+ 0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
+ 0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
+ 0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
+ 0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
+ 0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
+ 0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
+ 0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ 0x250 (PIN_OFF_NONE)
+ 0x254 (PIN_OFF_NONE)
+ 0x258 (PIN_OFF_NONE)
+ 0x25c (PIN_OFF_NONE)
+ 0x260 (PIN_OFF_NONE)
+ 0x264 (PIN_OFF_NONE)
+ 0x268 (PIN_OFF_NONE)
+ 0x26c (PIN_OFF_NONE)
+ 0x270 (PIN_OFF_NONE)
+ 0x274 (PIN_OFF_NONE)
+ 0x278 (PIN_OFF_NONE)
+ 0x27c (PIN_OFF_NONE)
+
+ /* Slave 1 */
+ 0x198 (PIN_OFF_NONE)
+ 0x19c (PIN_OFF_NONE)
+ 0x1a0 (PIN_OFF_NONE)
+ 0x1a4 (PIN_OFF_NONE)
+ 0x1a8 (PIN_OFF_NONE)
+ 0x1ac (PIN_OFF_NONE)
+ 0x1b0 (PIN_OFF_NONE)
+ 0x1b4 (PIN_OFF_NONE)
+ 0x1b8 (PIN_OFF_NONE)
+ 0x1bc (PIN_OFF_NONE)
+ 0x1c0 (PIN_OFF_NONE)
+ 0x1c4 (PIN_OFF_NONE)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_data */
+ 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk */
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ 0x23c (PIN_OFF_NONE)
+ 0x240 (PIN_OFF_NONE)
>;
};
};
@@ -504,3 +583,29 @@
&usb2_phy2 {
phy-supply = <&ldousb_reg>;
};
+
+&mac {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ dual_emac;
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <2>;
+ phy-mode = "rgmii";
+ dual_emac_res_vlan = <1>;
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <3>;
+ phy-mode = "rgmii";
+ dual_emac_res_vlan = <2>;
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+};
--
2.0.2.673.g9ab0882
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
@ 2014-05-13 8:04 Mugunthan V N
2014-05-13 8:53 ` Mugunthan V N
0 siblings, 1 reply; 7+ messages in thread
From: Mugunthan V N @ 2014-05-13 8:04 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel, Mugunthan V N
Adding device tree entry for CPSW to make it work in Dual EMAC mode.
DRA7 cpsw phy sel driver patch has been pulled in net-next git with the
following commit id *d415fa1b88748d664b7b6a310dd8e699d2686cf7*
Mugunthan V N (3):
pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx
arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
arch/arm/boot/dts/dra7-evm.dts | 103 ++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/dra7.dtsi | 59 ++++++++++++++++++++++
include/dt-bindings/pinctrl/dra.h | 8 +++
3 files changed, 170 insertions(+)
--
1.9.2.459.g68773ac
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
2014-05-13 8:04 [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
@ 2014-05-13 8:53 ` Mugunthan V N
2014-05-14 23:12 ` Tony Lindgren
0 siblings, 1 reply; 7+ messages in thread
From: Mugunthan V N @ 2014-05-13 8:53 UTC (permalink / raw)
To: bcousson, tony; +Cc: devicetree, linux-omap, linux-kernel
Tony/Benoit
On Tuesday 13 May 2014 01:34 PM, Mugunthan V N wrote:
> Adding device tree entry for CPSW to make it work in Dual EMAC mode.
>
> DRA7 cpsw phy sel driver patch has been pulled in net-next git with the
> following commit id *d415fa1b88748d664b7b6a310dd8e699d2686cf7*
>
> Mugunthan V N (3):
> pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
> arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx
> arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
>
> arch/arm/boot/dts/dra7-evm.dts | 103 ++++++++++++++++++++++++++++++++++++++
> arch/arm/boot/dts/dra7.dtsi | 59 ++++++++++++++++++++++
> include/dt-bindings/pinctrl/dra.h | 8 +++
> 3 files changed, 170 insertions(+)
>
This patch series depends on Cross bar dt patch set
http://comments.gmane.org/gmane.linux.drivers.devicetree/73025
Regards
Mugunthan V N
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree
2014-05-13 8:53 ` Mugunthan V N
@ 2014-05-14 23:12 ` Tony Lindgren
0 siblings, 0 replies; 7+ messages in thread
From: Tony Lindgren @ 2014-05-14 23:12 UTC (permalink / raw)
To: Mugunthan V N; +Cc: bcousson, devicetree, linux-omap, linux-kernel
* Mugunthan V N <mugunthanvnm@ti.com> [140513 01:54]:
> Tony/Benoit
>
> On Tuesday 13 May 2014 01:34 PM, Mugunthan V N wrote:
> > Adding device tree entry for CPSW to make it work in Dual EMAC mode.
> >
> > DRA7 cpsw phy sel driver patch has been pulled in net-next git with the
> > following commit id *d415fa1b88748d664b7b6a310dd8e699d2686cf7*
> >
> > Mugunthan V N (3):
> > pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC
> > arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx
> > arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
> >
> > arch/arm/boot/dts/dra7-evm.dts | 103 ++++++++++++++++++++++++++++++++++++++
> > arch/arm/boot/dts/dra7.dtsi | 59 ++++++++++++++++++++++
> > include/dt-bindings/pinctrl/dra.h | 8 +++
> > 3 files changed, 170 insertions(+)
> >
>
> This patch series depends on Cross bar dt patch set
> http://comments.gmane.org/gmane.linux.drivers.devicetree/73025
That's not enabled yet and sounds like it needs some more work.
I suggest you repost this tested without the crossbar.
Regards,
Tony
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2014-07-23 13:26 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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2014-07-23 13:24 [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
2014-07-23 13:24 ` [PATCH 1/3] pinctrl: dra7: dt-bindings: add pin off modes for dra7 SoC Mugunthan V N
2014-07-23 13:24 ` [PATCH 2/3] arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx Mugunthan V N
2014-07-23 13:24 ` [PATCH 3/3] arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM Mugunthan V N
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2014-05-13 8:04 [PATCH 0/3] Add DRA7xx CPSW Ethernet support in Device Tree Mugunthan V N
2014-05-13 8:53 ` Mugunthan V N
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