* [PATCH v18 0/5] Rockchip soc thermal driver
@ 2014-11-12 5:02 Caesar Wang
2014-11-12 5:02 ` [PATCH v18 1/5] dt-bindings: document Rockchip thermal Caesar Wang
` (4 more replies)
0 siblings, 5 replies; 8+ messages in thread
From: Caesar Wang @ 2014-11-12 5:02 UTC (permalink / raw)
To: heiko, rui.zhang, edubezval
Cc: zyf, dianders, linux-rockchip, linux-kernel, linux-pm,
linux-arm-kernel, devicetree, linux-doc, cf, dmitry.torokhov,
huangtao, fzf, caesar.wang
This series patchs tested on rk3288 SDK board and pinky-v1,v2 board.
I believe the driver can be used on the rk3288-evb board.
Add this driver, The system will shutdown when
the thermal temperture over 100C.If for some reason we are unable to
shut it down in orderly fashion (kernel is stuck holding a lock or similar)
then hardware will reset it.
This series patchs depend on patch by Mikko Perttunen adding support for
hardware-supported trip points. It allows us to reduce polling frequency
while still being able to react when we cross the tripping point.
See https://lkml.org/lkml/2014/6/27/76
otherwise thermal_zone_of_sensor_register() will compile error,
e.g:
CC [M] drivers/thermal/rockchip_thermal.o
drivers/thermal/rockchip_thermal.c: In function
`rockchip_thermal_register_sensor':
drivers/thermal/rockchip_thermal.c:482:7: error: too many arguments to
function `thermal_zone_of_sensor_register'
rockchip_thermal_set_trips);
Changes in v18:
* address comments from Eduardo Valentin and Dmitry Torokhov..
- we need reset tsadc-controller before enable tsadc auto mode,
when we add the thermal function in coreboot,we always enable tsadc controller.
So we need reset tsadc-controller to avoid the TSADC is abnormal.
- put the document behind the driver.
- Tested on pinky1,2,jeffy board,we will fix cooling-map temperature from 80C to 70C,
critical temperature from 100C to 90C.
Changes in v17:
* address comments from Heiko Stubner and .
- rename the tshut property
- the critiacal temperature only indeed 100C when add the cooling map,
it's for the more secure,fix the temperature from 120C to 100C.
Changes in v16:
* address comments from Dmitry Torokhov.
- add thermal->chip->control(thermal->regs, false) in remove()
- adjust TSHUT in resume().
Changes in v15:
* address comments from Dmitry Torokhov.
- enable TSHUT move into rk_tsadcv2_tshut_temp().
- drop the id argument in rk_tsadcv2_control().
Changes in v14:
* address comments from Dmitry Torokhov.
- adjust-alarm-rate-depending-on-clock.
- 0001-rockchip-thermal-do-not-register-cpufreq-cooling-dev.
Changes in v13:
- add cooling-maps for cpu-thermal.
- put tshut polarity in device tree.
Changes in v12:
* address comments from Dmitry Torokhov and Vladimir Zapolskiy.
- split-sensor-handling.
- rename-rockchip_tsadc_platform_data.
Changes in v11:
* address comments from Vladimir Zapolskiy.
- fix cpufreq_cooling_unregister() to put in correct position.
- fix "data->chn",at least can get valid Tsensor temp.
Changes in v10:
* address comments from Doug Anderson.
- fix TSHUT polarity,ensure support TSHUT.
- add the decription for rk_tsadcv2_initialize().
Changes in v9:
* address comments from Dmitry Torokhov.
- fix some style be defined
- remove some unused code.
- clk_disable_unprepare->clk_disable in suspend()
Changes in v8:
* address comments from Dmitry Torokhov and Doug Anderson.
- add three Teperture Sensors.
- support CRU and GPIO reset chip.
- rename rk3xxx-cpu-thermal.dtsi as rk3288-thermal.dtsi
- alarm-temp via set_trips() callback
- remove "reset-gpios"
Changes in v7:
- fix get data->clk=0 when in probe() function.
- fix some style code.
- modify dts,main add rk3xxx-cpu-thermal.dtsi
Changes in v6:
* address comments from Tomeu Vizoso.
- use thermal's generic framework.
Changes in v5:
* address comments from Eduardo Valentin,rui.zhang and Heiko Stubner:
- with BIT() macro
- manage clocks in suspend/resume.
- license is fixed as GPLv2.
- #include "thermal_core.h"->#include <linux/thermal.h>
- use the generic trip-points.the hw-shut-temp isn't generic trip-points.
- The method of binding and unbinding be fixed.
- The pin-name tsadc->otp_out
Changes in v4:
* address comments from Jonathan Cameron,huangtao and zhaoyifeng:
- this series thermal driver still be put in driver/thermal/
- modify the thermal driver description.
Changes in v3:(add dts configure)
* address comments from Dmitry Torokhov and Arnd Bergmann:
- fix clock-names in rockchip-thermal.txt
- remove rockchip_thermal_control() in rockchip_set_mode()
- fix some code style.
- add dts configure.
Changes in v2:
* address comments from Heiko Stubner:
- fix dt-bindings in rockchip-thermal.txt
- remove Author mark
- rename TSADC_XXX->TSADCV2_XXX,it eill ready to merge compatible other SoCs.
- fix a identation
- remove clk_set_rate(),it's no necessary.
- fix the SIMPLE_DEV_PM_OPS() function style.
Caesar Wang (5):
thermal: rockchip: add driver for thermal
dt-bindings: document Rockchip thermal
ARM: dts: add RK3288 Thermal data
ARM: dts: add main Thermal info to rk3288
ARM: dts: enable Thermal on rk3288-evb board
.../bindings/thermal/rockchip-thermal.txt | 45 ++
arch/arm/boot/dts/rk3288-evb.dtsi | 5 +
arch/arm/boot/dts/rk3288-thermal.dtsi | 58 ++
arch/arm/boot/dts/rk3288.dtsi | 23 +
drivers/thermal/Kconfig | 9 +
drivers/thermal/Makefile | 1 +
drivers/thermal/rockchip_thermal.c | 628 +++++++++++++++++++++
7 files changed, 769 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
create mode 100644 arch/arm/boot/dts/rk3288-thermal.dtsi
create mode 100644 drivers/thermal/rockchip_thermal.c
--
1.9.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v18 1/5] dt-bindings: document Rockchip thermal
2014-11-12 5:02 [PATCH v18 0/5] Rockchip soc thermal driver Caesar Wang
@ 2014-11-12 5:02 ` Caesar Wang
2014-11-12 5:02 ` [PATCH v18 2/5] thermal: rockchip: add driver for thermal Caesar Wang
` (3 subsequent siblings)
4 siblings, 0 replies; 8+ messages in thread
From: Caesar Wang @ 2014-11-12 5:02 UTC (permalink / raw)
To: heiko, rui.zhang, edubezval
Cc: zyf, dianders, linux-rockchip, linux-kernel, linux-pm,
linux-arm-kernel, devicetree, linux-doc, cf, dmitry.torokhov,
huangtao, fzf, caesar.wang
This add the necessary binding documentation for the thermal
found on Rockchip SoCs
Signed-off-by: zhaoyifeng <zyf@rock-chips.com>
Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
---
.../bindings/thermal/rockchip-thermal.txt | 68 ++++++++++++++++++++++
1 file changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
new file mode 100644
index 0000000..ef802de
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -0,0 +1,68 @@
+* Temperature Sensor ADC (TSADC) on rockchip SoCs
+
+Required properties:
+- compatible : "rockchip,rk3288-tsadc"
+- reg : physical base address of the controller and length of memory mapped
+ region.
+- interrupts : The interrupt number to the cpu. The interrupt specifier format
+ depends on the interrupt controller.
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
+ the peripheral clock.
+- resets : Must contain an entry for each entry in reset-names.
+ See ../reset/reset.txt for details.
+- reset-names : Must include the name "tsadc-apb".
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
+- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
+- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
+- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
+ 1:HIGH.
+
+Exiample:
+tsadc: tsadc@ff280000 {
+ compatible = "rockchip,rk3288-tsadc";
+ reg = <0xff280000 0x100>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+ clock-names = "tsadc", "apb_pclk";
+ resets = <&cru SRST_TSADC>;
+ reset-names = "tsadc-apb";
+ pinctrl-names = "default";
+ pinctrl-0 = <&otp_out>;
+ #thermal-sensor-cells = <1>;
+ rockchip,hw-tshut-temp = <95000>;
+ rockchip,hw-tshut-mode = <0>;
+ rockchip,hw-tshut-polarity = <0>;
+};
+
+Example: referring to thermal sensors:
+thermal-zones {
+ cpu_thermal: cpu_thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ /* sensor ID */
+ thermal-sensors = <&tsadc 1>;
+
+ trips {
+ cpu_alert0: cpu_alert {
+ temperature = <70000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu_crit: cpu_crit {
+ temperature = <90000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v18 2/5] thermal: rockchip: add driver for thermal
2014-11-12 5:02 [PATCH v18 0/5] Rockchip soc thermal driver Caesar Wang
2014-11-12 5:02 ` [PATCH v18 1/5] dt-bindings: document Rockchip thermal Caesar Wang
@ 2014-11-12 5:02 ` Caesar Wang
2014-11-18 7:41 ` Caesar Wang
2014-11-12 5:02 ` [PATCH v18 3/5] ARM: dts: add RK3288 Thermal data Caesar Wang
` (2 subsequent siblings)
4 siblings, 1 reply; 8+ messages in thread
From: Caesar Wang @ 2014-11-12 5:02 UTC (permalink / raw)
To: heiko, rui.zhang, edubezval
Cc: zyf, dianders, linux-rockchip, linux-kernel, linux-pm,
linux-arm-kernel, devicetree, linux-doc, cf, dmitry.torokhov,
huangtao, fzf, caesar.wang
Thermal is TS-ADC Controller module supports
user-defined mode and automatic mode.
User-defined mode refers,TSADC all the control signals entirely by
software writing to register for direct control.
Automaic mode refers to the module automatically poll TSADC output,
and the results were checked.If you find that the temperature High
in a period of time,an interrupt is generated to the processor
down-measures taken;If the temperature over a period of time High,
the resulting TSHUT gave CRU module,let it reset the entire chip,
or via GPIO give PMIC.
Signed-off-by: zhaoyifeng <zyf@rock-chips.com>
Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
---
drivers/thermal/Kconfig | 10 +
drivers/thermal/Makefile | 1 +
drivers/thermal/rockchip_thermal.c | 721 +++++++++++++++++++++++++++++++++++++
3 files changed, 732 insertions(+)
create mode 100644 drivers/thermal/rockchip_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index ef5587f..527632d 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -133,6 +133,16 @@ config SPEAR_THERMAL
Enable this to plug the SPEAr thermal sensor driver into the Linux
thermal framework.
+config ROCKCHIP_THERMAL
+ tristate "Rockchip thermal driver"
+ depends on ARCH_ROCKCHIP
+ depends on RESET_CONTROLLER
+ help
+ Rockchip thermal driver provides support for Temperature sensor
+ ADC (TS-ADC) found on Rockchip SoCs. It supports one critical
+ trip point. Cpufreq is used as the cooling device and will throttle
+ CPUs when the Temperature crosses the passive trip point.
+
config RCAR_THERMAL
tristate "Renesas R-Car thermal driver"
depends on ARCH_SHMOBILE || COMPILE_TEST
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 31e232f..21da0a8 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -19,6 +19,7 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o
# platform thermal drivers
obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
+obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
obj-$(CONFIG_KIRKWOOD_THERMAL) += kirkwood_thermal.o
obj-y += samsung/
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
new file mode 100644
index 0000000..524e3d6
--- /dev/null
+++ b/drivers/thermal/rockchip_thermal.c
@@ -0,0 +1,721 @@
+/*
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+#include <linux/thermal.h>
+
+/**
+ * If the temperature over a period of time High,
+ * the resulting TSHUT gave CRU module,let it reset the entire chip,
+ * or via GPIO give PMIC.
+ */
+enum tshut_mode {
+ TSHUT_MODE_CRU = 0,
+ TSHUT_MODE_GPIO,
+};
+
+/**
+ * the system Temperature Sensors tshut(tshut) polarity
+ * the bit 8 is tshut polarity.
+ * 0: low active, 1: high active
+ */
+enum tshut_polarity {
+ TSHUT_LOW_ACTIVE = 0,
+ TSHUT_HIGH_ACTIVE,
+};
+
+/**
+ * The system has three Temperature Sensors. channel 0 is reserved,
+ * channel 1 is for CPU, and channel 2 is for GPU.
+ */
+enum sensor_id {
+ SENSOR_CPU = 1,
+ SENSOR_GPU,
+};
+
+struct rockchip_tsadc_chip {
+ /* The hardware-controlled tshut property */
+ long tshut_temp;
+ enum tshut_mode tshut_mode;
+ enum tshut_polarity tshut_polarity;
+
+ /* Chip-wide methods */
+ void (*initialize)(void __iomem *reg, enum tshut_polarity p);
+ void (*irq_ack)(void __iomem *reg);
+ void (*control)(void __iomem *reg, bool on);
+
+ /* Per-sensor methods */
+ int (*get_temp)(int chn, void __iomem *reg, long *temp);
+ void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
+ void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
+ void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
+};
+
+struct rockchip_thermal_sensor {
+ struct rockchip_thermal_data *thermal;
+ struct thermal_zone_device *tzd;
+ enum sensor_id id;
+};
+
+#define NUM_SENSORS 2 /* Ignore unused sensor 0 */
+
+struct rockchip_thermal_data {
+ const struct rockchip_tsadc_chip *chip;
+ struct platform_device *pdev;
+ struct reset_control *reset;
+
+ struct rockchip_thermal_sensor sensors[NUM_SENSORS];
+
+ struct clk *clk;
+ struct clk *pclk;
+
+ void __iomem *regs;
+
+ long tshut_temp;
+ enum tshut_mode tshut_mode;
+ enum tshut_polarity tshut_polarity;
+};
+
+/* TSADC V2 Sensor info define: */
+#define TSADCV2_AUTO_CON 0x04
+#define TSADCV2_INT_EN 0x08
+#define TSADCV2_INT_PD 0x0c
+#define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
+#define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
+#define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
+#define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
+#define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
+#define TSADCV2_AUTO_PERIOD 0x68
+#define TSADCV2_AUTO_PERIOD_HT 0x6c
+
+#define TSADCV2_AUTO_EN BIT(0)
+#define TSADCV2_AUTO_DISABLE ~BIT(0)
+#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
+#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
+#define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
+
+#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
+#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
+#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
+
+#define TSADCV2_INT_PD_CLEAR ~BIT(8)
+
+#define TSADCV2_DATA_MASK 0xfff
+#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
+#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
+#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
+#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
+
+struct tsadc_table {
+ unsigned long code;
+ long temp;
+};
+
+static const struct tsadc_table v2_code_table[] = {
+ {TSADCV2_DATA_MASK, -40000},
+ {3800, -40000},
+ {3792, -35000},
+ {3783, -30000},
+ {3774, -25000},
+ {3765, -20000},
+ {3756, -15000},
+ {3747, -10000},
+ {3737, -5000},
+ {3728, 0},
+ {3718, 5000},
+ {3708, 10000},
+ {3698, 15000},
+ {3688, 20000},
+ {3678, 25000},
+ {3667, 30000},
+ {3656, 35000},
+ {3645, 40000},
+ {3634, 45000},
+ {3623, 50000},
+ {3611, 55000},
+ {3600, 60000},
+ {3588, 65000},
+ {3575, 70000},
+ {3563, 75000},
+ {3550, 80000},
+ {3537, 85000},
+ {3524, 90000},
+ {3510, 95000},
+ {3496, 100000},
+ {3482, 105000},
+ {3467, 110000},
+ {3452, 115000},
+ {3437, 120000},
+ {3421, 125000},
+ {0, 125000},
+};
+
+static u32 rk_tsadcv2_temp_to_code(long temp)
+{
+ int high, low, mid;
+
+ low = 0;
+ high = ARRAY_SIZE(v2_code_table) - 1;
+ mid = (high + low) / 2;
+
+ if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
+ return 0;
+
+ while (low <= high) {
+ if (temp == v2_code_table[mid].temp)
+ return v2_code_table[mid].code;
+ else if (temp < v2_code_table[mid].temp)
+ high = mid - 1;
+ else
+ low = mid + 1;
+ mid = (low + high) / 2;
+ }
+
+ return 0;
+}
+
+static long rk_tsadcv2_code_to_temp(u32 code)
+{
+ int high, low, mid;
+
+ low = 0;
+ high = ARRAY_SIZE(v2_code_table) - 1;
+ mid = (high + low) / 2;
+
+ if (code > v2_code_table[low].code || code < v2_code_table[high].code)
+ return 125000; /* No code available, return max temperature */
+
+ while (low <= high) {
+ if (code >= v2_code_table[mid].code && code <
+ v2_code_table[mid - 1].code)
+ return v2_code_table[mid].temp;
+ else if (code < v2_code_table[mid].code)
+ low = mid + 1;
+ else
+ high = mid - 1;
+ mid = (low + high) / 2;
+ }
+
+ return 125000;
+}
+
+/**
+ * rk_tsadcv2_initialize - initialize TASDC Controller
+ * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
+ * every two accessing of TSADC in normal operation.
+ * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
+ * every two accessing of TSADC after the temperature is higher
+ * than COM_SHUT or COM_INT.
+ * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
+ * if the temperature is higher than COMP_INT or COMP_SHUT for
+ * "debounce" times, TSADC controller will generate interrupt or TSHUT.
+ */
+static void rk_tsadcv2_initialize(void __iomem *regs,
+ enum tshut_polarity tshut_polarity)
+{
+ if (tshut_polarity == TSHUT_HIGH_ACTIVE)
+ writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
+ regs + TSADCV2_AUTO_CON);
+ else
+ writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW),
+ regs + TSADCV2_AUTO_CON);
+
+ writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
+ writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
+ regs + TSADCV2_HIGHT_INT_DEBOUNCE);
+ writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
+ regs + TSADCV2_AUTO_PERIOD_HT);
+ writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
+ regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
+}
+
+static void rk_tsadcv2_irq_ack(void __iomem *regs)
+{
+ u32 val;
+
+ val = readl_relaxed(regs + TSADCV2_INT_PD);
+ writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
+}
+
+static void rk_tsadcv2_control(void __iomem *regs, bool enable)
+{
+ u32 val;
+
+ val = readl_relaxed(regs + TSADCV2_AUTO_CON);
+ if (enable)
+ val |= TSADCV2_AUTO_EN;
+ else
+ val &= ~TSADCV2_AUTO_EN;
+
+ writel_relaxed(val, regs + TSADCV2_AUTO_CON);
+}
+
+static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
+{
+ u32 val;
+
+ /* the A/D value of the channel last conversion need some time */
+ val = readl_relaxed(regs + TSADCV2_DATA(chn));
+ if (val == 0)
+ return -EAGAIN;
+
+ *temp = rk_tsadcv2_code_to_temp(val);
+
+ return 0;
+}
+
+static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
+{
+ u32 alarm_value, int_en;
+
+ alarm_value = rk_tsadcv2_temp_to_code(temp);
+ writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
+ regs + TSADCV2_COMP_INT(chn));
+
+ int_en = readl_relaxed(regs + TSADCV2_INT_EN);
+ int_en |= TSADCV2_INT_SRC_EN(chn);
+ writel_relaxed(int_en, regs + TSADCV2_INT_EN);
+}
+
+static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
+{
+ u32 tshut_value, val;
+
+ tshut_value = rk_tsadcv2_temp_to_code(temp);
+ writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
+
+ /* TSHUT will be valid */
+ val = readl_relaxed(regs + TSADCV2_AUTO_CON);
+ writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
+}
+
+static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
+ enum tshut_mode mode)
+{
+ u32 val;
+
+ val = readl_relaxed(regs + TSADCV2_INT_EN);
+ if (mode == TSHUT_MODE_GPIO) {
+ val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
+ val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
+ } else {
+ val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
+ val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
+ }
+
+ writel_relaxed(val, regs + TSADCV2_INT_EN);
+}
+
+static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
+ .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+ .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+ .tshut_temp = 95000,
+
+ .initialize = rk_tsadcv2_initialize,
+ .irq_ack = rk_tsadcv2_irq_ack,
+ .control = rk_tsadcv2_control,
+ .get_temp = rk_tsadcv2_get_temp,
+ .set_alarm_temp = rk_tsadcv2_alarm_temp,
+ .set_tshut_temp = rk_tsadcv2_tshut_temp,
+ .set_tshut_mode = rk_tsadcv2_tshut_mode,
+};
+
+static const struct of_device_id of_rockchip_thermal_match[] = {
+ {
+ .compatible = "rockchip,rk3288-tsadc",
+ .data = (void *)&rk3288_tsadc_data,
+ },
+ { /* end */ },
+};
+MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
+
+static void
+rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
+{
+ struct thermal_zone_device *tzd = sensor->tzd;
+
+ tzd->ops->set_mode(tzd,
+ on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
+}
+
+static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
+{
+ struct rockchip_thermal_data *thermal = dev;
+ int i;
+
+ dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
+
+ thermal->chip->irq_ack(thermal->regs);
+
+ for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+ thermal_zone_device_update(thermal->sensors[i].tzd);
+
+ return IRQ_HANDLED;
+}
+
+static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
+{
+ struct rockchip_thermal_sensor *sensor = _sensor;
+ struct rockchip_thermal_data *thermal = sensor->thermal;
+ const struct rockchip_tsadc_chip *tsadc = thermal->chip;
+
+ dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
+ __func__, sensor->id, low, high);
+
+ tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
+
+ return 0;
+}
+
+static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
+{
+ struct rockchip_thermal_sensor *sensor = _sensor;
+ struct rockchip_thermal_data *thermal = sensor->thermal;
+ const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
+ int retval;
+
+ retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
+ dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
+ sensor->id, *out_temp, retval);
+
+ return retval;
+}
+
+static int rockchip_configure_from_dt(struct device *dev,
+ struct device_node *np,
+ struct rockchip_thermal_data *thermal)
+{
+ u32 shut_temp, tshut_mode, tshut_polarity;
+
+ if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
+ dev_warn(dev,
+ "Missing tshut temp property, using default %ld\n",
+ thermal->chip->tshut_temp);
+ thermal->tshut_temp = thermal->chip->tshut_temp;
+ } else {
+ thermal->tshut_temp = shut_temp;
+ }
+
+ if (thermal->tshut_temp > INT_MAX) {
+ dev_err(dev, "Invalid tshut temperature specified: %ld\n",
+ thermal->tshut_temp);
+ return -ERANGE;
+ }
+
+ if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
+ dev_warn(dev,
+ "Missing tshut mode property, using default (%s)\n",
+ thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
+ "gpio" : "cru");
+ thermal->tshut_mode = thermal->chip->tshut_mode;
+ } else {
+ thermal->tshut_mode = tshut_mode;
+ }
+
+ if (thermal->tshut_mode > 1) {
+ dev_err(dev, "Invalid tshut mode specified: %d\n",
+ thermal->tshut_mode);
+ return -EINVAL;
+ }
+
+ if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
+ &tshut_polarity)) {
+ dev_warn(dev,
+ "Missing tshut-polarity property, using default (%s)\n",
+ thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
+ "low" : "high");
+ thermal->tshut_polarity = thermal->chip->tshut_polarity;
+ } else {
+ thermal->tshut_polarity = tshut_polarity;
+ }
+
+ if (thermal->tshut_polarity > 1) {
+ dev_err(dev, "Invalid tshut-polarity specified: %d\n",
+ thermal->tshut_polarity);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int
+rockchip_thermal_register_sensor(struct platform_device *pdev,
+ struct rockchip_thermal_data *thermal,
+ struct rockchip_thermal_sensor *sensor,
+ enum sensor_id id)
+{
+ const struct rockchip_tsadc_chip *tsadc = thermal->chip;
+ int error;
+
+ tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
+ tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp);
+
+ sensor->thermal = thermal;
+ sensor->id = id;
+ sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
+ rockchip_thermal_get_temp,
+ NULL,
+ rockchip_thermal_set_trips);
+ if (IS_ERR(sensor->tzd)) {
+ error = PTR_ERR(sensor->tzd);
+ dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
+ id, error);
+ return error;
+ }
+
+ return 0;
+}
+
+/*
+ * Reset TSADC Controller, reset all tsadc registers.
+ */
+static void rockchip_thermal_reset_controller(struct reset_control *reset)
+{
+ reset_control_assert(reset);
+ usleep_range(10, 20);
+ reset_control_deassert(reset);
+}
+
+static int rockchip_thermal_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct rockchip_thermal_data *thermal;
+ const struct of_device_id *match;
+ struct resource *res;
+ int irq;
+ int i;
+ int error;
+
+ match = of_match_node(of_rockchip_thermal_match, np);
+ if (!match)
+ return -ENXIO;
+
+ irq = platform_get_irq(pdev, 0);
+ if (irq < 0) {
+ dev_err(&pdev->dev, "no irq resource?\n");
+ return -EINVAL;
+ }
+
+ thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
+ GFP_KERNEL);
+ if (!thermal)
+ return -ENOMEM;
+
+ thermal->pdev = pdev;
+
+ thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
+ if (!thermal->chip)
+ return -EINVAL;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ thermal->regs = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(thermal->regs))
+ return PTR_ERR(thermal->regs);
+
+ thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
+ if (IS_ERR(thermal->reset)) {
+ error = PTR_ERR(thermal->reset);
+ dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
+ return error;
+ }
+
+ thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
+ if (IS_ERR(thermal->clk)) {
+ error = PTR_ERR(thermal->clk);
+ dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
+ return error;
+ }
+
+ thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
+ if (IS_ERR(thermal->pclk)) {
+ error = PTR_ERR(thermal->clk);
+ dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
+ error);
+ return error;
+ }
+
+ error = clk_prepare_enable(thermal->clk);
+ if (error) {
+ dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
+ error);
+ return error;
+ }
+
+ error = clk_prepare_enable(thermal->pclk);
+ if (error) {
+ dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
+ goto err_disable_clk;
+ }
+
+ rockchip_thermal_reset_controller(thermal->reset);
+
+ error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
+ if (error) {
+ dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
+ error);
+ goto err_disable_pclk;
+ }
+
+ thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
+
+ error = rockchip_thermal_register_sensor(pdev, thermal,
+ &thermal->sensors[0],
+ SENSOR_CPU);
+ if (error) {
+ dev_err(&pdev->dev,
+ "failed to register CPU thermal sensor: %d\n", error);
+ goto err_disable_pclk;
+ }
+
+ error = rockchip_thermal_register_sensor(pdev, thermal,
+ &thermal->sensors[1],
+ SENSOR_GPU);
+ if (error) {
+ dev_err(&pdev->dev,
+ "failed to register GPU thermal sensor: %d\n", error);
+ goto err_unregister_cpu_sensor;
+ }
+
+ error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
+ &rockchip_thermal_alarm_irq_thread,
+ IRQF_ONESHOT,
+ "rockchip_thermal", thermal);
+ if (error) {
+ dev_err(&pdev->dev,
+ "failed to request tsadc irq: %d\n", error);
+ goto err_unregister_gpu_sensor;
+ }
+
+ thermal->chip->control(thermal->regs, true);
+
+ for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+ rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
+
+ platform_set_drvdata(pdev, thermal);
+
+ return 0;
+
+err_unregister_gpu_sensor:
+ thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
+err_unregister_cpu_sensor:
+ thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
+err_disable_pclk:
+ clk_disable_unprepare(thermal->pclk);
+err_disable_clk:
+ clk_disable_unprepare(thermal->clk);
+
+ return error;
+}
+
+static int rockchip_thermal_remove(struct platform_device *pdev)
+{
+ struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
+ struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
+
+ rockchip_thermal_toggle_sensor(sensor, false);
+ thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
+ }
+
+ thermal->chip->control(thermal->regs, false);
+
+ clk_disable_unprepare(thermal->pclk);
+ clk_disable_unprepare(thermal->clk);
+
+ return 0;
+}
+
+static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+ rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
+
+ thermal->chip->control(thermal->regs, false);
+
+ clk_disable(thermal->pclk);
+ clk_disable(thermal->clk);
+
+ return 0;
+}
+
+static int __maybe_unused rockchip_thermal_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
+ int i;
+ int error;
+
+ error = clk_enable(thermal->clk);
+ if (error)
+ return error;
+
+ error = clk_enable(thermal->pclk);
+ if (error)
+ return error;
+
+ rockchip_thermal_reset_controller(thermal->reset);
+
+ thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
+
+ for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
+ enum sensor_id id = thermal->sensors[i].id;
+
+ thermal->chip->set_tshut_mode(id, thermal->regs,
+ thermal->tshut_mode);
+ thermal->chip->set_tshut_temp(id, thermal->regs,
+ thermal->tshut_temp);
+ }
+
+ thermal->chip->control(thermal->regs, true);
+
+ for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
+ rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
+
+ return 0;
+}
+
+static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
+ rockchip_thermal_suspend, rockchip_thermal_resume);
+
+static struct platform_driver rockchip_thermal_driver = {
+ .driver = {
+ .name = "rockchip-thermal",
+ .owner = THIS_MODULE,
+ .pm = &rockchip_thermal_pm_ops,
+ .of_match_table = of_rockchip_thermal_match,
+ },
+ .probe = rockchip_thermal_probe,
+ .remove = rockchip_thermal_remove,
+};
+
+module_platform_driver(rockchip_thermal_driver);
+
+MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
+MODULE_AUTHOR("Rockchip, Inc.");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:rockchip-thermal");
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v18 3/5] ARM: dts: add RK3288 Thermal data
2014-11-12 5:02 [PATCH v18 0/5] Rockchip soc thermal driver Caesar Wang
2014-11-12 5:02 ` [PATCH v18 1/5] dt-bindings: document Rockchip thermal Caesar Wang
2014-11-12 5:02 ` [PATCH v18 2/5] thermal: rockchip: add driver for thermal Caesar Wang
@ 2014-11-12 5:02 ` Caesar Wang
2014-11-12 5:02 ` [PATCH v18 4/5] ARM: dts: add main Thermal info to rk3288 Caesar Wang
2014-11-12 5:02 ` [PATCH v18 5/5] ARM: dts: enable Thermal on rk3288-evb board Caesar Wang
4 siblings, 0 replies; 8+ messages in thread
From: Caesar Wang @ 2014-11-12 5:02 UTC (permalink / raw)
To: heiko, rui.zhang, edubezval
Cc: zyf, dianders, linux-rockchip, linux-kernel, linux-pm,
linux-arm-kernel, devicetree, linux-doc, cf, dmitry.torokhov,
huangtao, fzf, caesar.wang
This patch changes a dtsi file to contain the thermal data
on RK3288 and later SoCs. This data will
enable a thermal shutdown over 90C.
Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
---
arch/arm/boot/dts/rk3288-thermal.dtsi | 78 +++++++++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
create mode 100644 arch/arm/boot/dts/rk3288-thermal.dtsi
diff --git a/arch/arm/boot/dts/rk3288-thermal.dtsi b/arch/arm/boot/dts/rk3288-thermal.dtsi
new file mode 100644
index 0000000..a8a5ea7
--- /dev/null
+++ b/arch/arm/boot/dts/rk3288-thermal.dtsi
@@ -0,0 +1,78 @@
+/*
+ * Device Tree Source for RK3288 SoC thermal
+ *
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/thermal/thermal.h>
+
+reserve_thermal: reserve_thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ /* sensor ID */
+ thermal-sensors = <&tsadc 0>;
+
+};
+
+cpu_thermal: cpu_thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ /* sensor ID */
+ thermal-sensors = <&tsadc 1>;
+
+ trips {
+ cpu_alert0: cpu_alert0 {
+ temperature = <70000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ cpu_crit: cpu_crit {
+ temperature = <90000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+};
+
+gpu_thermal: gpu_thermal {
+ polling-delay-passive = <1000>; /* milliseconds */
+ polling-delay = <5000>; /* milliseconds */
+
+ /* sensor ID */
+ thermal-sensors = <&tsadc 2>;
+
+ trips {
+ gpu_alert0: gpu_alert0 {
+ temperature = <70000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "passive";
+ };
+ gpu_crit: gpu_crit {
+ temperature = <90000>; /* millicelsius */
+ hysteresis = <2000>; /* millicelsius */
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&gpu_alert0>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v18 4/5] ARM: dts: add main Thermal info to rk3288
2014-11-12 5:02 [PATCH v18 0/5] Rockchip soc thermal driver Caesar Wang
` (2 preceding siblings ...)
2014-11-12 5:02 ` [PATCH v18 3/5] ARM: dts: add RK3288 Thermal data Caesar Wang
@ 2014-11-12 5:02 ` Caesar Wang
2014-11-12 5:02 ` [PATCH v18 5/5] ARM: dts: enable Thermal on rk3288-evb board Caesar Wang
4 siblings, 0 replies; 8+ messages in thread
From: Caesar Wang @ 2014-11-12 5:02 UTC (permalink / raw)
To: heiko, rui.zhang, edubezval
Cc: zyf, dianders, linux-rockchip, linux-kernel, linux-pm,
linux-arm-kernel, devicetree, linux-doc, cf, dmitry.torokhov,
huangtao, fzf, caesar.wang
This patch is depend on rk3288-thermal.dtsi,or
it will compile error.
If for some reason we are unable to shut it down
in orderly fashion (kernel is stuck holding a lock or
similar), then hardware TSHUT will reset it.
If the temperature over a period of time High,over 95C
the resulting TSHUT gave CRU module,let it reset
the entire chip,or via GPIO give PMIC.
Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
---
arch/arm/boot/dts/rk3288.dtsi | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 9cd269a..c7a2691 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -15,6 +15,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/clock/rk3288-cru.h>
+#include <dt-bindings/thermal/thermal.h>
#include "skeleton.dtsi"
/ {
@@ -66,6 +67,7 @@
216000 900000
126000 900000
>;
+ #cooling-cells = <2>; /* min followed by max */
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
};
@@ -346,6 +348,25 @@
status = "disabled";
};
+ thermal-zones {
+ #include "rk3288-thermal.dtsi"
+ };
+
+ tsadc: tsadc@ff280000 {
+ compatible = "rockchip,rk3288-tsadc";
+ reg = <0xff280000 0x100>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+ clock-names = "tsadc", "apb_pclk";
+ resets = <&cru SRST_TSADC>;
+ reset-names = "tsadc-apb";
+ pinctrl-names = "default";
+ pinctrl-0 = <&otp_out>;
+ #thermal-sensor-cells = <1>;
+ rockchip,hw-tshut-temp = <95000>;
+ status = "disabled";
+ };
+
usb_host0_ehci: usb@ff500000 {
compatible = "generic-ehci";
reg = <0xff500000 0x100>;
@@ -965,6 +986,12 @@
};
};
+ tsadc {
+ otp_out: otp-out {
+ rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins = <7 0 RK_FUNC_1 &pcfg_pull_none>;
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v18 5/5] ARM: dts: enable Thermal on rk3288-evb board
2014-11-12 5:02 [PATCH v18 0/5] Rockchip soc thermal driver Caesar Wang
` (3 preceding siblings ...)
2014-11-12 5:02 ` [PATCH v18 4/5] ARM: dts: add main Thermal info to rk3288 Caesar Wang
@ 2014-11-12 5:02 ` Caesar Wang
4 siblings, 0 replies; 8+ messages in thread
From: Caesar Wang @ 2014-11-12 5:02 UTC (permalink / raw)
To: heiko, rui.zhang, edubezval
Cc: zyf, dianders, linux-rockchip, linux-kernel, linux-pm,
linux-arm-kernel, devicetree, linux-doc, cf, dmitry.torokhov,
huangtao, fzf, caesar.wang
when a thermal temperature over TSHUT.Default to via
CRU reset the entire chip on rk3288-evb Board,
TSHUT is low active on rk3288-evb board.
Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
---
arch/arm/boot/dts/rk3288-evb.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index cb83cea..3e067dd 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -148,6 +148,12 @@
status = "okay";
};
+&tsadc {
+ rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+ rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+ status = "okay";
+};
+
&pinctrl {
backlight {
bl_en: bl-en {
--
1.9.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v18 2/5] thermal: rockchip: add driver for thermal
2014-11-12 5:02 ` [PATCH v18 2/5] thermal: rockchip: add driver for thermal Caesar Wang
@ 2014-11-18 7:41 ` Caesar Wang
2014-11-18 15:03 ` Eduardo Valentin
0 siblings, 1 reply; 8+ messages in thread
From: Caesar Wang @ 2014-11-18 7:41 UTC (permalink / raw)
To: heiko, rui.zhang, edubezval
Cc: zyf, dianders, linux-rockchip, linux-kernel, linux-pm,
linux-arm-kernel, devicetree, linux-doc, cf, dmitry.torokhov,
huangtao, fzf
Hello edubezval,
I saw your latest patch[0].
I need send the new patch to fit the of-thermal Sensors API.
Right?
[0]: https://patchwork.kernel.org/patch/5324371/
在 2014年11月12日 13:02, Caesar Wang 写道:
> Thermal is TS-ADC Controller module supports
> user-defined mode and automatic mode.
>
> User-defined mode refers,TSADC all the control signals entirely by
> software writing to register for direct control.
>
> Automaic mode refers to the module automatically poll TSADC output,
> and the results were checked.If you find that the temperature High
> in a period of time,an interrupt is generated to the processor
> down-measures taken;If the temperature over a period of time High,
> the resulting TSHUT gave CRU module,let it reset the entire chip,
> or via GPIO give PMIC.
>
> Signed-off-by: zhaoyifeng <zyf@rock-chips.com>
> Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
> ---
> drivers/thermal/Kconfig | 10 +
> drivers/thermal/Makefile | 1 +
> drivers/thermal/rockchip_thermal.c | 721 +++++++++++++++++++++++++++++++++++++
> 3 files changed, 732 insertions(+)
> create mode 100644 drivers/thermal/rockchip_thermal.c
>
> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> index ef5587f..527632d 100644
> --- a/drivers/thermal/Kconfig
> +++ b/drivers/thermal/Kconfig
> @@ -133,6 +133,16 @@ config SPEAR_THERMAL
> Enable this to plug the SPEAr thermal sensor driver into the Linux
> thermal framework.
>
> +config ROCKCHIP_THERMAL
> + tristate "Rockchip thermal driver"
> + depends on ARCH_ROCKCHIP
> + depends on RESET_CONTROLLER
> + help
> + Rockchip thermal driver provides support for Temperature sensor
> + ADC (TS-ADC) found on Rockchip SoCs. It supports one critical
> + trip point. Cpufreq is used as the cooling device and will throttle
> + CPUs when the Temperature crosses the passive trip point.
> +
> config RCAR_THERMAL
> tristate "Renesas R-Car thermal driver"
> depends on ARCH_SHMOBILE || COMPILE_TEST
> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> index 31e232f..21da0a8 100644
> --- a/drivers/thermal/Makefile
> +++ b/drivers/thermal/Makefile
> @@ -19,6 +19,7 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o
>
> # platform thermal drivers
> obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> +obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
> obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
> obj-$(CONFIG_KIRKWOOD_THERMAL) += kirkwood_thermal.o
> obj-y += samsung/
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> new file mode 100644
> index 0000000..524e3d6
> --- /dev/null
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -0,0 +1,721 @@
> +/*
> + * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
> + * more details.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/interrupt.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset.h>
> +#include <linux/thermal.h>
> +
> +/**
> + * If the temperature over a period of time High,
> + * the resulting TSHUT gave CRU module,let it reset the entire chip,
> + * or via GPIO give PMIC.
> + */
> +enum tshut_mode {
> + TSHUT_MODE_CRU = 0,
> + TSHUT_MODE_GPIO,
> +};
> +
> +/**
> + * the system Temperature Sensors tshut(tshut) polarity
> + * the bit 8 is tshut polarity.
> + * 0: low active, 1: high active
> + */
> +enum tshut_polarity {
> + TSHUT_LOW_ACTIVE = 0,
> + TSHUT_HIGH_ACTIVE,
> +};
> +
> +/**
> + * The system has three Temperature Sensors. channel 0 is reserved,
> + * channel 1 is for CPU, and channel 2 is for GPU.
> + */
> +enum sensor_id {
> + SENSOR_CPU = 1,
> + SENSOR_GPU,
> +};
> +
> +struct rockchip_tsadc_chip {
> + /* The hardware-controlled tshut property */
> + long tshut_temp;
> + enum tshut_mode tshut_mode;
> + enum tshut_polarity tshut_polarity;
> +
> + /* Chip-wide methods */
> + void (*initialize)(void __iomem *reg, enum tshut_polarity p);
> + void (*irq_ack)(void __iomem *reg);
> + void (*control)(void __iomem *reg, bool on);
> +
> + /* Per-sensor methods */
> + int (*get_temp)(int chn, void __iomem *reg, long *temp);
> + void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
> + void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
> + void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
> +};
> +
> +struct rockchip_thermal_sensor {
> + struct rockchip_thermal_data *thermal;
> + struct thermal_zone_device *tzd;
> + enum sensor_id id;
> +};
> +
> +#define NUM_SENSORS 2 /* Ignore unused sensor 0 */
> +
> +struct rockchip_thermal_data {
> + const struct rockchip_tsadc_chip *chip;
> + struct platform_device *pdev;
> + struct reset_control *reset;
> +
> + struct rockchip_thermal_sensor sensors[NUM_SENSORS];
> +
> + struct clk *clk;
> + struct clk *pclk;
> +
> + void __iomem *regs;
> +
> + long tshut_temp;
> + enum tshut_mode tshut_mode;
> + enum tshut_polarity tshut_polarity;
> +};
> +
> +/* TSADC V2 Sensor info define: */
> +#define TSADCV2_AUTO_CON 0x04
> +#define TSADCV2_INT_EN 0x08
> +#define TSADCV2_INT_PD 0x0c
> +#define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
> +#define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
> +#define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
> +#define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
> +#define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
> +#define TSADCV2_AUTO_PERIOD 0x68
> +#define TSADCV2_AUTO_PERIOD_HT 0x6c
> +
> +#define TSADCV2_AUTO_EN BIT(0)
> +#define TSADCV2_AUTO_DISABLE ~BIT(0)
> +#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
> +#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
> +#define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
> +
> +#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
> +#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
> +#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
> +
> +#define TSADCV2_INT_PD_CLEAR ~BIT(8)
> +
> +#define TSADCV2_DATA_MASK 0xfff
> +#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
> +#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
> +#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
> +#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
> +
> +struct tsadc_table {
> + unsigned long code;
> + long temp;
> +};
> +
> +static const struct tsadc_table v2_code_table[] = {
> + {TSADCV2_DATA_MASK, -40000},
> + {3800, -40000},
> + {3792, -35000},
> + {3783, -30000},
> + {3774, -25000},
> + {3765, -20000},
> + {3756, -15000},
> + {3747, -10000},
> + {3737, -5000},
> + {3728, 0},
> + {3718, 5000},
> + {3708, 10000},
> + {3698, 15000},
> + {3688, 20000},
> + {3678, 25000},
> + {3667, 30000},
> + {3656, 35000},
> + {3645, 40000},
> + {3634, 45000},
> + {3623, 50000},
> + {3611, 55000},
> + {3600, 60000},
> + {3588, 65000},
> + {3575, 70000},
> + {3563, 75000},
> + {3550, 80000},
> + {3537, 85000},
> + {3524, 90000},
> + {3510, 95000},
> + {3496, 100000},
> + {3482, 105000},
> + {3467, 110000},
> + {3452, 115000},
> + {3437, 120000},
> + {3421, 125000},
> + {0, 125000},
> +};
> +
> +static u32 rk_tsadcv2_temp_to_code(long temp)
> +{
> + int high, low, mid;
> +
> + low = 0;
> + high = ARRAY_SIZE(v2_code_table) - 1;
> + mid = (high + low) / 2;
> +
> + if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
> + return 0;
> +
> + while (low <= high) {
> + if (temp == v2_code_table[mid].temp)
> + return v2_code_table[mid].code;
> + else if (temp < v2_code_table[mid].temp)
> + high = mid - 1;
> + else
> + low = mid + 1;
> + mid = (low + high) / 2;
> + }
> +
> + return 0;
> +}
> +
> +static long rk_tsadcv2_code_to_temp(u32 code)
> +{
> + int high, low, mid;
> +
> + low = 0;
> + high = ARRAY_SIZE(v2_code_table) - 1;
> + mid = (high + low) / 2;
> +
> + if (code > v2_code_table[low].code || code < v2_code_table[high].code)
> + return 125000; /* No code available, return max temperature */
> +
> + while (low <= high) {
> + if (code >= v2_code_table[mid].code && code <
> + v2_code_table[mid - 1].code)
> + return v2_code_table[mid].temp;
> + else if (code < v2_code_table[mid].code)
> + low = mid + 1;
> + else
> + high = mid - 1;
> + mid = (low + high) / 2;
> + }
> +
> + return 125000;
> +}
> +
> +/**
> + * rk_tsadcv2_initialize - initialize TASDC Controller
> + * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
> + * every two accessing of TSADC in normal operation.
> + * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
> + * every two accessing of TSADC after the temperature is higher
> + * than COM_SHUT or COM_INT.
> + * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
> + * if the temperature is higher than COMP_INT or COMP_SHUT for
> + * "debounce" times, TSADC controller will generate interrupt or TSHUT.
> + */
> +static void rk_tsadcv2_initialize(void __iomem *regs,
> + enum tshut_polarity tshut_polarity)
> +{
> + if (tshut_polarity == TSHUT_HIGH_ACTIVE)
> + writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
> + regs + TSADCV2_AUTO_CON);
> + else
> + writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW),
> + regs + TSADCV2_AUTO_CON);
> +
> + writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
> + writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
> + regs + TSADCV2_HIGHT_INT_DEBOUNCE);
> + writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
> + regs + TSADCV2_AUTO_PERIOD_HT);
> + writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
> + regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
> +}
> +
> +static void rk_tsadcv2_irq_ack(void __iomem *regs)
> +{
> + u32 val;
> +
> + val = readl_relaxed(regs + TSADCV2_INT_PD);
> + writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
> +}
> +
> +static void rk_tsadcv2_control(void __iomem *regs, bool enable)
> +{
> + u32 val;
> +
> + val = readl_relaxed(regs + TSADCV2_AUTO_CON);
> + if (enable)
> + val |= TSADCV2_AUTO_EN;
> + else
> + val &= ~TSADCV2_AUTO_EN;
> +
> + writel_relaxed(val, regs + TSADCV2_AUTO_CON);
> +}
> +
> +static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
> +{
> + u32 val;
> +
> + /* the A/D value of the channel last conversion need some time */
> + val = readl_relaxed(regs + TSADCV2_DATA(chn));
> + if (val == 0)
> + return -EAGAIN;
> +
> + *temp = rk_tsadcv2_code_to_temp(val);
> +
> + return 0;
> +}
> +
> +static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
> +{
> + u32 alarm_value, int_en;
> +
> + alarm_value = rk_tsadcv2_temp_to_code(temp);
> + writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
> + regs + TSADCV2_COMP_INT(chn));
> +
> + int_en = readl_relaxed(regs + TSADCV2_INT_EN);
> + int_en |= TSADCV2_INT_SRC_EN(chn);
> + writel_relaxed(int_en, regs + TSADCV2_INT_EN);
> +}
> +
> +static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
> +{
> + u32 tshut_value, val;
> +
> + tshut_value = rk_tsadcv2_temp_to_code(temp);
> + writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
> +
> + /* TSHUT will be valid */
> + val = readl_relaxed(regs + TSADCV2_AUTO_CON);
> + writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
> +}
> +
> +static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
> + enum tshut_mode mode)
> +{
> + u32 val;
> +
> + val = readl_relaxed(regs + TSADCV2_INT_EN);
> + if (mode == TSHUT_MODE_GPIO) {
> + val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
> + val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
> + } else {
> + val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
> + val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
> + }
> +
> + writel_relaxed(val, regs + TSADCV2_INT_EN);
> +}
> +
> +static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
> + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> + .tshut_temp = 95000,
> +
> + .initialize = rk_tsadcv2_initialize,
> + .irq_ack = rk_tsadcv2_irq_ack,
> + .control = rk_tsadcv2_control,
> + .get_temp = rk_tsadcv2_get_temp,
> + .set_alarm_temp = rk_tsadcv2_alarm_temp,
> + .set_tshut_temp = rk_tsadcv2_tshut_temp,
> + .set_tshut_mode = rk_tsadcv2_tshut_mode,
> +};
> +
> +static const struct of_device_id of_rockchip_thermal_match[] = {
> + {
> + .compatible = "rockchip,rk3288-tsadc",
> + .data = (void *)&rk3288_tsadc_data,
> + },
> + { /* end */ },
> +};
> +MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
> +
> +static void
> +rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
> +{
> + struct thermal_zone_device *tzd = sensor->tzd;
> +
> + tzd->ops->set_mode(tzd,
> + on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
> +}
> +
> +static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
> +{
> + struct rockchip_thermal_data *thermal = dev;
> + int i;
> +
> + dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
> +
> + thermal->chip->irq_ack(thermal->regs);
> +
> + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
> + thermal_zone_device_update(thermal->sensors[i].tzd);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
> +{
> + struct rockchip_thermal_sensor *sensor = _sensor;
> + struct rockchip_thermal_data *thermal = sensor->thermal;
> + const struct rockchip_tsadc_chip *tsadc = thermal->chip;
> +
> + dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
> + __func__, sensor->id, low, high);
> +
> + tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
> +
> + return 0;
> +}
> +
> +static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
> +{
> + struct rockchip_thermal_sensor *sensor = _sensor;
> + struct rockchip_thermal_data *thermal = sensor->thermal;
> + const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
> + int retval;
> +
> + retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
> + dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
> + sensor->id, *out_temp, retval);
> +
> + return retval;
> +}
> +
> +static int rockchip_configure_from_dt(struct device *dev,
> + struct device_node *np,
> + struct rockchip_thermal_data *thermal)
> +{
> + u32 shut_temp, tshut_mode, tshut_polarity;
> +
> + if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
> + dev_warn(dev,
> + "Missing tshut temp property, using default %ld\n",
> + thermal->chip->tshut_temp);
> + thermal->tshut_temp = thermal->chip->tshut_temp;
> + } else {
> + thermal->tshut_temp = shut_temp;
> + }
> +
> + if (thermal->tshut_temp > INT_MAX) {
> + dev_err(dev, "Invalid tshut temperature specified: %ld\n",
> + thermal->tshut_temp);
> + return -ERANGE;
> + }
> +
> + if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
> + dev_warn(dev,
> + "Missing tshut mode property, using default (%s)\n",
> + thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
> + "gpio" : "cru");
> + thermal->tshut_mode = thermal->chip->tshut_mode;
> + } else {
> + thermal->tshut_mode = tshut_mode;
> + }
> +
> + if (thermal->tshut_mode > 1) {
> + dev_err(dev, "Invalid tshut mode specified: %d\n",
> + thermal->tshut_mode);
> + return -EINVAL;
> + }
> +
> + if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
> + &tshut_polarity)) {
> + dev_warn(dev,
> + "Missing tshut-polarity property, using default (%s)\n",
> + thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
> + "low" : "high");
> + thermal->tshut_polarity = thermal->chip->tshut_polarity;
> + } else {
> + thermal->tshut_polarity = tshut_polarity;
> + }
> +
> + if (thermal->tshut_polarity > 1) {
> + dev_err(dev, "Invalid tshut-polarity specified: %d\n",
> + thermal->tshut_polarity);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int
> +rockchip_thermal_register_sensor(struct platform_device *pdev,
> + struct rockchip_thermal_data *thermal,
> + struct rockchip_thermal_sensor *sensor,
> + enum sensor_id id)
> +{
> + const struct rockchip_tsadc_chip *tsadc = thermal->chip;
> + int error;
> +
> + tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
> + tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp);
> +
> + sensor->thermal = thermal;
> + sensor->id = id;
> + sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
> + rockchip_thermal_get_temp,
> + NULL,
> + rockchip_thermal_set_trips);
> + if (IS_ERR(sensor->tzd)) {
> + error = PTR_ERR(sensor->tzd);
> + dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
> + id, error);
> + return error;
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * Reset TSADC Controller, reset all tsadc registers.
> + */
> +static void rockchip_thermal_reset_controller(struct reset_control *reset)
> +{
> + reset_control_assert(reset);
> + usleep_range(10, 20);
> + reset_control_deassert(reset);
> +}
> +
> +static int rockchip_thermal_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct rockchip_thermal_data *thermal;
> + const struct of_device_id *match;
> + struct resource *res;
> + int irq;
> + int i;
> + int error;
> +
> + match = of_match_node(of_rockchip_thermal_match, np);
> + if (!match)
> + return -ENXIO;
> +
> + irq = platform_get_irq(pdev, 0);
> + if (irq < 0) {
> + dev_err(&pdev->dev, "no irq resource?\n");
> + return -EINVAL;
> + }
> +
> + thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
> + GFP_KERNEL);
> + if (!thermal)
> + return -ENOMEM;
> +
> + thermal->pdev = pdev;
> +
> + thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
> + if (!thermal->chip)
> + return -EINVAL;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + thermal->regs = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(thermal->regs))
> + return PTR_ERR(thermal->regs);
> +
> + thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
> + if (IS_ERR(thermal->reset)) {
> + error = PTR_ERR(thermal->reset);
> + dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
> + return error;
> + }
> +
> + thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
> + if (IS_ERR(thermal->clk)) {
> + error = PTR_ERR(thermal->clk);
> + dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
> + return error;
> + }
> +
> + thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
> + if (IS_ERR(thermal->pclk)) {
> + error = PTR_ERR(thermal->clk);
> + dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
> + error);
> + return error;
> + }
> +
> + error = clk_prepare_enable(thermal->clk);
> + if (error) {
> + dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
> + error);
> + return error;
> + }
> +
> + error = clk_prepare_enable(thermal->pclk);
> + if (error) {
> + dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
> + goto err_disable_clk;
> + }
> +
> + rockchip_thermal_reset_controller(thermal->reset);
> +
> + error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
> + if (error) {
> + dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
> + error);
> + goto err_disable_pclk;
> + }
> +
> + thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
> +
> + error = rockchip_thermal_register_sensor(pdev, thermal,
> + &thermal->sensors[0],
> + SENSOR_CPU);
> + if (error) {
> + dev_err(&pdev->dev,
> + "failed to register CPU thermal sensor: %d\n", error);
> + goto err_disable_pclk;
> + }
> +
> + error = rockchip_thermal_register_sensor(pdev, thermal,
> + &thermal->sensors[1],
> + SENSOR_GPU);
> + if (error) {
> + dev_err(&pdev->dev,
> + "failed to register GPU thermal sensor: %d\n", error);
> + goto err_unregister_cpu_sensor;
> + }
> +
> + error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
> + &rockchip_thermal_alarm_irq_thread,
> + IRQF_ONESHOT,
> + "rockchip_thermal", thermal);
> + if (error) {
> + dev_err(&pdev->dev,
> + "failed to request tsadc irq: %d\n", error);
> + goto err_unregister_gpu_sensor;
> + }
> +
> + thermal->chip->control(thermal->regs, true);
> +
> + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
> + rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
> +
> + platform_set_drvdata(pdev, thermal);
> +
> + return 0;
> +
> +err_unregister_gpu_sensor:
> + thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
> +err_unregister_cpu_sensor:
> + thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
> +err_disable_pclk:
> + clk_disable_unprepare(thermal->pclk);
> +err_disable_clk:
> + clk_disable_unprepare(thermal->clk);
> +
> + return error;
> +}
> +
> +static int rockchip_thermal_remove(struct platform_device *pdev)
> +{
> + struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
> + struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
> +
> + rockchip_thermal_toggle_sensor(sensor, false);
> + thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
> + }
> +
> + thermal->chip->control(thermal->regs, false);
> +
> + clk_disable_unprepare(thermal->pclk);
> + clk_disable_unprepare(thermal->clk);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
> +{
> + struct platform_device *pdev = to_platform_device(dev);
> + struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
> + rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
> +
> + thermal->chip->control(thermal->regs, false);
> +
> + clk_disable(thermal->pclk);
> + clk_disable(thermal->clk);
> +
> + return 0;
> +}
> +
> +static int __maybe_unused rockchip_thermal_resume(struct device *dev)
> +{
> + struct platform_device *pdev = to_platform_device(dev);
> + struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
> + int i;
> + int error;
> +
> + error = clk_enable(thermal->clk);
> + if (error)
> + return error;
> +
> + error = clk_enable(thermal->pclk);
> + if (error)
> + return error;
> +
> + rockchip_thermal_reset_controller(thermal->reset);
> +
> + thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
> +
> + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
> + enum sensor_id id = thermal->sensors[i].id;
> +
> + thermal->chip->set_tshut_mode(id, thermal->regs,
> + thermal->tshut_mode);
> + thermal->chip->set_tshut_temp(id, thermal->regs,
> + thermal->tshut_temp);
> + }
> +
> + thermal->chip->control(thermal->regs, true);
> +
> + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
> + rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
> +
> + return 0;
> +}
> +
> +static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
> + rockchip_thermal_suspend, rockchip_thermal_resume);
> +
> +static struct platform_driver rockchip_thermal_driver = {
> + .driver = {
> + .name = "rockchip-thermal",
> + .owner = THIS_MODULE,
> + .pm = &rockchip_thermal_pm_ops,
> + .of_match_table = of_rockchip_thermal_match,
> + },
> + .probe = rockchip_thermal_probe,
> + .remove = rockchip_thermal_remove,
> +};
> +
> +module_platform_driver(rockchip_thermal_driver);
> +
> +MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
> +MODULE_AUTHOR("Rockchip, Inc.");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:rockchip-thermal");
--
Best regards,
Caesar
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v18 2/5] thermal: rockchip: add driver for thermal
2014-11-18 7:41 ` Caesar Wang
@ 2014-11-18 15:03 ` Eduardo Valentin
0 siblings, 0 replies; 8+ messages in thread
From: Eduardo Valentin @ 2014-11-18 15:03 UTC (permalink / raw)
To: Caesar Wang
Cc: heiko, rui.zhang, zyf, dianders, linux-rockchip, linux-kernel,
linux-pm, linux-arm-kernel, devicetree, linux-doc, cf,
dmitry.torokhov, huangtao, fzf
[-- Attachment #1: Type: text/plain, Size: 26964 bytes --]
Hello Caesar,
On Tue, Nov 18, 2014 at 03:41:28PM +0800, Caesar Wang wrote:
> Hello edubezval,
>
> I saw your latest patch[0].
> I need send the new patch to fit the of-thermal Sensors API.
> Right?
>
> [0]: https://patchwork.kernel.org/patch/5324371/
>
Right. I've just posted a new version of it.
https://patchwork.kernel.org/patch/5329801/
But the main idea remains. So please, update you driver on top of it.
> 在 2014年11月12日 13:02, Caesar Wang 写道:
> > Thermal is TS-ADC Controller module supports
> > user-defined mode and automatic mode.
> >
> > User-defined mode refers,TSADC all the control signals entirely by
> > software writing to register for direct control.
> >
> > Automaic mode refers to the module automatically poll TSADC output,
> > and the results were checked.If you find that the temperature High
> > in a period of time,an interrupt is generated to the processor
> > down-measures taken;If the temperature over a period of time High,
> > the resulting TSHUT gave CRU module,let it reset the entire chip,
> > or via GPIO give PMIC.
> >
> > Signed-off-by: zhaoyifeng <zyf@rock-chips.com>
> > Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
> > Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
> > ---
> > drivers/thermal/Kconfig | 10 +
> > drivers/thermal/Makefile | 1 +
> > drivers/thermal/rockchip_thermal.c | 721 +++++++++++++++++++++++++++++++++++++
> > 3 files changed, 732 insertions(+)
> > create mode 100644 drivers/thermal/rockchip_thermal.c
> >
> > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
> > index ef5587f..527632d 100644
> > --- a/drivers/thermal/Kconfig
> > +++ b/drivers/thermal/Kconfig
> > @@ -133,6 +133,16 @@ config SPEAR_THERMAL
> > Enable this to plug the SPEAr thermal sensor driver into the Linux
> > thermal framework.
> >
> > +config ROCKCHIP_THERMAL
> > + tristate "Rockchip thermal driver"
> > + depends on ARCH_ROCKCHIP
> > + depends on RESET_CONTROLLER
> > + help
> > + Rockchip thermal driver provides support for Temperature sensor
> > + ADC (TS-ADC) found on Rockchip SoCs. It supports one critical
> > + trip point. Cpufreq is used as the cooling device and will throttle
> > + CPUs when the Temperature crosses the passive trip point.
> > +
> > config RCAR_THERMAL
> > tristate "Renesas R-Car thermal driver"
> > depends on ARCH_SHMOBILE || COMPILE_TEST
> > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
> > index 31e232f..21da0a8 100644
> > --- a/drivers/thermal/Makefile
> > +++ b/drivers/thermal/Makefile
> > @@ -19,6 +19,7 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o
> >
> > # platform thermal drivers
> > obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o
> > +obj-$(CONFIG_ROCKCHIP_THERMAL) += rockchip_thermal.o
> > obj-$(CONFIG_RCAR_THERMAL) += rcar_thermal.o
> > obj-$(CONFIG_KIRKWOOD_THERMAL) += kirkwood_thermal.o
> > obj-y += samsung/
> > diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> > new file mode 100644
> > index 0000000..524e3d6
> > --- /dev/null
> > +++ b/drivers/thermal/rockchip_thermal.c
> > @@ -0,0 +1,721 @@
> > +/*
> > + * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms and conditions of the GNU General Public License,
> > + * version 2, as published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope it will be useful, but WITHOUT
> > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
> > + * more details.
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/delay.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_irq.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/reset.h>
> > +#include <linux/thermal.h>
> > +
> > +/**
> > + * If the temperature over a period of time High,
> > + * the resulting TSHUT gave CRU module,let it reset the entire chip,
> > + * or via GPIO give PMIC.
> > + */
> > +enum tshut_mode {
> > + TSHUT_MODE_CRU = 0,
> > + TSHUT_MODE_GPIO,
> > +};
> > +
> > +/**
> > + * the system Temperature Sensors tshut(tshut) polarity
> > + * the bit 8 is tshut polarity.
> > + * 0: low active, 1: high active
> > + */
> > +enum tshut_polarity {
> > + TSHUT_LOW_ACTIVE = 0,
> > + TSHUT_HIGH_ACTIVE,
> > +};
> > +
> > +/**
> > + * The system has three Temperature Sensors. channel 0 is reserved,
> > + * channel 1 is for CPU, and channel 2 is for GPU.
> > + */
> > +enum sensor_id {
> > + SENSOR_CPU = 1,
> > + SENSOR_GPU,
> > +};
> > +
> > +struct rockchip_tsadc_chip {
> > + /* The hardware-controlled tshut property */
> > + long tshut_temp;
> > + enum tshut_mode tshut_mode;
> > + enum tshut_polarity tshut_polarity;
> > +
> > + /* Chip-wide methods */
> > + void (*initialize)(void __iomem *reg, enum tshut_polarity p);
> > + void (*irq_ack)(void __iomem *reg);
> > + void (*control)(void __iomem *reg, bool on);
> > +
> > + /* Per-sensor methods */
> > + int (*get_temp)(int chn, void __iomem *reg, long *temp);
> > + void (*set_alarm_temp)(int chn, void __iomem *reg, long temp);
> > + void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
> > + void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
> > +};
> > +
> > +struct rockchip_thermal_sensor {
> > + struct rockchip_thermal_data *thermal;
> > + struct thermal_zone_device *tzd;
> > + enum sensor_id id;
> > +};
> > +
> > +#define NUM_SENSORS 2 /* Ignore unused sensor 0 */
> > +
> > +struct rockchip_thermal_data {
> > + const struct rockchip_tsadc_chip *chip;
> > + struct platform_device *pdev;
> > + struct reset_control *reset;
> > +
> > + struct rockchip_thermal_sensor sensors[NUM_SENSORS];
> > +
> > + struct clk *clk;
> > + struct clk *pclk;
> > +
> > + void __iomem *regs;
> > +
> > + long tshut_temp;
> > + enum tshut_mode tshut_mode;
> > + enum tshut_polarity tshut_polarity;
> > +};
> > +
> > +/* TSADC V2 Sensor info define: */
> > +#define TSADCV2_AUTO_CON 0x04
> > +#define TSADCV2_INT_EN 0x08
> > +#define TSADCV2_INT_PD 0x0c
> > +#define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
> > +#define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
> > +#define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
> > +#define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
> > +#define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
> > +#define TSADCV2_AUTO_PERIOD 0x68
> > +#define TSADCV2_AUTO_PERIOD_HT 0x6c
> > +
> > +#define TSADCV2_AUTO_EN BIT(0)
> > +#define TSADCV2_AUTO_DISABLE ~BIT(0)
> > +#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
> > +#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
> > +#define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
> > +
> > +#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
> > +#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
> > +#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
> > +
> > +#define TSADCV2_INT_PD_CLEAR ~BIT(8)
> > +
> > +#define TSADCV2_DATA_MASK 0xfff
> > +#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
> > +#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
> > +#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
> > +#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
> > +
> > +struct tsadc_table {
> > + unsigned long code;
> > + long temp;
> > +};
> > +
> > +static const struct tsadc_table v2_code_table[] = {
> > + {TSADCV2_DATA_MASK, -40000},
> > + {3800, -40000},
> > + {3792, -35000},
> > + {3783, -30000},
> > + {3774, -25000},
> > + {3765, -20000},
> > + {3756, -15000},
> > + {3747, -10000},
> > + {3737, -5000},
> > + {3728, 0},
> > + {3718, 5000},
> > + {3708, 10000},
> > + {3698, 15000},
> > + {3688, 20000},
> > + {3678, 25000},
> > + {3667, 30000},
> > + {3656, 35000},
> > + {3645, 40000},
> > + {3634, 45000},
> > + {3623, 50000},
> > + {3611, 55000},
> > + {3600, 60000},
> > + {3588, 65000},
> > + {3575, 70000},
> > + {3563, 75000},
> > + {3550, 80000},
> > + {3537, 85000},
> > + {3524, 90000},
> > + {3510, 95000},
> > + {3496, 100000},
> > + {3482, 105000},
> > + {3467, 110000},
> > + {3452, 115000},
> > + {3437, 120000},
> > + {3421, 125000},
> > + {0, 125000},
> > +};
> > +
> > +static u32 rk_tsadcv2_temp_to_code(long temp)
> > +{
> > + int high, low, mid;
> > +
> > + low = 0;
> > + high = ARRAY_SIZE(v2_code_table) - 1;
> > + mid = (high + low) / 2;
> > +
> > + if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
> > + return 0;
> > +
> > + while (low <= high) {
> > + if (temp == v2_code_table[mid].temp)
> > + return v2_code_table[mid].code;
> > + else if (temp < v2_code_table[mid].temp)
> > + high = mid - 1;
> > + else
> > + low = mid + 1;
> > + mid = (low + high) / 2;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static long rk_tsadcv2_code_to_temp(u32 code)
> > +{
> > + int high, low, mid;
> > +
> > + low = 0;
> > + high = ARRAY_SIZE(v2_code_table) - 1;
> > + mid = (high + low) / 2;
> > +
> > + if (code > v2_code_table[low].code || code < v2_code_table[high].code)
> > + return 125000; /* No code available, return max temperature */
> > +
> > + while (low <= high) {
> > + if (code >= v2_code_table[mid].code && code <
> > + v2_code_table[mid - 1].code)
> > + return v2_code_table[mid].temp;
> > + else if (code < v2_code_table[mid].code)
> > + low = mid + 1;
> > + else
> > + high = mid - 1;
> > + mid = (low + high) / 2;
> > + }
> > +
> > + return 125000;
> > +}
> > +
> > +/**
> > + * rk_tsadcv2_initialize - initialize TASDC Controller
> > + * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
> > + * every two accessing of TSADC in normal operation.
> > + * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
> > + * every two accessing of TSADC after the temperature is higher
> > + * than COM_SHUT or COM_INT.
> > + * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
> > + * if the temperature is higher than COMP_INT or COMP_SHUT for
> > + * "debounce" times, TSADC controller will generate interrupt or TSHUT.
> > + */
> > +static void rk_tsadcv2_initialize(void __iomem *regs,
> > + enum tshut_polarity tshut_polarity)
> > +{
> > + if (tshut_polarity == TSHUT_HIGH_ACTIVE)
> > + writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
> > + regs + TSADCV2_AUTO_CON);
> > + else
> > + writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW),
> > + regs + TSADCV2_AUTO_CON);
> > +
> > + writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
> > + writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
> > + regs + TSADCV2_HIGHT_INT_DEBOUNCE);
> > + writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
> > + regs + TSADCV2_AUTO_PERIOD_HT);
> > + writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
> > + regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
> > +}
> > +
> > +static void rk_tsadcv2_irq_ack(void __iomem *regs)
> > +{
> > + u32 val;
> > +
> > + val = readl_relaxed(regs + TSADCV2_INT_PD);
> > + writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
> > +}
> > +
> > +static void rk_tsadcv2_control(void __iomem *regs, bool enable)
> > +{
> > + u32 val;
> > +
> > + val = readl_relaxed(regs + TSADCV2_AUTO_CON);
> > + if (enable)
> > + val |= TSADCV2_AUTO_EN;
> > + else
> > + val &= ~TSADCV2_AUTO_EN;
> > +
> > + writel_relaxed(val, regs + TSADCV2_AUTO_CON);
> > +}
> > +
> > +static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
> > +{
> > + u32 val;
> > +
> > + /* the A/D value of the channel last conversion need some time */
> > + val = readl_relaxed(regs + TSADCV2_DATA(chn));
> > + if (val == 0)
> > + return -EAGAIN;
> > +
> > + *temp = rk_tsadcv2_code_to_temp(val);
> > +
> > + return 0;
> > +}
> > +
> > +static void rk_tsadcv2_alarm_temp(int chn, void __iomem *regs, long temp)
> > +{
> > + u32 alarm_value, int_en;
> > +
> > + alarm_value = rk_tsadcv2_temp_to_code(temp);
> > + writel_relaxed(alarm_value & TSADCV2_DATA_MASK,
> > + regs + TSADCV2_COMP_INT(chn));
> > +
> > + int_en = readl_relaxed(regs + TSADCV2_INT_EN);
> > + int_en |= TSADCV2_INT_SRC_EN(chn);
> > + writel_relaxed(int_en, regs + TSADCV2_INT_EN);
> > +}
> > +
> > +static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
> > +{
> > + u32 tshut_value, val;
> > +
> > + tshut_value = rk_tsadcv2_temp_to_code(temp);
> > + writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
> > +
> > + /* TSHUT will be valid */
> > + val = readl_relaxed(regs + TSADCV2_AUTO_CON);
> > + writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
> > +}
> > +
> > +static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
> > + enum tshut_mode mode)
> > +{
> > + u32 val;
> > +
> > + val = readl_relaxed(regs + TSADCV2_INT_EN);
> > + if (mode == TSHUT_MODE_GPIO) {
> > + val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
> > + val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
> > + } else {
> > + val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
> > + val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
> > + }
> > +
> > + writel_relaxed(val, regs + TSADCV2_INT_EN);
> > +}
> > +
> > +static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
> > + .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
> > + .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
> > + .tshut_temp = 95000,
> > +
> > + .initialize = rk_tsadcv2_initialize,
> > + .irq_ack = rk_tsadcv2_irq_ack,
> > + .control = rk_tsadcv2_control,
> > + .get_temp = rk_tsadcv2_get_temp,
> > + .set_alarm_temp = rk_tsadcv2_alarm_temp,
> > + .set_tshut_temp = rk_tsadcv2_tshut_temp,
> > + .set_tshut_mode = rk_tsadcv2_tshut_mode,
> > +};
> > +
> > +static const struct of_device_id of_rockchip_thermal_match[] = {
> > + {
> > + .compatible = "rockchip,rk3288-tsadc",
> > + .data = (void *)&rk3288_tsadc_data,
> > + },
> > + { /* end */ },
> > +};
> > +MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
> > +
> > +static void
> > +rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
> > +{
> > + struct thermal_zone_device *tzd = sensor->tzd;
> > +
> > + tzd->ops->set_mode(tzd,
> > + on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
> > +}
> > +
> > +static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
> > +{
> > + struct rockchip_thermal_data *thermal = dev;
> > + int i;
> > +
> > + dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
> > +
> > + thermal->chip->irq_ack(thermal->regs);
> > +
> > + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
> > + thermal_zone_device_update(thermal->sensors[i].tzd);
> > +
> > + return IRQ_HANDLED;
> > +}
> > +
> > +static int rockchip_thermal_set_trips(void *_sensor, long low, long high)
> > +{
> > + struct rockchip_thermal_sensor *sensor = _sensor;
> > + struct rockchip_thermal_data *thermal = sensor->thermal;
> > + const struct rockchip_tsadc_chip *tsadc = thermal->chip;
> > +
> > + dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %ld, high %ld\n",
> > + __func__, sensor->id, low, high);
> > +
> > + tsadc->set_alarm_temp(sensor->id, thermal->regs, high);
> > +
> > + return 0;
> > +}
> > +
> > +static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
> > +{
> > + struct rockchip_thermal_sensor *sensor = _sensor;
> > + struct rockchip_thermal_data *thermal = sensor->thermal;
> > + const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
> > + int retval;
> > +
> > + retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
> > + dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
> > + sensor->id, *out_temp, retval);
> > +
> > + return retval;
> > +}
> > +
> > +static int rockchip_configure_from_dt(struct device *dev,
> > + struct device_node *np,
> > + struct rockchip_thermal_data *thermal)
> > +{
> > + u32 shut_temp, tshut_mode, tshut_polarity;
> > +
> > + if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
> > + dev_warn(dev,
> > + "Missing tshut temp property, using default %ld\n",
> > + thermal->chip->tshut_temp);
> > + thermal->tshut_temp = thermal->chip->tshut_temp;
> > + } else {
> > + thermal->tshut_temp = shut_temp;
> > + }
> > +
> > + if (thermal->tshut_temp > INT_MAX) {
> > + dev_err(dev, "Invalid tshut temperature specified: %ld\n",
> > + thermal->tshut_temp);
> > + return -ERANGE;
> > + }
> > +
> > + if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
> > + dev_warn(dev,
> > + "Missing tshut mode property, using default (%s)\n",
> > + thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
> > + "gpio" : "cru");
> > + thermal->tshut_mode = thermal->chip->tshut_mode;
> > + } else {
> > + thermal->tshut_mode = tshut_mode;
> > + }
> > +
> > + if (thermal->tshut_mode > 1) {
> > + dev_err(dev, "Invalid tshut mode specified: %d\n",
> > + thermal->tshut_mode);
> > + return -EINVAL;
> > + }
> > +
> > + if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
> > + &tshut_polarity)) {
> > + dev_warn(dev,
> > + "Missing tshut-polarity property, using default (%s)\n",
> > + thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
> > + "low" : "high");
> > + thermal->tshut_polarity = thermal->chip->tshut_polarity;
> > + } else {
> > + thermal->tshut_polarity = tshut_polarity;
> > + }
> > +
> > + if (thermal->tshut_polarity > 1) {
> > + dev_err(dev, "Invalid tshut-polarity specified: %d\n",
> > + thermal->tshut_polarity);
> > + return -EINVAL;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +rockchip_thermal_register_sensor(struct platform_device *pdev,
> > + struct rockchip_thermal_data *thermal,
> > + struct rockchip_thermal_sensor *sensor,
> > + enum sensor_id id)
> > +{
> > + const struct rockchip_tsadc_chip *tsadc = thermal->chip;
> > + int error;
> > +
> > + tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
> > + tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp);
> > +
> > + sensor->thermal = thermal;
> > + sensor->id = id;
> > + sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
> > + rockchip_thermal_get_temp,
> > + NULL,
> > + rockchip_thermal_set_trips);
The set_trips callback is not currently supported. And you also do not
mention about it. By having this dependency here, you either get the
patch, refresh it, and include in your patchset, or you would need to
wait until that change gets refreshed, reviewed, and merged.
> > + if (IS_ERR(sensor->tzd)) {
> > + error = PTR_ERR(sensor->tzd);
> > + dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
> > + id, error);
> > + return error;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +/*
> > + * Reset TSADC Controller, reset all tsadc registers.
> > + */
> > +static void rockchip_thermal_reset_controller(struct reset_control *reset)
> > +{
> > + reset_control_assert(reset);
> > + usleep_range(10, 20);
> > + reset_control_deassert(reset);
> > +}
> > +
> > +static int rockchip_thermal_probe(struct platform_device *pdev)
> > +{
> > + struct device_node *np = pdev->dev.of_node;
> > + struct rockchip_thermal_data *thermal;
> > + const struct of_device_id *match;
> > + struct resource *res;
> > + int irq;
> > + int i;
> > + int error;
> > +
> > + match = of_match_node(of_rockchip_thermal_match, np);
> > + if (!match)
> > + return -ENXIO;
> > +
> > + irq = platform_get_irq(pdev, 0);
> > + if (irq < 0) {
> > + dev_err(&pdev->dev, "no irq resource?\n");
> > + return -EINVAL;
> > + }
> > +
> > + thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
> > + GFP_KERNEL);
> > + if (!thermal)
> > + return -ENOMEM;
> > +
> > + thermal->pdev = pdev;
> > +
> > + thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
> > + if (!thermal->chip)
> > + return -EINVAL;
> > +
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + thermal->regs = devm_ioremap_resource(&pdev->dev, res);
> > + if (IS_ERR(thermal->regs))
> > + return PTR_ERR(thermal->regs);
> > +
> > + thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
> > + if (IS_ERR(thermal->reset)) {
> > + error = PTR_ERR(thermal->reset);
> > + dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
> > + return error;
> > + }
> > +
> > + thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
> > + if (IS_ERR(thermal->clk)) {
> > + error = PTR_ERR(thermal->clk);
> > + dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
> > + return error;
> > + }
> > +
> > + thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
> > + if (IS_ERR(thermal->pclk)) {
> > + error = PTR_ERR(thermal->clk);
> > + dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
> > + error);
> > + return error;
> > + }
> > +
> > + error = clk_prepare_enable(thermal->clk);
> > + if (error) {
> > + dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
> > + error);
> > + return error;
> > + }
> > +
> > + error = clk_prepare_enable(thermal->pclk);
> > + if (error) {
> > + dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
> > + goto err_disable_clk;
> > + }
> > +
> > + rockchip_thermal_reset_controller(thermal->reset);
> > +
> > + error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
> > + if (error) {
> > + dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
> > + error);
> > + goto err_disable_pclk;
> > + }
> > +
> > + thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
> > +
> > + error = rockchip_thermal_register_sensor(pdev, thermal,
> > + &thermal->sensors[0],
> > + SENSOR_CPU);
> > + if (error) {
> > + dev_err(&pdev->dev,
> > + "failed to register CPU thermal sensor: %d\n", error);
> > + goto err_disable_pclk;
> > + }
> > +
> > + error = rockchip_thermal_register_sensor(pdev, thermal,
> > + &thermal->sensors[1],
> > + SENSOR_GPU);
> > + if (error) {
> > + dev_err(&pdev->dev,
> > + "failed to register GPU thermal sensor: %d\n", error);
> > + goto err_unregister_cpu_sensor;
> > + }
> > +
> > + error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
> > + &rockchip_thermal_alarm_irq_thread,
> > + IRQF_ONESHOT,
> > + "rockchip_thermal", thermal);
> > + if (error) {
> > + dev_err(&pdev->dev,
> > + "failed to request tsadc irq: %d\n", error);
> > + goto err_unregister_gpu_sensor;
> > + }
> > +
> > + thermal->chip->control(thermal->regs, true);
> > +
> > + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
> > + rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
> > +
> > + platform_set_drvdata(pdev, thermal);
> > +
> > + return 0;
> > +
> > +err_unregister_gpu_sensor:
> > + thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
> > +err_unregister_cpu_sensor:
> > + thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
> > +err_disable_pclk:
> > + clk_disable_unprepare(thermal->pclk);
> > +err_disable_clk:
> > + clk_disable_unprepare(thermal->clk);
> > +
> > + return error;
> > +}
> > +
> > +static int rockchip_thermal_remove(struct platform_device *pdev)
> > +{
> > + struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
> > + int i;
> > +
> > + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
> > + struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
> > +
> > + rockchip_thermal_toggle_sensor(sensor, false);
> > + thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
> > + }
> > +
> > + thermal->chip->control(thermal->regs, false);
> > +
> > + clk_disable_unprepare(thermal->pclk);
> > + clk_disable_unprepare(thermal->clk);
> > +
> > + return 0;
> > +}
> > +
> > +static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
> > +{
> > + struct platform_device *pdev = to_platform_device(dev);
> > + struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
> > + int i;
> > +
> > + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
> > + rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
> > +
> > + thermal->chip->control(thermal->regs, false);
> > +
> > + clk_disable(thermal->pclk);
> > + clk_disable(thermal->clk);
> > +
> > + return 0;
> > +}
> > +
> > +static int __maybe_unused rockchip_thermal_resume(struct device *dev)
> > +{
> > + struct platform_device *pdev = to_platform_device(dev);
> > + struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
> > + int i;
> > + int error;
> > +
> > + error = clk_enable(thermal->clk);
> > + if (error)
> > + return error;
> > +
> > + error = clk_enable(thermal->pclk);
> > + if (error)
> > + return error;
> > +
> > + rockchip_thermal_reset_controller(thermal->reset);
> > +
> > + thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
> > +
> > + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
> > + enum sensor_id id = thermal->sensors[i].id;
> > +
> > + thermal->chip->set_tshut_mode(id, thermal->regs,
> > + thermal->tshut_mode);
> > + thermal->chip->set_tshut_temp(id, thermal->regs,
> > + thermal->tshut_temp);
> > + }
> > +
> > + thermal->chip->control(thermal->regs, true);
> > +
> > + for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
> > + rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
> > +
> > + return 0;
> > +}
> > +
> > +static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
> > + rockchip_thermal_suspend, rockchip_thermal_resume);
> > +
> > +static struct platform_driver rockchip_thermal_driver = {
> > + .driver = {
> > + .name = "rockchip-thermal",
> > + .owner = THIS_MODULE,
> > + .pm = &rockchip_thermal_pm_ops,
> > + .of_match_table = of_rockchip_thermal_match,
> > + },
> > + .probe = rockchip_thermal_probe,
> > + .remove = rockchip_thermal_remove,
> > +};
> > +
> > +module_platform_driver(rockchip_thermal_driver);
> > +
> > +MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
> > +MODULE_AUTHOR("Rockchip, Inc.");
> > +MODULE_LICENSE("GPL v2");
> > +MODULE_ALIAS("platform:rockchip-thermal");
>
> --
> Best regards,
> Caesar
>
>
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 473 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2014-11-18 15:03 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-11-12 5:02 [PATCH v18 0/5] Rockchip soc thermal driver Caesar Wang
2014-11-12 5:02 ` [PATCH v18 1/5] dt-bindings: document Rockchip thermal Caesar Wang
2014-11-12 5:02 ` [PATCH v18 2/5] thermal: rockchip: add driver for thermal Caesar Wang
2014-11-18 7:41 ` Caesar Wang
2014-11-18 15:03 ` Eduardo Valentin
2014-11-12 5:02 ` [PATCH v18 3/5] ARM: dts: add RK3288 Thermal data Caesar Wang
2014-11-12 5:02 ` [PATCH v18 4/5] ARM: dts: add main Thermal info to rk3288 Caesar Wang
2014-11-12 5:02 ` [PATCH v18 5/5] ARM: dts: enable Thermal on rk3288-evb board Caesar Wang
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).