linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Liu Ying <Ying.Liu@freescale.com>
To: <dri-devel@lists.freedesktop.org>
Cc: <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <linux@arm.linux.org.uk>,
	<kernel@pengutronix.de>, <p.zabel@pengutronix.de>,
	<thierry.reding@gmail.com>, <shawn.guo@linaro.org>,
	<mturquette@linaro.org>, <airlied@linux.ie>, <andyshrk@gmail.com>,
	<stefan.wahren@i2se.com>, <a.hajda@samsung.com>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH RFC v8 08/21] ARM: imx6q: clk: Add support for mipi_core_cfg clock as a shared clock gate
Date: Wed, 31 Dec 2014 16:23:26 +0800	[thread overview]
Message-ID: <1420014219-915-9-git-send-email-Ying.Liu@freescale.com> (raw)
In-Reply-To: <1420014219-915-1-git-send-email-Ying.Liu@freescale.com>

The CG8 field of the CCM CCGR3 register is named as 'mipi_core_cfg' clock,
according to the i.MX6q/sdl reference manuals.  This clock is actually the
gate for several clocks, including the hsi_tx_sel clock's output and the
video_27m clock's output.  The MIPI DSI host controller embedded in the
i.MX6q/sdl SoCs uses the video_27m clock to generate PLL reference clock and
MIPI core configuration clock.  In order to gate/ungate the two MIPI DSI
host controller relevant clocks, this patch adds the mipi_core_cfg clock as
a shared clock gate.

Suggested-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
---
v7->v8:
 * None.

v6->v7:
 * None.

v5->v6:
 * Add two spaces in the clock driver to eliminate two errors reported by
   the checkpatch.pl script.

v4->v5:
 * None.

v3->v4:
 * None.

v2->v3:
 * Newly introduced in v3.

 arch/arm/mach-imx/clk-imx6q.c             | 1 +
 include/dt-bindings/clock/imx6qdl-clock.h | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 080d5b7..0f4d07c 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -418,6 +418,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
 	clk[IMX6QDL_CLK_LDB_DI1]      = imx_clk_gate2("ldb_di1",       "ldb_di1_podf",      base + 0x74, 14);
 	clk[IMX6QDL_CLK_IPU2_DI1]     = imx_clk_gate2("ipu2_di1",      "ipu2_di1_sel",      base + 0x74, 10);
 	clk[IMX6QDL_CLK_HSI_TX]       = imx_clk_gate2_shared("hsi_tx", "hsi_tx_podf",       base + 0x74, 16, &share_count_mipi_core_cfg);
+	clk[IMX6QDL_CLK_MIPI_CORE_CFG] = imx_clk_gate2_shared("mipi_core_cfg", "video_27m", base + 0x74, 16, &share_count_mipi_core_cfg);
 	if (cpu_is_imx6dl())
 		/*
 		 * The multiplexer and divider of the imx6q clock gpu2d get
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index 25625bf..dbc828c 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -249,6 +249,7 @@
 #define IMX6QDL_PLL7_BYPASS			236
 #define IMX6QDL_CLK_GPT_3M			237
 #define IMX6QDL_CLK_VIDEO_27M			238
-#define IMX6QDL_CLK_END				239
+#define IMX6QDL_CLK_MIPI_CORE_CFG		239
+#define IMX6QDL_CLK_END				240
 
 #endif /* __DT_BINDINGS_CLOCK_IMX6QDL_H */
-- 
2.1.0


  parent reply	other threads:[~2014-12-31  8:20 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-31  8:23 [PATCH RFC v8 00/21] Add support for i.MX MIPI DSI DRM driver Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 01/21] clk: divider: Correct parent clk round rate if no bestdiv is normally found Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 02/21] of: Add vendor prefix for Himax Technologies Inc Liu Ying
2015-02-04 16:02   ` Rob Herring
2015-02-05  2:20     ` Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 03/21] of: Add vendor prefix for Truly Semiconductors Limited Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 04/21] ARM: imx6q: Add GPR3 MIPI muxing control register field shift bits definition Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 05/21] ARM: imx6q: clk: Add the video_27m clock Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 06/21] ARM: imx6q: clk: Change hdmi_isfr clock's parent to be " Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 07/21] ARM: imx6q: clk: Change hsi_tx clock to be a shared clock gate Liu Ying
2014-12-31  8:23 ` Liu Ying [this message]
2014-12-31  8:23 ` [PATCH RFC v8 09/21] ARM: dts: imx6qdl: Move existing MIPI DSI ports into a new 'ports' node Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 10/21] drm/dsi: Add a helper to get bits per pixel of MIPI DSI pixel format Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 11/21] Documentation: dt-bindings: Add bindings for Synopsys DW MIPI DSI DRM bridge driver Liu Ying
2015-02-05 10:10   ` Philipp Zabel
2015-02-06  8:13     ` Liu Ying
2015-02-11  7:21       ` Liu Ying
2015-02-11 13:00         ` Philipp Zabel
2015-02-11 14:09           ` Liu Ying
2015-02-11 15:23             ` Philipp Zabel
2015-02-12  2:14               ` Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 12/21] drm/bridge: Add Synopsys DesignWare MIPI DSI host controller driver Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 13/21] Documentation: dt-bindings: Add bindings for i.MX specific Synopsys DW MIPI DSI driver Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 14/21] drm: imx: Support Synopsys DesignWare MIPI DSI host controller Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 15/21] Documentation: dt-bindings: Add bindings for Himax HX8369A DRM panel driver Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 16/21] drm: panel: Add support for Himax HX8369A MIPI DSI panel Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 17/21] ARM: dtsi: imx6qdl: Add support for MIPI DSI host controller Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 18/21] ARM: dts: imx6qdl-sabresd: Add support for TRULY TFT480800-16-E MIPI DSI panel Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 19/21] ARM: imx_v6_v7_defconfig: Cleanup for imx drm being moved out of staging Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 20/21] ARM: imx_v6_v7_defconfig: Add support for MIPI DSI host controller Liu Ying
2014-12-31  8:23 ` [PATCH RFC v8 21/21] ARM: imx_v6_v7_defconfig: Add support for Himax HX8369A panel Liu Ying
2015-02-02  2:17 ` [PATCH RFC v8 00/21] Add support for i.MX MIPI DSI DRM driver Liu Ying
2015-02-02  5:34   ` Liu Ying

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1420014219-915-9-git-send-email-Ying.Liu@freescale.com \
    --to=ying.liu@freescale.com \
    --cc=a.hajda@samsung.com \
    --cc=airlied@linux.ie \
    --cc=andyshrk@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=kernel@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=mturquette@linaro.org \
    --cc=p.zabel@pengutronix.de \
    --cc=shawn.guo@linaro.org \
    --cc=stefan.wahren@i2se.com \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).