From: Jiang Liu <jiang.liu@linux.intel.com>
To: Bjorn Helgaas <bhelgaas@google.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Randy Dunlap <rdunlap@infradead.org>,
Yinghai Lu <yinghai@kernel.org>, Borislav Petkov <bp@alien8.de>,
Dimitri Sivanich <sivanich@sgi.com>,
x86@kernel.org, Jiang Liu <jiang.liu@linux.intel.com>,
Grant Likely <grant.likely@linaro.org>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
David Cohen <david.a.cohen@linux.intel.com>,
Sander Eikelenboom <linux@eikelenboom.it>,
David Vrabel <david.vrabel@citrix.com>,
Andrew Morton <akpm@linux-foundation.org>,
Tony Luck <tony.luck@intel.com>, Joerg Roedel <joro@8bytes.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org
Subject: [Patch Part2 v5 29/33] x86, ioapic: Use proper defines for the entry fields
Date: Tue, 14 Apr 2015 10:30:06 +0800 [thread overview]
Message-ID: <1428978610-28986-30-git-send-email-jiang.liu@linux.intel.com> (raw)
In-Reply-To: <1428978610-28986-1-git-send-email-jiang.liu@linux.intel.com>
From: Thomas Gleixner <tglx@linutronix.de>
While looking at the printout issue, I stumbled more than once over
the various 0/1 assignments which are either commented in strange ways
or force to lookup the meaning.
Use proper constants and fix the misleading comments. While at it
remove pointless 0 assignments in native_disable_io_apic() which have
no value for understanding the code.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: x86@kernel.org
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
arch/x86/include/asm/io_apic.h | 16 +++++--
arch/x86/kernel/apic/io_apic.c | 100 ++++++++++++++++++++--------------------
2 files changed, 63 insertions(+), 53 deletions(-)
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index cca97c961641..53a70a30b674 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -98,9 +98,19 @@ struct IR_IO_APIC_route_entry {
struct irq_alloc_info;
struct irq_data;
-#define IOAPIC_AUTO -1
-#define IOAPIC_EDGE 0
-#define IOAPIC_LEVEL 1
+#define IOAPIC_AUTO -1
+#define IOAPIC_EDGE 0
+#define IOAPIC_LEVEL 1
+
+#define IOAPIC_MASKED 1
+#define IOAPIC_UNMASKED 0
+
+#define IOAPIC_POL_HIGH 0
+#define IOAPIC_POL_LOW 1
+
+#define IOAPIC_DEST_MODE_PHYSICAL 0
+#define IOAPIC_DEST_MODE_LOGICAL 1
+
#define IOAPIC_MAP_ALLOC 0x1
#define IOAPIC_MAP_CHECK 0x2
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 71971b89da59..cf42a6adf9c0 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -356,7 +356,7 @@ static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
static void ioapic_mask_entry(int apic, int pin)
{
unsigned long flags;
- union entry_union eu = { .entry.mask = 1 };
+ union entry_union eu = { .entry.mask = IOAPIC_MASKED };
raw_spin_lock_irqsave(&ioapic_lock, flags);
io_apic_write(apic, 0x10 + 2*pin, eu.w1);
@@ -517,7 +517,7 @@ static void __eoi_ioapic_pin(int apic, int pin, int vector)
/*
* Mask the entry and change the trigger mode to edge.
*/
- entry1.mask = 1;
+ entry1.mask = IOAPIC_MASKED;
entry1.trigger = IOAPIC_EDGE;
__ioapic_write_entry(apic, pin, entry1);
@@ -553,8 +553,8 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
* Make sure the entry is masked and re-read the contents to check
* if it is a level triggered pin and if the remote-IRR is set.
*/
- if (!entry.mask) {
- entry.mask = 1;
+ if (entry.mask == IOAPIC_UNMASKED) {
+ entry.mask = IOAPIC_MASKED;
ioapic_write_entry(apic, pin, entry);
entry = ioapic_read_entry(apic, pin);
}
@@ -567,7 +567,7 @@ static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
* doesn't clear the remote-IRR if the trigger mode is not
* set to level.
*/
- if (!entry.trigger) {
+ if (entry.trigger == IOAPIC_EDGE) {
entry.trigger = IOAPIC_LEVEL;
ioapic_write_entry(apic, pin, entry);
}
@@ -670,8 +670,8 @@ void mask_ioapic_entries(void)
struct IO_APIC_route_entry entry;
entry = ioapics[apic].saved_registers[pin];
- if (!entry.mask) {
- entry.mask = 1;
+ if (entry.mask == IOAPIC_UNMASKED) {
+ entry.mask = IOAPIC_MASKED;
ioapic_write_entry(apic, pin, entry);
}
}
@@ -773,11 +773,11 @@ static int EISA_ELCR(unsigned int irq)
#endif
-/* ISA interrupts are always polarity zero edge triggered,
+/* ISA interrupts are always active high edge triggered,
* when listed as conforming in the MP table. */
-#define default_ISA_trigger(idx) (0)
-#define default_ISA_polarity(idx) (0)
+#define default_ISA_trigger(idx) (IOAPIC_EDGE)
+#define default_ISA_polarity(idx) (IOAPIC_POL_HIGH)
/* EISA interrupts are always polarity zero and can be edge or level
* trigger depending on the ELCR value. If an interrupt is listed as
@@ -787,11 +787,11 @@ static int EISA_ELCR(unsigned int irq)
#define default_EISA_trigger(idx) (EISA_ELCR(mp_irqs[idx].srcbusirq))
#define default_EISA_polarity(idx) default_ISA_polarity(idx)
-/* PCI interrupts are always polarity one level triggered,
+/* PCI interrupts are always active low level triggered,
* when listed as conforming in the MP table. */
-#define default_PCI_trigger(idx) (1)
-#define default_PCI_polarity(idx) (1)
+#define default_PCI_trigger(idx) (IOAPIC_LEVEL)
+#define default_PCI_polarity(idx) (IOAPIC_POL_LOW)
static int irq_polarity(int idx)
{
@@ -811,24 +811,24 @@ static int irq_polarity(int idx)
break;
case 1: /* high active */
{
- polarity = 0;
+ polarity = IOAPIC_POL_HIGH;
break;
}
case 2: /* reserved */
{
pr_warn("broken BIOS!!\n");
- polarity = 1;
+ polarity = IOAPIC_POL_LOW;
break;
}
case 3: /* low active */
{
- polarity = 1;
+ polarity = IOAPIC_POL_LOW;
break;
}
default: /* invalid */
{
pr_warn("broken BIOS!!\n");
- polarity = 1;
+ polarity = IOAPIC_POL_LOW;
break;
}
}
@@ -870,7 +870,7 @@ static int irq_trigger(int idx)
default:
{
pr_warn("broken BIOS!!\n");
- trigger = 1;
+ trigger = IOAPIC_LEVEL;
break;
}
}
@@ -878,24 +878,24 @@ static int irq_trigger(int idx)
break;
case 1: /* edge */
{
- trigger = 0;
+ trigger = IOAPIC_EDGE;
break;
}
case 2: /* reserved */
{
pr_warn("broken BIOS!!\n");
- trigger = 1;
+ trigger = IOAPIC_LEVEL;
break;
}
case 3: /* level */
{
- trigger = 1;
+ trigger = IOAPIC_LEVEL;
break;
}
default: /* invalid */
{
pr_warn("broken BIOS!!\n");
- trigger = 0;
+ trigger = IOAPIC_EDGE;
break;
}
}
@@ -939,11 +939,11 @@ static void ioapic_copy_alloc_attr(struct irq_alloc_info *dst,
dst->ioapic_polarity = polarity;
} else {
/*
- * PCI interrupts are always polarity one level
+ * PCI interrupts are always active low level
* triggered.
*/
- dst->ioapic_trigger = 1;
- dst->ioapic_polarity = 1;
+ dst->ioapic_trigger = IOAPIC_LEVEL;
+ dst->ioapic_polarity = IOAPIC_POL_LOW;
}
}
}
@@ -1296,9 +1296,10 @@ static void io_apic_print_entries(unsigned int apic, unsigned int nr_entries)
entry = ioapic_read_entry(apic, i);
snprintf(buf, sizeof(buf),
" pin%02x, %s, %s, %s, V(%02X), IRR(%1d), S(%1d)",
- i, entry.mask ? "disabled" : "enabled ",
- entry.trigger ? "level" : "edge ",
- entry.polarity ? "low " : "high",
+ i,
+ entry.mask == IOAPIC_MASKED ? "disabled" : "enabled ",
+ entry.trigger == IOAPIC_LEVEL ? "level" : "edge ",
+ entry.polarity == IOAPIC_POL_LOW ? "low " : "high",
entry.vector, entry.irr, entry.delivery_status);
if (ir_entry->format)
printk(KERN_DEBUG "%s, remapped, I(%04X), Z(%X)\n",
@@ -1306,7 +1307,9 @@ static void io_apic_print_entries(unsigned int apic, unsigned int nr_entries)
ir_entry->zero);
else
printk(KERN_DEBUG "%s, %s, D(%02X), M(%1d)\n",
- buf, entry.dest_mode ? "logical " : "physical",
+ buf,
+ entry.dest_mode == IOAPIC_DEST_MODE_LOGICAL ?
+ "logical " : "physical",
entry.dest, entry.delivery_mode);
}
}
@@ -1476,15 +1479,12 @@ void native_disable_io_apic(void)
struct IO_APIC_route_entry entry;
memset(&entry, 0, sizeof(entry));
- entry.mask = 0; /* Enabled */
- entry.trigger = 0; /* Edge */
- entry.irr = 0;
- entry.polarity = 0; /* High */
- entry.delivery_status = 0;
- entry.dest_mode = 0; /* Physical */
- entry.delivery_mode = dest_ExtINT; /* ExtInt */
- entry.vector = 0;
- entry.dest = read_apic_id();
+ entry.mask = IOAPIC_UNMASKED;
+ entry.trigger = IOAPIC_EDGE;
+ entry.polarity = IOAPIC_POL_HIGH;
+ entry.dest_mode = IOAPIC_DEST_MODE_PHYSICAL;
+ entry.delivery_mode = dest_ExtINT;
+ entry.dest = read_apic_id();
/*
* Add it to the IO-APIC irq-routing table:
@@ -1494,7 +1494,6 @@ void native_disable_io_apic(void)
if (cpu_has_apic || apic_from_smp_config())
disconnect_bsp_APIC(ioapic_i8259.pin != -1);
-
}
/*
@@ -2018,12 +2017,12 @@ static inline void __init unlock_ExtINT_logic(void)
memset(&entry1, 0, sizeof(entry1));
- entry1.dest_mode = 0; /* physical delivery */
- entry1.mask = 0; /* unmask IRQ now */
+ entry1.dest_mode = IOAPIC_DEST_MODE_PHYSICAL;
+ entry1.mask = IOAPIC_UNMASKED;
entry1.dest = hard_smp_processor_id();
entry1.delivery_mode = dest_ExtINT;
entry1.polarity = entry0.polarity;
- entry1.trigger = 0;
+ entry1.trigger = IOAPIC_EDGE;
entry1.vector = 0;
ioapic_write_entry(apic, pin, entry1);
@@ -2911,9 +2910,9 @@ static void mp_irqdomain_get_attr(u32 gsi, struct mp_chip_data *data,
data->polarity = info->ioapic_polarity;
} else if (acpi_get_override_irq(gsi, &data->trigger,
&data->polarity) < 0) {
- /* PCI interrupts are always polarity one level triggered. */
- data->trigger = 1;
- data->polarity = 1;
+ /* PCI interrupts are always active low level triggered. */
+ data->trigger = IOAPIC_LEVEL;
+ data->polarity = IOAPIC_POL_LOW;
}
}
@@ -2925,15 +2924,16 @@ static void mp_setup_entry(struct irq_cfg *cfg, struct mp_chip_data *data,
entry->dest_mode = apic->irq_dest_mode;
entry->dest = cfg->dest_apicid;
entry->vector = cfg->vector;
- entry->mask = 0; /* enable IRQ */
entry->trigger = data->trigger;
entry->polarity = data->polarity;
/*
- * Mask level triggered irqs.
- * Use IRQ_DELAYED_DISABLE for edge triggered irqs.
+ * Mask level triggered irqs. Edge triggered irqs are masked
+ * by the irq core code in case they fire.
*/
- if (data->trigger)
- entry->mask = 1;
+ if (data->trigger == IOAPIC_LEVEL)
+ entry->mask = IOAPIC_MASKED;
+ else
+ entry->mask = IOAPIC_UNMASKED;
}
int mp_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
--
1.7.10.4
next prev parent reply other threads:[~2015-04-14 2:34 UTC|newest]
Thread overview: 157+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-14 2:29 [Patch Part2 v5 00/33] Clean up obsoleted x86 interrupt manangement code and interfaces Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 01/33] x86/irq: Kill unused old IOAPIC irqdomain interfaces Jiang Liu
2015-04-24 15:54 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 02/33] x86/irq: Kill unused struct mp_pin_info Jiang Liu
2015-04-24 15:54 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 03/33] x86/irq: Kill x86_io_apic_ops.print_entries and related interfaces Jiang Liu
2015-04-24 15:55 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 04/33] x86/irq: Kill x86_io_apic_ops.setup_entry " Jiang Liu
2015-04-24 15:55 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 05/33] x86/irq: Kill x86_io_apic_ops.set_affinity " Jiang Liu
2015-04-24 15:55 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 06/33] x86/irq: Kill x86_io_apic_ops.eoi_ioapic_pin " Jiang Liu
2015-04-24 15:56 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 07/33] x86/irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ Jiang Liu
2015-04-24 15:56 ` [tip:x86/apic] x86/irq: Remove GENERIC_IRQ_LEGACY_ALLOC_HWIRQ tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 08/33] x86/irq: Clean up unused forward declarations in x86_init.h Jiang Liu
2015-04-24 15:56 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 09/33] irq_remapping: Clean up unsued code to support IOAPIC Jiang Liu
2015-04-24 15:56 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 10/33] irq_remapping/vt-d: Clean up unsued code Jiang Liu
2015-04-24 15:57 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 11/33] irq_remapping/amd: " Jiang Liu
2015-04-24 15:57 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 12/33] irq_remapping: Clean up unused interfaces Jiang Liu
2015-04-24 15:57 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 13/33] x86/irq: Kill irq_cfg.irq_remapped Jiang Liu
2015-04-24 15:58 ` [tip:x86/apic] x86/irq: Remove irq_cfg.irq_remapped tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 14/33] irq_remapping/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c Jiang Liu
2015-04-24 15:58 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 15/33] irq_remapping/amd: Move struct irq_2_irte into amd_iommu.c Jiang Liu
2015-04-24 15:58 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 16/33] x86/irq: Move irq_cfg.irq_2_pin into io_apic.c Jiang Liu
2015-04-24 15:58 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 17/33] x86/irq: Kill struct io_apic_irq_attr Jiang Liu
2015-04-24 15:59 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 18/33] x86/irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify Jiang Liu
2015-04-24 15:59 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 19/33] x86/irq: Clean up io_apic.h Jiang Liu
2015-04-24 16:00 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 20/33] x86/irq: Use cached IOAPIC entry instead of reading from hardware Jiang Liu
2015-04-24 16:00 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:29 ` [Patch Part2 v5 21/33] x86/irq: Remove sis apic bug workaround Jiang Liu
2015-04-24 16:00 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2015-04-14 2:29 ` [Patch Part2 v5 22/33] x86/irq: Kill unused alloc_irq_and_cfg_at() Jiang Liu
2015-04-24 16:00 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:30 ` [Patch Part2 v5 23/33] x86/irq: Change functions only used in vector.c as static Jiang Liu
2015-04-24 16:01 ` [tip:x86/apic] x86/irq: Make functions only used in vector.c static tip-bot for Jiang Liu
2015-04-14 2:30 ` [Patch Part2 v5 24/33] x86/irq: Kill function apic_set_affinity() Jiang Liu
2015-04-24 16:01 ` [tip:x86/apic] x86/irq: Remove " tip-bot for Jiang Liu
2015-04-14 2:30 ` [Patch Part2 v5 25/33] x86/irq: Move check of cfg->move_in_progress into send_cleanup_vector() Jiang Liu
2015-04-24 16:01 ` [tip:x86/apic] x86/irq: Move check of cfg-> move_in_progress " tip-bot for Jiang Liu
2015-04-14 2:30 ` [Patch Part2 v5 26/33] x86/irq: Move private data in struct irq_cfg into dedicated data structure Jiang Liu
2015-04-14 2:30 ` [Patch Part2 v5 27/33] x86/irq: Refine the way to calculate NR_IRQS Jiang Liu
2015-04-24 16:02 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-14 2:30 ` [Patch Part2 v5 28/33] x86/irq, ACPI: Kill private function mp_register_gsi()/ mp_unregister_gsi() Jiang Liu
2015-04-24 16:02 ` [tip:x86/apic] x86/irq, ACPI: Remove " tip-bot for Jiang Liu
2015-04-14 2:30 ` Jiang Liu [this message]
2015-04-24 16:02 ` [tip:x86/apic] x86, ioapic: Use proper defines for the entry fields tip-bot for Thomas Gleixner
2015-04-14 2:30 ` [Patch Part2 v5 30/33] x86,ioapic: Cleanup irq_trigger/polarity() Jiang Liu
2015-04-24 16:03 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2015-04-14 2:30 ` [Patch Part2 v5 31/33] x86: Cleanup irq_domain ops Jiang Liu
2015-04-24 16:03 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2015-04-14 2:30 ` [Patch Part2 v5 32/33] x86/irq: Move irqdomain specific code into asm/irqdomain.h Jiang Liu
2015-04-24 16:03 ` [tip:x86/apic] x86/irq: Move irqdomain specific code into asm/ irqdomain.h tip-bot for Jiang Liu
2015-04-14 2:30 ` [Patch Part2 v5 33/33] x86/irq: Avoid memory allocation in __assign_irq_vector() Jiang Liu
2015-04-24 16:04 ` [tip:x86/apic] " tip-bot for Jiang Liu
-- strict thread matches above, loose matches on Subject: below --
2014-11-25 7:49 [Patch Part3 v4 00/38] Enable hierarchy irqdomian on x86 platforms Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 01/38] x86, intel-mid: Delay initialization of APB timer Jiang Liu
2014-11-26 23:12 ` [tip:x86/apic] " tip-bot for Thomas Gleixner
2014-11-25 7:49 ` [Patch Part3 v4 02/38] x86, intel-mid, trivial: Refine code syntax for sfi_parse_mtmr() Jiang Liu
2014-11-26 23:13 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 03/38] x86, irq: Kill unused pre_init_apic_IRQ0() Jiang Liu
2014-11-26 23:13 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 04/38] x86, irq: Prepare IOAPIC interfaces to support hierarchy irqdomain Jiang Liu
2014-11-26 23:13 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 05/38] x86, irq: Implement callbacks to enable hierarchy irqdomain on IOAPICs Jiang Liu
2014-11-26 23:13 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 06/38] x86, irq: Refine the way to allocate irq_cfg for legacy IRQs Jiang Liu
2014-11-26 23:14 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 07/38] x86, irq: Simplify the way to print IOAPIC entry Jiang Liu
2014-11-26 23:14 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 08/38] x86, irq: Introduce helper functions to support hierarchy irqdomain for IOAPIC Jiang Liu
2014-11-26 23:14 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 09/38] x86, irq: Convert IOAPIC to use hierarchy irqdomain interfaces Jiang Liu
2014-11-26 23:14 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 10/38] x86, irq: Kill unused old IOAPIC " Jiang Liu
2014-11-26 23:15 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 11/38] x86, irq: Kill unused struct mp_pin_info Jiang Liu
2014-11-26 23:15 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 12/38] x86, irq: Kill x86_io_apic_ops.print_entries and related interfaces Jiang Liu
2014-11-26 23:15 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 13/38] x86, irq: Kill x86_io_apic_ops.setup_entry " Jiang Liu
2014-11-26 23:16 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 14/38] x86, irq: Kill x86_io_apic_ops.set_affinity " Jiang Liu
2014-11-26 23:16 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 15/38] x86, irq: Kill x86_io_apic_ops.eoi_ioapic_pin " Jiang Liu
2014-11-26 23:16 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 16/38] x86, irq: Kill GENERIC_IRQ_LEGACY_ALLOC_HWIRQ Jiang Liu
2014-11-26 23:16 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 17/38] x86: Clean up unused forward declarations in x86_init.h Jiang Liu
2014-11-26 23:17 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 18/38] x86: irq_remapping: Clean up unsued code Jiang Liu
2014-11-26 23:17 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-12-02 0:21 ` [Patch Part3 v4 18/38] " Bjorn Helgaas
2014-11-25 7:49 ` [Patch Part3 v4 19/38] iommu/vt-d: " Jiang Liu
2014-11-26 23:17 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 20/38] iommu/amd: " Jiang Liu
2014-11-26 23:17 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 21/38] x86: irq_remapping: Clean up unused interfaces Jiang Liu
2014-11-26 23:18 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 22/38] x86, irq: Kill irq_cfg.irq_remapped Jiang Liu
2014-11-26 23:18 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 23/38] iommu/vt-d: Move struct irq_2_iommu into intel_irq_remapping.c Jiang Liu
2014-11-26 23:18 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 24/38] iommu/amd: Move struct irq_2_irte into amd_iommu.c Jiang Liu
2014-11-26 23:18 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 25/38] x86, irq: Move irq_cfg.irq_2_pin into io_apic.c Jiang Liu
2014-11-26 23:19 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 26/38] x86, irq: Kill struct io_apic_irq_attr Jiang Liu
2014-11-26 23:19 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 27/38] x86, irq: Kill x86_io_apic_ops.write and x86_io_apic_ops.modify Jiang Liu
2014-11-26 23:19 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 28/38] x86, irq: Clean up io_apic.h Jiang Liu
2014-11-26 23:19 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 29/38] x86, irq: Use cached IOAPIC entry instead of reading from hardware Jiang Liu
2014-11-26 23:20 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-27 19:32 ` Borislav Petkov
2014-11-28 2:31 ` Jiang Liu
2014-11-28 11:33 ` Borislav Petkov
2014-11-28 11:53 ` Borislav Petkov
2014-11-28 15:40 ` Jiang Liu
2014-11-28 16:07 ` Jiang Liu
2014-11-28 16:46 ` Borislav Petkov
2014-11-28 21:12 ` [tip:x86/apic] x86, ioapic: Repair io_apic_set_affinity tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 30/38] x86, irq: Kill unused alloc_irq_and_cfg_at() Jiang Liu
2014-11-26 23:20 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 31/38] x86, irq: Change functions only used in vector.c as static Jiang Liu
2014-11-26 23:20 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 32/38] x86, irq: Kill function apic_set_affinity() Jiang Liu
2014-11-26 23:21 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 33/38] x86, irq: Move check of cfg->move_in_progress into send_cleanup_vector() Jiang Liu
2014-11-26 23:21 ` [tip:x86/apic] x86, irq: Move check of cfg-> move_in_progress " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 34/38] x86, irq: Move private data in struct irq_cfg into dedicated data structure Jiang Liu
2014-11-26 23:21 ` [tip:x86/apic] " tip-bot for Jiang Liu
2015-04-24 16:02 ` [tip:x86/apic] x86/irq: " tip-bot for Jiang Liu
2014-11-25 7:49 ` [Patch Part3 v4 35/38] x86, irq: Refine the way to calculate NR_IRQS Jiang Liu
2014-11-26 23:21 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:50 ` [Patch Part3 v4 36/38] ACPI, irq, x86: Kill private function mp_register_gsi()/ mp_unregister_gsi() Jiang Liu
2014-11-26 23:22 ` [tip:x86/apic] " tip-bot for Jiang Liu
2014-11-25 7:50 ` [Patch Part3 v4 37/38] x86, irq: Introduce mechanism to support different vector allocation policies Jiang Liu
2014-11-27 10:44 ` Thomas Gleixner
2014-11-27 16:22 ` Jiang Liu
2014-11-25 7:50 ` [Patch Part3 v4 38/38] x86, irq: Add kernel parameter vector_alloc to set CPU vector allocation policy Jiang Liu
2014-12-01 18:49 ` Bjorn Helgaas
2014-12-01 19:15 ` Daniel J Blueman
2014-12-01 23:45 ` Jiang Liu
2014-12-01 23:47 ` Bjorn Helgaas
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