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* [PATCH v2 0/8] clk: Minor cleanups
@ 2015-04-28  4:46 Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 1/8] clk: rockchip: Staticize file-scope declarations Krzysztof Kozlowski
                   ` (9 more replies)
  0 siblings, 10 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

Hi,


Changes since v1
================
1. Rebase on next-20150427 and Sascha Hauer's:
   clk: make strings in parent name arrays const [1]
2. Add patch "clk: tegra: Fix inconsistent indenting".


Description and dependencies
============================
Small cleanups for different clock drivers.

The first three patches are independent.

Rest of the patches (these related to constifying parent names,
including the change for MIPS) depend on the "clk: make strings in
parent name arrays const" from Sascha Hauer [1].


Tested on Arndale Octa (Exynos5420) and Trats2 (Exynos4412). Other
drivers (and MIPS related) only compile tested plus some static
checkers.


[1] http://www.spinics.net/lists/arm-kernel/msg413763.html

Best regards,
Krzysztof

Krzysztof Kozlowski (8):
  clk: rockchip: Staticize file-scope declarations
  clk: exynos: Staticize file-scope declarations
  clk: tegra: Fix inconsistent indenting
  clk: tegra: Fix duplicate const for parent names
  clk: cdce706: Constify parent names in clock init data
  clk: sirf: Constify parent names in clock init data
  clk: ls1x: Fix duplicate const for parent names
  MIPS: Alchemy: Remove unneeded cast removing const

 arch/mips/alchemy/common/clock.c     |  6 +--
 drivers/clk/clk-cdce706.c            |  4 +-
 drivers/clk/clk-ls1x.c               |  6 +--
 drivers/clk/rockchip/clk-rk3188.c    |  2 +-
 drivers/clk/rockchip/clk-rk3288.c    |  2 +-
 drivers/clk/samsung/clk-exynos5260.c | 74 ++++++++++++++++++------------------
 drivers/clk/samsung/clk-exynos5420.c | 10 ++---
 drivers/clk/sirf/clk-common.c        | 12 +++---
 drivers/clk/tegra/clk-emc.c          | 18 ++++-----
 9 files changed, 67 insertions(+), 67 deletions(-)

-- 
1.9.1


^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH v2 1/8] clk: rockchip: Staticize file-scope declarations
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
@ 2015-04-28  4:46 ` Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 2/8] clk: exynos: " Krzysztof Kozlowski
                   ` (8 subsequent siblings)
  9 siblings, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

Add missing static to local (file-scope only) symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 drivers/clk/rockchip/clk-rk3188.c | 2 +-
 drivers/clk/rockchip/clk-rk3288.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c
index 556ce041d371..e4f9d472f1ff 100644
--- a/drivers/clk/rockchip/clk-rk3188.c
+++ b/drivers/clk/rockchip/clk-rk3188.c
@@ -26,7 +26,7 @@ enum rk3188_plls {
 	apll, cpll, dpll, gpll,
 };
 
-struct rockchip_pll_rate_table rk3188_pll_rates[] = {
+static struct rockchip_pll_rate_table rk3188_pll_rates[] = {
 	RK3066_PLL_RATE(2208000000, 1, 92, 1),
 	RK3066_PLL_RATE(2184000000, 1, 91, 1),
 	RK3066_PLL_RATE(2160000000, 1, 90, 1),
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index d17eb4528a28..4f817ed9e6ee 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -27,7 +27,7 @@ enum rk3288_plls {
 	apll, dpll, cpll, gpll, npll,
 };
 
-struct rockchip_pll_rate_table rk3288_pll_rates[] = {
+static struct rockchip_pll_rate_table rk3288_pll_rates[] = {
 	RK3066_PLL_RATE(2208000000, 1, 92, 1),
 	RK3066_PLL_RATE(2184000000, 1, 91, 1),
 	RK3066_PLL_RATE(2160000000, 1, 90, 1),
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 2/8] clk: exynos: Staticize file-scope declarations
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 1/8] clk: rockchip: Staticize file-scope declarations Krzysztof Kozlowski
@ 2015-04-28  4:46 ` Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 3/8] clk: tegra: Fix inconsistent indenting Krzysztof Kozlowski
                   ` (7 subsequent siblings)
  9 siblings, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

Add missing static to local (file-scope only) symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 drivers/clk/samsung/clk-exynos5260.c | 74 ++++++++++++++++++------------------
 drivers/clk/samsung/clk-exynos5420.c | 10 ++---
 2 files changed, 42 insertions(+), 42 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c
index e2e5193d1049..df1d83c45554 100644
--- a/drivers/clk/samsung/clk-exynos5260.c
+++ b/drivers/clk/samsung/clk-exynos5260.c
@@ -94,7 +94,7 @@ PNAME(mout_aud_pll_user_p) = {"fin_pll", "fout_aud_pll"};
 PNAME(mout_sclk_aud_i2s_p) = {"mout_aud_pll_user", "ioclk_i2s_cdclk"};
 PNAME(mout_sclk_aud_pcm_p) = {"mout_aud_pll_user", "ioclk_pcm_extclk"};
 
-struct samsung_mux_clock aud_mux_clks[] __initdata = {
+static struct samsung_mux_clock aud_mux_clks[] __initdata = {
 	MUX(AUD_MOUT_AUD_PLL_USER, "mout_aud_pll_user", mout_aud_pll_user_p,
 			MUX_SEL_AUD, 0, 1),
 	MUX(AUD_MOUT_SCLK_AUD_I2S, "mout_sclk_aud_i2s", mout_sclk_aud_i2s_p,
@@ -103,7 +103,7 @@ struct samsung_mux_clock aud_mux_clks[] __initdata = {
 			MUX_SEL_AUD, 8, 1),
 };
 
-struct samsung_div_clock aud_div_clks[] __initdata = {
+static struct samsung_div_clock aud_div_clks[] __initdata = {
 	DIV(AUD_DOUT_ACLK_AUD_131, "dout_aclk_aud_131", "mout_aud_pll_user",
 			DIV_AUD0, 0, 4),
 
@@ -115,7 +115,7 @@ struct samsung_div_clock aud_div_clks[] __initdata = {
 			DIV_AUD1, 12, 4),
 };
 
-struct samsung_gate_clock aud_gate_clks[] __initdata = {
+static struct samsung_gate_clock aud_gate_clks[] __initdata = {
 	GATE(AUD_SCLK_I2S, "sclk_aud_i2s", "dout_sclk_aud_i2s",
 			EN_SCLK_AUD, 0, CLK_SET_RATE_PARENT, 0),
 	GATE(AUD_SCLK_PCM, "sclk_aud_pcm", "dout_sclk_aud_pcm",
@@ -203,7 +203,7 @@ PNAME(mout_phyclk_mipi_dphy_4lmrxclk_esc0_user_p) = {"fin_pll",
 PNAME(mout_sclk_hdmi_spdif_p) = {"fin_pll", "ioclk_spdif_extclk",
 			"dout_aclk_peri_aud", "phyclk_hdmi_phy_ref_cko"};
 
-struct samsung_mux_clock disp_mux_clks[] __initdata = {
+static struct samsung_mux_clock disp_mux_clks[] __initdata = {
 	MUX(DISP_MOUT_ACLK_DISP_333_USER, "mout_aclk_disp_333_user",
 			mout_aclk_disp_333_user_p,
 			MUX_SEL_DISP0, 0, 1),
@@ -272,7 +272,7 @@ struct samsung_mux_clock disp_mux_clks[] __initdata = {
 			MUX_SEL_DISP4, 4, 2),
 };
 
-struct samsung_div_clock disp_div_clks[] __initdata = {
+static struct samsung_div_clock disp_div_clks[] __initdata = {
 	DIV(DISP_DOUT_PCLK_DISP_111, "dout_pclk_disp_111",
 			"mout_aclk_disp_222_user",
 			DIV_DISP, 8, 4),
@@ -285,7 +285,7 @@ struct samsung_div_clock disp_div_clks[] __initdata = {
 			DIV_DISP, 16, 4),
 };
 
-struct samsung_gate_clock disp_gate_clks[] __initdata = {
+static struct samsung_gate_clock disp_gate_clks[] __initdata = {
 	GATE(DISP_MOUT_HDMI_PHY_PIXEL_USER, "sclk_hdmi_link_i_pixel",
 			"mout_phyclk_hdmi_phy_pixel_clko_user",
 			EN_SCLK_DISP0, 26, CLK_SET_RATE_PARENT, 0),
@@ -363,13 +363,13 @@ static unsigned long egl_clk_regs[] __initdata = {
 PNAME(mout_egl_b_p) = {"mout_egl_pll", "dout_bus_pll"};
 PNAME(mout_egl_pll_p) = {"fin_pll", "fout_egl_pll"};
 
-struct samsung_mux_clock egl_mux_clks[] __initdata = {
+static struct samsung_mux_clock egl_mux_clks[] __initdata = {
 	MUX(EGL_MOUT_EGL_PLL, "mout_egl_pll", mout_egl_pll_p,
 			MUX_SEL_EGL, 4, 1),
 	MUX(EGL_MOUT_EGL_B, "mout_egl_b", mout_egl_b_p, MUX_SEL_EGL, 16, 1),
 };
 
-struct samsung_div_clock egl_div_clks[] __initdata = {
+static struct samsung_div_clock egl_div_clks[] __initdata = {
 	DIV(EGL_DOUT_EGL1, "dout_egl1", "mout_egl_b", DIV_EGL, 0, 3),
 	DIV(EGL_DOUT_EGL2, "dout_egl2", "dout_egl1", DIV_EGL, 4, 3),
 	DIV(EGL_DOUT_ACLK_EGL, "dout_aclk_egl", "dout_egl2", DIV_EGL, 8, 3),
@@ -433,7 +433,7 @@ PNAME(mout_phyclk_usbdrd30_pipe_pclk_user_p) = {"fin_pll",
 PNAME(mout_phyclk_usbdrd30_phyclock_user_p) = {"fin_pll",
 			"phyclk_usbdrd30_udrd30_phyclock"};
 
-struct samsung_mux_clock fsys_mux_clks[] __initdata = {
+static struct samsung_mux_clock fsys_mux_clks[] __initdata = {
 	MUX(FSYS_MOUT_PHYCLK_USBDRD30_PHYCLOCK_USER,
 			"mout_phyclk_usbdrd30_phyclock_user",
 			mout_phyclk_usbdrd30_phyclock_user_p,
@@ -456,7 +456,7 @@ struct samsung_mux_clock fsys_mux_clks[] __initdata = {
 			MUX_SEL_FSYS1, 16, 1),
 };
 
-struct samsung_gate_clock fsys_gate_clks[] __initdata = {
+static struct samsung_gate_clock fsys_gate_clks[] __initdata = {
 	GATE(FSYS_PHYCLK_USBHOST20, "phyclk_usbhost20_phyclock",
 			"mout_phyclk_usbdrd30_phyclock_user",
 			EN_SCLK_FSYS, 1, 0, 0),
@@ -537,18 +537,18 @@ static unsigned long g2d_clk_regs[] __initdata = {
 
 PNAME(mout_aclk_g2d_333_user_p) = {"fin_pll", "dout_aclk_g2d_333"};
 
-struct samsung_mux_clock g2d_mux_clks[] __initdata = {
+static struct samsung_mux_clock g2d_mux_clks[] __initdata = {
 	MUX(G2D_MOUT_ACLK_G2D_333_USER, "mout_aclk_g2d_333_user",
 			mout_aclk_g2d_333_user_p,
 			MUX_SEL_G2D, 0, 1),
 };
 
-struct samsung_div_clock g2d_div_clks[] __initdata = {
+static struct samsung_div_clock g2d_div_clks[] __initdata = {
 	DIV(G2D_DOUT_PCLK_G2D_83, "dout_pclk_g2d_83", "mout_aclk_g2d_333_user",
 			DIV_G2D, 0, 3),
 };
 
-struct samsung_gate_clock g2d_gate_clks[] __initdata = {
+static struct samsung_gate_clock g2d_gate_clks[] __initdata = {
 	GATE(G2D_CLK_G2D, "clk_g2d", "mout_aclk_g2d_333_user",
 			EN_IP_G2D, 4, 0, 0),
 	GATE(G2D_CLK_JPEG, "clk_jpeg", "mout_aclk_g2d_333_user",
@@ -617,17 +617,17 @@ static unsigned long g3d_clk_regs[] __initdata = {
 
 PNAME(mout_g3d_pll_p) = {"fin_pll", "fout_g3d_pll"};
 
-struct samsung_mux_clock g3d_mux_clks[] __initdata = {
+static struct samsung_mux_clock g3d_mux_clks[] __initdata = {
 	MUX(G3D_MOUT_G3D_PLL, "mout_g3d_pll", mout_g3d_pll_p,
 			MUX_SEL_G3D, 0, 1),
 };
 
-struct samsung_div_clock g3d_div_clks[] __initdata = {
+static struct samsung_div_clock g3d_div_clks[] __initdata = {
 	DIV(G3D_DOUT_PCLK_G3D, "dout_pclk_g3d", "dout_aclk_g3d", DIV_G3D, 0, 3),
 	DIV(G3D_DOUT_ACLK_G3D, "dout_aclk_g3d", "mout_g3d_pll", DIV_G3D, 4, 3),
 };
 
-struct samsung_gate_clock g3d_gate_clks[] __initdata = {
+static struct samsung_gate_clock g3d_gate_clks[] __initdata = {
 	GATE(G3D_CLK_G3D, "clk_g3d", "dout_aclk_g3d", EN_IP_G3D, 2, 0, 0),
 	GATE(G3D_CLK_G3D_HPM, "clk_g3d_hpm", "dout_aclk_g3d",
 			EN_IP_G3D, 3, 0, 0),
@@ -694,7 +694,7 @@ PNAME(mout_aclk_m2m_400_user_p) = {"fin_pll", "dout_aclk_gscl_400"};
 PNAME(mout_aclk_gscl_fimc_user_p) = {"fin_pll", "dout_aclk_gscl_400"};
 PNAME(mout_aclk_csis_p) = {"dout_aclk_csis_200", "mout_aclk_gscl_fimc_user"};
 
-struct samsung_mux_clock gscl_mux_clks[] __initdata = {
+static struct samsung_mux_clock gscl_mux_clks[] __initdata = {
 	MUX(GSCL_MOUT_ACLK_GSCL_333_USER, "mout_aclk_gscl_333_user",
 			mout_aclk_gscl_333_user_p,
 			MUX_SEL_GSCL, 0, 1),
@@ -708,7 +708,7 @@ struct samsung_mux_clock gscl_mux_clks[] __initdata = {
 			MUX_SEL_GSCL, 24, 1),
 };
 
-struct samsung_div_clock gscl_div_clks[] __initdata = {
+static struct samsung_div_clock gscl_div_clks[] __initdata = {
 	DIV(GSCL_DOUT_PCLK_M2M_100, "dout_pclk_m2m_100",
 			"mout_aclk_m2m_400_user",
 			DIV_GSCL, 0, 3),
@@ -717,7 +717,7 @@ struct samsung_div_clock gscl_div_clks[] __initdata = {
 			DIV_GSCL, 4, 3),
 };
 
-struct samsung_gate_clock gscl_gate_clks[] __initdata = {
+static struct samsung_gate_clock gscl_gate_clks[] __initdata = {
 	GATE(GSCL_SCLK_CSIS0_WRAP, "sclk_csis0_wrap", "dout_aclk_csis_200",
 			EN_SCLK_GSCL_FIMC, 0, CLK_SET_RATE_PARENT, 0),
 	GATE(GSCL_SCLK_CSIS1_WRAP, "sclk_csis1_wrap", "dout_aclk_csis_200",
@@ -813,14 +813,14 @@ static unsigned long isp_clk_regs[] __initdata = {
 PNAME(mout_isp_400_user_p) = {"fin_pll", "dout_aclk_isp1_400"};
 PNAME(mout_isp_266_user_p)	 = {"fin_pll", "dout_aclk_isp1_266"};
 
-struct samsung_mux_clock isp_mux_clks[] __initdata = {
+static struct samsung_mux_clock isp_mux_clks[] __initdata = {
 	MUX(ISP_MOUT_ISP_266_USER, "mout_isp_266_user", mout_isp_266_user_p,
 			MUX_SEL_ISP0, 0, 1),
 	MUX(ISP_MOUT_ISP_400_USER, "mout_isp_400_user", mout_isp_400_user_p,
 			MUX_SEL_ISP0, 4, 1),
 };
 
-struct samsung_div_clock isp_div_clks[] __initdata = {
+static struct samsung_div_clock isp_div_clks[] __initdata = {
 	DIV(ISP_DOUT_PCLK_ISP_66, "dout_pclk_isp_66", "mout_kfc",
 			DIV_ISP, 0, 3),
 	DIV(ISP_DOUT_PCLK_ISP_133, "dout_pclk_isp_133", "mout_kfc",
@@ -832,7 +832,7 @@ struct samsung_div_clock isp_div_clks[] __initdata = {
 	DIV(ISP_DOUT_SCLK_MPWM, "dout_sclk_mpwm", "mout_kfc", DIV_ISP, 20, 2),
 };
 
-struct samsung_gate_clock isp_gate_clks[] __initdata = {
+static struct samsung_gate_clock isp_gate_clks[] __initdata = {
 	GATE(ISP_CLK_GIC, "clk_isp_gic", "mout_aclk_isp1_266",
 			EN_IP_ISP0, 15, 0, 0),
 
@@ -934,13 +934,13 @@ static unsigned long kfc_clk_regs[] __initdata = {
 PNAME(mout_kfc_pll_p) = {"fin_pll", "fout_kfc_pll"};
 PNAME(mout_kfc_p)	 = {"mout_kfc_pll", "dout_media_pll"};
 
-struct samsung_mux_clock kfc_mux_clks[] __initdata = {
+static struct samsung_mux_clock kfc_mux_clks[] __initdata = {
 	MUX(KFC_MOUT_KFC_PLL, "mout_kfc_pll", mout_kfc_pll_p,
 			MUX_SEL_KFC0, 0, 1),
 	MUX(KFC_MOUT_KFC, "mout_kfc", mout_kfc_p, MUX_SEL_KFC2, 0, 1),
 };
 
-struct samsung_div_clock kfc_div_clks[] __initdata = {
+static struct samsung_div_clock kfc_div_clks[] __initdata = {
 	DIV(KFC_DOUT_KFC1, "dout_kfc1", "mout_kfc", DIV_KFC, 0, 3),
 	DIV(KFC_DOUT_KFC2, "dout_kfc2", "dout_kfc1", DIV_KFC, 4, 3),
 	DIV(KFC_DOUT_KFC_ATCLK, "dout_kfc_atclk", "dout_kfc2", DIV_KFC, 8, 3),
@@ -993,18 +993,18 @@ static unsigned long mfc_clk_regs[] __initdata = {
 
 PNAME(mout_aclk_mfc_333_user_p) = {"fin_pll", "dout_aclk_mfc_333"};
 
-struct samsung_mux_clock mfc_mux_clks[] __initdata = {
+static struct samsung_mux_clock mfc_mux_clks[] __initdata = {
 	MUX(MFC_MOUT_ACLK_MFC_333_USER, "mout_aclk_mfc_333_user",
 			mout_aclk_mfc_333_user_p,
 			MUX_SEL_MFC, 0, 1),
 };
 
-struct samsung_div_clock mfc_div_clks[] __initdata = {
+static struct samsung_div_clock mfc_div_clks[] __initdata = {
 	DIV(MFC_DOUT_PCLK_MFC_83, "dout_pclk_mfc_83", "mout_aclk_mfc_333_user",
 			DIV_MFC, 0, 3),
 };
 
-struct samsung_gate_clock mfc_gate_clks[] __initdata = {
+static struct samsung_gate_clock mfc_gate_clks[] __initdata = {
 	GATE(MFC_CLK_MFC, "clk_mfc", "mout_aclk_mfc_333_user",
 			EN_IP_MFC, 1, 0, 0),
 	GATE(MFC_CLK_SMMU2_MFCM0, "clk_smmu2_mfcm0", "mout_aclk_mfc_333_user",
@@ -1078,7 +1078,7 @@ PNAME(mout_mif_drex2x_p) = {"dout_mem_pll", "dout_bus_pll"};
 PNAME(mout_clkm_phy_p) = {"mout_mif_drex", "dout_media_pll"};
 PNAME(mout_clk2x_phy_p) = {"mout_mif_drex2x", "dout_media_pll"};
 
-struct samsung_mux_clock mif_mux_clks[] __initdata = {
+static struct samsung_mux_clock mif_mux_clks[] __initdata = {
 	MUX(MIF_MOUT_MEM_PLL, "mout_mem_pll", mout_mem_pll_p,
 			MUX_SEL_MIF, 0, 1),
 	MUX(MIF_MOUT_BUS_PLL, "mout_bus_pll", mout_bus_pll_p,
@@ -1095,7 +1095,7 @@ struct samsung_mux_clock mif_mux_clks[] __initdata = {
 			MUX_SEL_MIF, 24, 1),
 };
 
-struct samsung_div_clock mif_div_clks[] __initdata = {
+static struct samsung_div_clock mif_div_clks[] __initdata = {
 	DIV(MIF_DOUT_MEDIA_PLL, "dout_media_pll", "mout_media_pll",
 			DIV_MIF, 0, 3),
 	DIV(MIF_DOUT_MEM_PLL, "dout_mem_pll", "mout_mem_pll",
@@ -1114,7 +1114,7 @@ struct samsung_div_clock mif_div_clks[] __initdata = {
 			DIV_MIF, 28, 4),
 };
 
-struct samsung_gate_clock mif_gate_clks[] __initdata = {
+static struct samsung_gate_clock mif_gate_clks[] __initdata = {
 	GATE(MIF_CLK_LPDDR3PHY_WRAP0, "clk_lpddr3phy_wrap0", "dout_clk2x_phy",
 			EN_IP_MIF, 12, CLK_IGNORE_UNUSED, 0),
 	GATE(MIF_CLK_LPDDR3PHY_WRAP1, "clk_lpddr3phy_wrap1", "dout_clk2x_phy",
@@ -1221,7 +1221,7 @@ PNAME(mout_sclk_i2scod_p) = {"ioclk_i2s_cdclk", "fin_pll", "dout_aclk_peri_aud",
 PNAME(mout_sclk_spdif_p) = {"ioclk_spdif_extclk", "fin_pll",
 			"dout_aclk_peri_aud", "phyclk_hdmi_phy_ref_cko"};
 
-struct samsung_mux_clock peri_mux_clks[] __initdata = {
+static struct samsung_mux_clock peri_mux_clks[] __initdata = {
 	MUX(PERI_MOUT_SCLK_PCM, "mout_sclk_pcm", mout_sclk_pcm_p,
 			MUX_SEL_PERI1, 4, 2),
 	MUX(PERI_MOUT_SCLK_I2SCOD, "mout_sclk_i2scod", mout_sclk_i2scod_p,
@@ -1230,12 +1230,12 @@ struct samsung_mux_clock peri_mux_clks[] __initdata = {
 			MUX_SEL_PERI1, 20, 2),
 };
 
-struct samsung_div_clock peri_div_clks[] __initdata = {
+static struct samsung_div_clock peri_div_clks[] __initdata = {
 	DIV(PERI_DOUT_PCM, "dout_pcm", "mout_sclk_pcm", DIV_PERI, 0, 8),
 	DIV(PERI_DOUT_I2S, "dout_i2s", "mout_sclk_i2scod", DIV_PERI, 8, 6),
 };
 
-struct samsung_gate_clock peri_gate_clks[] __initdata = {
+static struct samsung_gate_clock peri_gate_clks[] __initdata = {
 	GATE(PERI_SCLK_PCM1, "sclk_pcm1", "dout_pcm", EN_SCLK_PERI, 0,
 			CLK_SET_RATE_PARENT, 0),
 	GATE(PERI_SCLK_I2S, "sclk_i2s", "dout_i2s", EN_SCLK_PERI, 1,
@@ -1432,7 +1432,7 @@ static unsigned long top_clk_regs[] __initdata = {
 };
 
 /* fixed rate clocks generated inside the soc */
-struct samsung_fixed_rate_clock fixed_rate_clks[] __initdata = {
+static struct samsung_fixed_rate_clock fixed_rate_clks[] __initdata = {
 	FRATE(PHYCLK_DPTX_PHY_CH3_TXD_CLK, "phyclk_dptx_phy_ch3_txd_clk", NULL,
 			CLK_IS_ROOT, 270000000),
 	FRATE(PHYCLK_DPTX_PHY_CH2_TXD_CLK, "phyclk_dptx_phy_ch2_txd_clk", NULL,
@@ -1519,7 +1519,7 @@ PNAME(mout_sclk_fsys_mmc1_sdclkin_b_p) = {"mout_sclk_fsys_mmc1_sdclkin_a",
 PNAME(mout_sclk_fsys_mmc2_sdclkin_b_p) = {"mout_sclk_fsys_mmc2_sdclkin_a",
 			"mout_mediatop_pll_user"};
 
-struct samsung_mux_clock top_mux_clks[] __initdata = {
+static struct samsung_mux_clock top_mux_clks[] __initdata = {
 	MUX(TOP_MOUT_MEDIATOP_PLL_USER, "mout_mediatop_pll_user",
 			mout_mediatop_pll_user_p,
 			MUX_SEL_TOP_PLL0, 0, 1),
@@ -1679,7 +1679,7 @@ struct samsung_mux_clock top_mux_clks[] __initdata = {
 			MUX_SEL_TOP_GSCL, 20, 1),
 };
 
-struct samsung_div_clock top_div_clks[] __initdata = {
+static struct samsung_div_clock top_div_clks[] __initdata = {
 	DIV(TOP_DOUT_ACLK_G2D_333, "dout_aclk_g2d_333", "mout_aclk_g2d_333",
 			DIV_TOP_G2D_MFC, 0, 3),
 	DIV(TOP_DOUT_ACLK_MFC_333, "dout_aclk_mfc_333", "mout_aclk_mfc_333",
@@ -1800,7 +1800,7 @@ struct samsung_div_clock top_div_clks[] __initdata = {
 
 };
 
-struct samsung_gate_clock top_gate_clks[] __initdata = {
+static struct samsung_gate_clock top_gate_clks[] __initdata = {
 	GATE(TOP_SCLK_MMC0, "sclk_fsys_mmc0_sdclkin",
 			"dout_sclk_fsys_mmc0_sdclkin_b",
 			EN_SCLK_TOP, 7, CLK_SET_RATE_PARENT, 0),
diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 07d666cc6a29..af9979001b95 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -503,7 +503,7 @@ static struct samsung_fixed_factor_clock
 	FFACTOR(0, "ff_dout_spll2", "mout_sclk_spll", 1, 2, 0),
 };
 
-struct samsung_mux_clock exynos5800_mux_clks[] __initdata = {
+static struct samsung_mux_clock exynos5800_mux_clks[] __initdata = {
 	MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3),
 	MUX(0, "mout_aclk400_mscl", mout_group3_5800_p, SRC_TOP0, 4, 3),
 	MUX(0, "mout_aclk400_wcore", mout_group2_5800_p, SRC_TOP0, 16, 3),
@@ -552,7 +552,7 @@ struct samsung_mux_clock exynos5800_mux_clks[] __initdata = {
 	MUX(0, "mout_fimd1", mout_group2_p, SRC_DISP10, 4, 3),
 };
 
-struct samsung_div_clock exynos5800_div_clks[] __initdata = {
+static struct samsung_div_clock exynos5800_div_clks[] __initdata = {
 	DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore", DIV_TOP0, 16, 3),
 
 	DIV(0, "dout_aclk550_cam", "mout_aclk550_cam",
@@ -568,14 +568,14 @@ struct samsung_div_clock exynos5800_div_clks[] __initdata = {
 	DIV(0, "dout_sclk_sw", "sclk_spll", DIV_TOP9, 24, 6),
 };
 
-struct samsung_gate_clock exynos5800_gate_clks[] __initdata = {
+static struct samsung_gate_clock exynos5800_gate_clks[] __initdata = {
 	GATE(CLK_ACLK550_CAM, "aclk550_cam", "mout_user_aclk550_cam",
 				GATE_BUS_TOP, 24, 0, 0),
 	GATE(CLK_ACLK432_SCALER, "aclk432_scaler", "mout_user_aclk432_scaler",
 				GATE_BUS_TOP, 27, 0, 0),
 };
 
-struct samsung_mux_clock exynos5420_mux_clks[] __initdata = {
+static struct samsung_mux_clock exynos5420_mux_clks[] __initdata = {
 	MUX(0, "sclk_bpll", mout_bpll_p, TOP_SPARE2, 0, 1),
 	MUX(0, "mout_aclk400_wcore_bpll", mout_aclk400_wcore_bpll_p,
 				TOP_SPARE2, 4, 1),
@@ -605,7 +605,7 @@ struct samsung_mux_clock exynos5420_mux_clks[] __initdata = {
 	MUX(0, "mout_fimd1", mout_group3_p, SRC_DISP10, 4, 1),
 };
 
-struct samsung_div_clock exynos5420_div_clks[] __initdata = {
+static struct samsung_div_clock exynos5420_div_clks[] __initdata = {
 	DIV(0, "dout_aclk400_wcore", "mout_aclk400_wcore_bpll",
 			DIV_TOP0, 16, 3),
 };
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 3/8] clk: tegra: Fix inconsistent indenting
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 1/8] clk: rockchip: Staticize file-scope declarations Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 2/8] clk: exynos: " Krzysztof Kozlowski
@ 2015-04-28  4:46 ` Krzysztof Kozlowski
  2015-05-01 18:46   ` Stephen Boyd
  2015-04-28  4:46 ` [PATCH v2 4/8] clk: tegra: Fix duplicate const for parent names Krzysztof Kozlowski
                   ` (6 subsequent siblings)
  9 siblings, 1 reply; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

Fix the indentation - spaces used instead of tabs and actually wrong
number of spaces.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 drivers/clk/tegra/clk-emc.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/tegra/clk-emc.c b/drivers/clk/tegra/clk-emc.c
index 615da43a508d..8757feda4a11 100644
--- a/drivers/clk/tegra/clk-emc.c
+++ b/drivers/clk/tegra/clk-emc.c
@@ -130,11 +130,11 @@ static long emc_determine_rate(struct clk_hw *hw, unsigned long rate,
 
 	tegra = container_of(hw, struct tegra_clk_emc, hw);
 
-         for (i = 0; i < tegra->num_timings; i++) {
-                if (tegra->timings[i].ram_code != ram_code)
-                        continue;
+	for (i = 0; i < tegra->num_timings; i++) {
+		if (tegra->timings[i].ram_code != ram_code)
+			continue;
 
-                timing = tegra->timings + i;
+		timing = tegra->timings + i;
 
 		if (timing->rate > max_rate) {
 			i = min(i, 1);
@@ -145,11 +145,11 @@ static long emc_determine_rate(struct clk_hw *hw, unsigned long rate,
 			continue;
 
 		if (timing->rate >= rate)
-                        return timing->rate;
-        }
+			return timing->rate;
+	}
 
-        if (timing)
-                return timing->rate;
+	if (timing)
+		return timing->rate;
 
 	return __clk_get_rate(hw->clk);
 }
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 4/8] clk: tegra: Fix duplicate const for parent names
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
                   ` (2 preceding siblings ...)
  2015-04-28  4:46 ` [PATCH v2 3/8] clk: tegra: Fix inconsistent indenting Krzysztof Kozlowski
@ 2015-04-28  4:46 ` Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 5/8] clk: cdce706: Constify parent names in clock init data Krzysztof Kozlowski
                   ` (5 subsequent siblings)
  9 siblings, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

Replace duplicated const keyword for 'emc_parent_clk_names' with proper
array of const pointers to const strings.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 drivers/clk/tegra/clk-emc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/tegra/clk-emc.c b/drivers/clk/tegra/clk-emc.c
index 8757feda4a11..59697c61f2f1 100644
--- a/drivers/clk/tegra/clk-emc.c
+++ b/drivers/clk/tegra/clk-emc.c
@@ -45,7 +45,7 @@
 #define CLK_SOURCE_EMC_EMC_2X_CLK_SRC(x) (((x) & CLK_SOURCE_EMC_EMC_2X_CLK_SRC_MASK) << \
 					  CLK_SOURCE_EMC_EMC_2X_CLK_SRC_SHIFT)
 
-static const char const *emc_parent_clk_names[] = {
+static const char * const emc_parent_clk_names[] = {
 	"pll_m", "pll_c", "pll_p", "clk_m", "pll_m_ud",
 	"pll_c2", "pll_c3", "pll_c_ud"
 };
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 5/8] clk: cdce706: Constify parent names in clock init data
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
                   ` (3 preceding siblings ...)
  2015-04-28  4:46 ` [PATCH v2 4/8] clk: tegra: Fix duplicate const for parent names Krzysztof Kozlowski
@ 2015-04-28  4:46 ` Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 6/8] clk: sirf: " Krzysztof Kozlowski
                   ` (4 subsequent siblings)
  9 siblings, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

The array of parent names can be made as array of const pointers to
const strings.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 drivers/clk/clk-cdce706.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/clk-cdce706.c b/drivers/clk/clk-cdce706.c
index b8e4f8a822e9..8a2dfd0012f3 100644
--- a/drivers/clk/clk-cdce706.c
+++ b/drivers/clk/clk-cdce706.c
@@ -94,7 +94,7 @@ static const char * const cdce706_source_name[] = {
 	"clk_in0", "clk_in1",
 };
 
-static const char *cdce706_clkin_name[] = {
+static const char * const cdce706_clkin_name[] = {
 	"clk_in",
 };
 
@@ -102,7 +102,7 @@ static const char * const cdce706_pll_name[] = {
 	"pll1", "pll2", "pll3",
 };
 
-static const char *cdce706_divider_parent_name[] = {
+static const char * const cdce706_divider_parent_name[] = {
 	"clk_in", "pll1", "pll2", "pll2", "pll3",
 };
 
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 6/8] clk: sirf: Constify parent names in clock init data
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
                   ` (4 preceding siblings ...)
  2015-04-28  4:46 ` [PATCH v2 5/8] clk: cdce706: Constify parent names in clock init data Krzysztof Kozlowski
@ 2015-04-28  4:46 ` Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 7/8] clk: ls1x: Fix duplicate const for parent names Krzysztof Kozlowski
                   ` (3 subsequent siblings)
  9 siblings, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

The array of parent names can be made as array of const pointers to
const strings.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 drivers/clk/sirf/clk-common.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/sirf/clk-common.c b/drivers/clk/sirf/clk-common.c
index 37af51c5f213..e9cf5730effe 100644
--- a/drivers/clk/sirf/clk-common.c
+++ b/drivers/clk/sirf/clk-common.c
@@ -188,7 +188,7 @@ static struct clk_ops std_pll_ops = {
 	.set_rate = pll_clk_set_rate,
 };
 
-static const char *pll_clk_parents[] = {
+static const char * const pll_clk_parents[] = {
 	"osc",
 };
 
@@ -284,7 +284,7 @@ static struct clk_hw usb_pll_clk_hw = {
  * clock domains - cpu, mem, sys/io, dsp, gfx
  */
 
-static const char *dmn_clk_parents[] = {
+static const char * const dmn_clk_parents[] = {
 	"rtc",
 	"osc",
 	"pll1",
@@ -673,7 +673,7 @@ static void std_clk_disable(struct clk_hw *hw)
 	clkc_writel(val, reg);
 }
 
-static const char *std_clk_io_parents[] = {
+static const char * const std_clk_io_parents[] = {
 	"io",
 };
 
@@ -949,7 +949,7 @@ static struct clk_std clk_pulse = {
 	},
 };
 
-static const char *std_clk_dsp_parents[] = {
+static const char * const std_clk_dsp_parents[] = {
 	"dsp",
 };
 
@@ -981,7 +981,7 @@ static struct clk_std clk_mf = {
 	},
 };
 
-static const char *std_clk_sys_parents[] = {
+static const char * const std_clk_sys_parents[] = {
 	"sys",
 };
 
@@ -999,7 +999,7 @@ static struct clk_std clk_security = {
 	},
 };
 
-static const char *std_clk_usb_parents[] = {
+static const char * const std_clk_usb_parents[] = {
 	"usb_pll",
 };
 
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 7/8] clk: ls1x: Fix duplicate const for parent names
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
                   ` (5 preceding siblings ...)
  2015-04-28  4:46 ` [PATCH v2 6/8] clk: sirf: " Krzysztof Kozlowski
@ 2015-04-28  4:46 ` Krzysztof Kozlowski
  2015-04-28  4:46 ` [PATCH v2 8/8] MIPS: Alchemy: Remove unneeded cast removing const Krzysztof Kozlowski
                   ` (2 subsequent siblings)
  9 siblings, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

Replace duplicated const keyword with proper array of const pointers to
const strings.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 drivers/clk/clk-ls1x.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/clk-ls1x.c b/drivers/clk/clk-ls1x.c
index ca80103ac188..d4c61985f448 100644
--- a/drivers/clk/clk-ls1x.c
+++ b/drivers/clk/clk-ls1x.c
@@ -80,9 +80,9 @@ static struct clk *__init clk_register_pll(struct device *dev,
 	return clk;
 }
 
-static const char const *cpu_parents[] = { "cpu_clk_div", "osc_33m_clk", };
-static const char const *ahb_parents[] = { "ahb_clk_div", "osc_33m_clk", };
-static const char const *dc_parents[] = { "dc_clk_div", "osc_33m_clk", };
+static const char * const cpu_parents[] = { "cpu_clk_div", "osc_33m_clk", };
+static const char * const ahb_parents[] = { "ahb_clk_div", "osc_33m_clk", };
+static const char * const dc_parents[] = { "dc_clk_div", "osc_33m_clk", };
 
 void __init ls1x_clk_init(void)
 {
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH v2 8/8] MIPS: Alchemy: Remove unneeded cast removing const
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
                   ` (6 preceding siblings ...)
  2015-04-28  4:46 ` [PATCH v2 7/8] clk: ls1x: Fix duplicate const for parent names Krzysztof Kozlowski
@ 2015-04-28  4:46 ` Krzysztof Kozlowski
  2015-05-01 18:51   ` Stephen Boyd
  2015-05-06  5:56 ` [PATCH v2 0/8] clk: Minor cleanups Stephen Boyd
  2015-05-06 11:33 ` Thierry Reding
  9 siblings, 1 reply; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-04-28  4:46 UTC (permalink / raw)
  To: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra
  Cc: Chanwoo Choi, Inki Dae, Krzysztof Kozlowski

Parent names in clock init data is now array of const pointers to const
strings so the cast is not needed.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 arch/mips/alchemy/common/clock.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
index 6a98d2cb402c..6e46abe0dac6 100644
--- a/arch/mips/alchemy/common/clock.c
+++ b/arch/mips/alchemy/common/clock.c
@@ -752,12 +752,12 @@ static int __init alchemy_clk_init_fgens(int ctype)
 	switch (ctype) {
 	case ALCHEMY_CPU_AU1000...ALCHEMY_CPU_AU1200:
 		id.ops = &alchemy_clkops_fgenv1;
-		id.parent_names = (const char **)alchemy_clk_fgv1_parents;
+		id.parent_names = alchemy_clk_fgv1_parents;
 		id.num_parents = 2;
 		break;
 	case ALCHEMY_CPU_AU1300:
 		id.ops = &alchemy_clkops_fgenv2;
-		id.parent_names = (const char **)alchemy_clk_fgv2_parents;
+		id.parent_names = alchemy_clk_fgv2_parents;
 		id.num_parents = 3;
 		break;
 	default:
@@ -961,7 +961,7 @@ static int __init alchemy_clk_setup_imux(int ctype)
 	struct clk *c;
 
 	id.ops = &alchemy_clkops_csrc;
-	id.parent_names = (const char **)alchemy_clk_csrc_parents;
+	id.parent_names = alchemy_clk_csrc_parents;
 	id.num_parents = 7;
 	id.flags = CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE;
 
-- 
1.9.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 3/8] clk: tegra: Fix inconsistent indenting
  2015-04-28  4:46 ` [PATCH v2 3/8] clk: tegra: Fix inconsistent indenting Krzysztof Kozlowski
@ 2015-05-01 18:46   ` Stephen Boyd
  2015-05-04  1:47     ` Krzysztof Kozlowski
  0 siblings, 1 reply; 14+ messages in thread
From: Stephen Boyd @ 2015-05-01 18:46 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Ralf Baechle, Max Filippov, Mike Turquette, Heiko Stuebner,
	Sylwester Nawrocki, Tomasz Figa, Kukjin Kim, Barry Song,
	Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra, Chanwoo Choi, Inki Dae

On 04/28, Krzysztof Kozlowski wrote:
> Fix the indentation - spaces used instead of tabs and actually wrong
> number of spaces.
> 
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> ---
>  drivers/clk/tegra/clk-emc.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)

What branch is this against? I don't see this in linux-next or
clk-next.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 8/8] MIPS: Alchemy: Remove unneeded cast removing const
  2015-04-28  4:46 ` [PATCH v2 8/8] MIPS: Alchemy: Remove unneeded cast removing const Krzysztof Kozlowski
@ 2015-05-01 18:51   ` Stephen Boyd
  0 siblings, 0 replies; 14+ messages in thread
From: Stephen Boyd @ 2015-05-01 18:51 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Ralf Baechle, Max Filippov, Mike Turquette, Heiko Stuebner,
	Sylwester Nawrocki, Tomasz Figa, Kukjin Kim, Barry Song,
	Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra, Chanwoo Choi, Inki Dae

On 04/28, Krzysztof Kozlowski wrote:
> Parent names in clock init data is now array of const pointers to const
> strings so the cast is not needed.
> 
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

I can take this through clk-next with an ack from Ralf.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 3/8] clk: tegra: Fix inconsistent indenting
  2015-05-01 18:46   ` Stephen Boyd
@ 2015-05-04  1:47     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 14+ messages in thread
From: Krzysztof Kozlowski @ 2015-05-04  1:47 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Ralf Baechle, Max Filippov, Mike Turquette, Heiko Stuebner,
	Sylwester Nawrocki, Tomasz Figa, Kukjin Kim, Barry Song,
	Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra, Chanwoo Choi, Inki Dae

On 02.05.2015 03:46, Stephen Boyd wrote:
> On 04/28, Krzysztof Kozlowski wrote:
>> Fix the indentation - spaces used instead of tabs and actually wrong
>> number of spaces.
>>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>>   drivers/clk/tegra/clk-emc.c | 16 ++++++++--------
>>   1 file changed, 8 insertions(+), 8 deletions(-)
>
> What branch is this against? I don't see this in linux-next or
> clk-next.

It was rebased on next-20150427. But now I cannot find it in newer 
next... Could you skip these two patches then?

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 0/8] clk: Minor cleanups
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
                   ` (7 preceding siblings ...)
  2015-04-28  4:46 ` [PATCH v2 8/8] MIPS: Alchemy: Remove unneeded cast removing const Krzysztof Kozlowski
@ 2015-05-06  5:56 ` Stephen Boyd
  2015-05-06 11:33 ` Thierry Reding
  9 siblings, 0 replies; 14+ messages in thread
From: Stephen Boyd @ 2015-05-06  5:56 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Ralf Baechle, Max Filippov, Mike Turquette, Heiko Stuebner,
	Sylwester Nawrocki, Tomasz Figa, Kukjin Kim, Barry Song,
	Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Thierry Reding, Alexandre Courbot, linux-mips, linux-kernel,
	linux-clk, linux-arm-kernel, linux-rockchip, linux-samsung-soc,
	linux-tegra, Chanwoo Choi, Inki Dae

On 04/28, Krzysztof Kozlowski wrote:
> Hi,
> 
> 
> Changes since v1
> ================
> 1. Rebase on next-20150427 and Sascha Hauer's:
>    clk: make strings in parent name arrays const [1]
> 2. Add patch "clk: tegra: Fix inconsistent indenting".
> 
> 
> Description and dependencies
> ============================
> Small cleanups for different clock drivers.
> 
> The first three patches are independent.
> 
> Rest of the patches (these related to constifying parent names,
> including the change for MIPS) depend on the "clk: make strings in
> parent name arrays const" from Sascha Hauer [1].
> 
> 
> Tested on Arndale Octa (Exynos5420) and Trats2 (Exynos4412). Other
> drivers (and MIPS related) only compile tested plus some static
> checkers.
> 
> 
> [1] http://www.spinics.net/lists/arm-kernel/msg413763.html
> 
> Best regards,
> Krzysztof
> 
> Krzysztof Kozlowski (8):
>   clk: rockchip: Staticize file-scope declarations
>   clk: exynos: Staticize file-scope declarations
>   clk: tegra: Fix inconsistent indenting
>   clk: tegra: Fix duplicate const for parent names
>   clk: cdce706: Constify parent names in clock init data
>   clk: sirf: Constify parent names in clock init data
>   clk: ls1x: Fix duplicate const for parent names
>   MIPS: Alchemy: Remove unneeded cast removing const

Applied 1,2,5,6,7 to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH v2 0/8] clk: Minor cleanups
  2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
                   ` (8 preceding siblings ...)
  2015-05-06  5:56 ` [PATCH v2 0/8] clk: Minor cleanups Stephen Boyd
@ 2015-05-06 11:33 ` Thierry Reding
  9 siblings, 0 replies; 14+ messages in thread
From: Thierry Reding @ 2015-05-06 11:33 UTC (permalink / raw)
  To: Krzysztof Kozlowski
  Cc: Ralf Baechle, Max Filippov, Mike Turquette, Stephen Boyd,
	Heiko Stuebner, Sylwester Nawrocki, Tomasz Figa, Kukjin Kim,
	Barry Song, Peter De Schrijver, Prashant Gaikwad, Stephen Warren,
	Alexandre Courbot, linux-mips, linux-kernel, linux-clk,
	linux-arm-kernel, linux-rockchip, linux-samsung-soc, linux-tegra,
	Chanwoo Choi, Inki Dae

[-- Attachment #1: Type: text/plain, Size: 251 bytes --]

On Tue, Apr 28, 2015 at 01:46:15PM +0900, Krzysztof Kozlowski wrote:
[...]
>   clk: tegra: Fix inconsistent indenting
>   clk: tegra: Fix duplicate const for parent names

I've squashed these into the patches that add the EMC driver.

Thanks,
Thierry

[-- Attachment #2: Type: application/pgp-signature, Size: 819 bytes --]

^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2015-05-06 11:34 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-04-28  4:46 [PATCH v2 0/8] clk: Minor cleanups Krzysztof Kozlowski
2015-04-28  4:46 ` [PATCH v2 1/8] clk: rockchip: Staticize file-scope declarations Krzysztof Kozlowski
2015-04-28  4:46 ` [PATCH v2 2/8] clk: exynos: " Krzysztof Kozlowski
2015-04-28  4:46 ` [PATCH v2 3/8] clk: tegra: Fix inconsistent indenting Krzysztof Kozlowski
2015-05-01 18:46   ` Stephen Boyd
2015-05-04  1:47     ` Krzysztof Kozlowski
2015-04-28  4:46 ` [PATCH v2 4/8] clk: tegra: Fix duplicate const for parent names Krzysztof Kozlowski
2015-04-28  4:46 ` [PATCH v2 5/8] clk: cdce706: Constify parent names in clock init data Krzysztof Kozlowski
2015-04-28  4:46 ` [PATCH v2 6/8] clk: sirf: " Krzysztof Kozlowski
2015-04-28  4:46 ` [PATCH v2 7/8] clk: ls1x: Fix duplicate const for parent names Krzysztof Kozlowski
2015-04-28  4:46 ` [PATCH v2 8/8] MIPS: Alchemy: Remove unneeded cast removing const Krzysztof Kozlowski
2015-05-01 18:51   ` Stephen Boyd
2015-05-06  5:56 ` [PATCH v2 0/8] clk: Minor cleanups Stephen Boyd
2015-05-06 11:33 ` Thierry Reding

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