* [PATCH] x86: rename eisa_set_level_irq to elcr_set_level_irq
@ 2015-05-10 0:27 Paul Gortmaker
2015-05-10 1:09 ` Maciej W. Rozycki
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Paul Gortmaker @ 2015-05-10 0:27 UTC (permalink / raw)
To: linux-kernel
Cc: Paul Gortmaker, Thomas Gleixner, Ingo Molnar, H. Peter Anvin,
x86, Rafael J. Wysocki, Len Brown, Pavel Machek, Bjorn Helgaas
This routine has been around for over a decade, but with EISA
being dead and abandoned for about twice that long, the name can
be kind of confusing. The function is going at the PIC Edge/Level
Configuration Registers (ELCR), so rename it as such and mentally
decouple it from the long since dead EISA bus.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Len Brown <len.brown@intel.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
[This was in the "delete EISA bus supoort for x86" series, but since
we aren't going to apply that, we might as well steal this from it.]
arch/x86/include/asm/hw_irq.h | 3 +--
arch/x86/kernel/acpi/boot.c | 2 +-
arch/x86/pci/irq.c | 13 +++++++------
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 1f88e719fa78..b58bc1d8bfa6 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -191,8 +191,7 @@ static inline void unlock_vector_lock(void) {}
extern atomic_t irq_err_count;
extern atomic_t irq_mis_count;
-/* EISA */
-extern void eisa_set_level_irq(unsigned int irq);
+extern void elcr_set_level_irq(unsigned int irq);
/* SMP */
extern __visible void smp_apic_timer_interrupt(struct pt_regs *);
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 271293ad89d7..e49ee24da85e 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -608,7 +608,7 @@ static int acpi_register_gsi_pic(struct device *dev, u32 gsi,
* Make sure all (legacy) PCI IRQs are set as level-triggered.
*/
if (trigger == ACPI_LEVEL_SENSITIVE)
- eisa_set_level_irq(gsi);
+ elcr_set_level_irq(gsi);
#endif
return gsi;
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index 5dc6ca5e1741..9bd115484745 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -146,19 +146,20 @@ static void __init pirq_peer_trick(void)
/*
* Code for querying and setting of IRQ routes on various interrupt routers.
+ * PIC Edge/Level Control Registers (ELCR) 0x4d0 & 0x4d1.
*/
-void eisa_set_level_irq(unsigned int irq)
+void elcr_set_level_irq(unsigned int irq)
{
unsigned char mask = 1 << (irq & 7);
unsigned int port = 0x4d0 + (irq >> 3);
unsigned char val;
- static u16 eisa_irq_mask;
+ static u16 elcr_irq_mask;
- if (irq >= 16 || (1 << irq) & eisa_irq_mask)
+ if (irq >= 16 || (1 << irq) & elcr_irq_mask)
return;
- eisa_irq_mask |= (1 << irq);
+ elcr_irq_mask |= (1 << irq);
printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
val = inb(port);
if (!(val & mask)) {
@@ -965,11 +966,11 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
} else if (r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask))) {
msg = "found";
- eisa_set_level_irq(irq);
+ elcr_set_level_irq(irq);
} else if (newirq && r->set &&
(dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
if (r->set(pirq_router_dev, dev, pirq, newirq)) {
- eisa_set_level_irq(newirq);
+ elcr_set_level_irq(newirq);
msg = "assigned";
irq = newirq;
}
--
2.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] x86: rename eisa_set_level_irq to elcr_set_level_irq
2015-05-10 0:27 [PATCH] x86: rename eisa_set_level_irq to elcr_set_level_irq Paul Gortmaker
@ 2015-05-10 1:09 ` Maciej W. Rozycki
2015-05-13 9:30 ` Pavel Machek
2015-05-19 9:27 ` [tip:x86/apic] x86: Rename " tip-bot for Paul Gortmaker
2 siblings, 0 replies; 4+ messages in thread
From: Maciej W. Rozycki @ 2015-05-10 1:09 UTC (permalink / raw)
To: Paul Gortmaker
Cc: linux-kernel, Thomas Gleixner, Ingo Molnar, H. Peter Anvin, x86,
Rafael J. Wysocki, Len Brown, Pavel Machek, Bjorn Helgaas
On Sat, 9 May 2015, Paul Gortmaker wrote:
> This routine has been around for over a decade, but with EISA
> being dead and abandoned for about twice that long, the name can
> be kind of confusing. The function is going at the PIC Edge/Level
> Configuration Registers (ELCR), so rename it as such and mentally
> decouple it from the long since dead EISA bus.
>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: x86@kernel.org
> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
> Cc: Len Brown <len.brown@intel.com>
> Cc: Pavel Machek <pavel@ucw.cz>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
>
> [This was in the "delete EISA bus supoort for x86" series, but since
> we aren't going to apply that, we might as well steal this from it.]
Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org>
FWIW it looks good to me, thanks. Especially for reusing the good parts
of your original change. :)
While cleaning this stuff up you might as well consider getting rid of
the embedded numeric 0x4d0 port reference too and adding macros like
PIC_MASTER_ELCR and PIC_SLAVE_ELCR to <asm/i8259.h> to use them...
> diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
> index 5dc6ca5e1741..9bd115484745 100644
> --- a/arch/x86/pci/irq.c
> +++ b/arch/x86/pci/irq.c
> @@ -146,19 +146,20 @@ static void __init pirq_peer_trick(void)
>
> /*
> * Code for querying and setting of IRQ routes on various interrupt routers.
> + * PIC Edge/Level Control Registers (ELCR) 0x4d0 & 0x4d1.
> */
>
> -void eisa_set_level_irq(unsigned int irq)
> +void elcr_set_level_irq(unsigned int irq)
> {
> unsigned char mask = 1 << (irq & 7);
> unsigned int port = 0x4d0 + (irq >> 3);
... here, and a bunch of places elsewhere. Your change is of course good
as it stands though, that would have to be a separate clean-up anyway.
Maciej
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] x86: rename eisa_set_level_irq to elcr_set_level_irq
2015-05-10 0:27 [PATCH] x86: rename eisa_set_level_irq to elcr_set_level_irq Paul Gortmaker
2015-05-10 1:09 ` Maciej W. Rozycki
@ 2015-05-13 9:30 ` Pavel Machek
2015-05-19 9:27 ` [tip:x86/apic] x86: Rename " tip-bot for Paul Gortmaker
2 siblings, 0 replies; 4+ messages in thread
From: Pavel Machek @ 2015-05-13 9:30 UTC (permalink / raw)
To: Paul Gortmaker
Cc: linux-kernel, Thomas Gleixner, Ingo Molnar, H. Peter Anvin, x86,
Rafael J. Wysocki, Len Brown, Bjorn Helgaas
On Sat 2015-05-09 20:27:37, Paul Gortmaker wrote:
> This routine has been around for over a decade, but with EISA
> being dead and abandoned for about twice that long, the name can
> be kind of confusing. The function is going at the PIC Edge/Level
> Configuration Registers (ELCR), so rename it as such and mentally
> decouple it from the long since dead EISA bus.
>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: x86@kernel.org
> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
> Cc: Len Brown <len.brown@intel.com>
Acked-by: Pavel Machek <pavel@ucw.cz>
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
^ permalink raw reply [flat|nested] 4+ messages in thread
* [tip:x86/apic] x86: Rename eisa_set_level_irq to elcr_set_level_irq
2015-05-10 0:27 [PATCH] x86: rename eisa_set_level_irq to elcr_set_level_irq Paul Gortmaker
2015-05-10 1:09 ` Maciej W. Rozycki
2015-05-13 9:30 ` Pavel Machek
@ 2015-05-19 9:27 ` tip-bot for Paul Gortmaker
2 siblings, 0 replies; 4+ messages in thread
From: tip-bot for Paul Gortmaker @ 2015-05-19 9:27 UTC (permalink / raw)
To: linux-tip-commits
Cc: macro, linux-kernel, pavel, tglx, paul.gortmaker, len.brown,
bhelgaas, rjw, hpa, mingo
Commit-ID: ea6cd25058f39ac69623efdcbd94a7fc7d4d13f0
Gitweb: http://git.kernel.org/tip/ea6cd25058f39ac69623efdcbd94a7fc7d4d13f0
Author: Paul Gortmaker <paul.gortmaker@windriver.com>
AuthorDate: Sat, 9 May 2015 20:27:37 -0400
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Tue, 19 May 2015 11:23:38 +0200
x86: Rename eisa_set_level_irq to elcr_set_level_irq
This routine has been around for over a decade, but with EISA
being dead and abandoned for about twice that long, the name can
be kind of confusing. The function is going at the PIC Edge/Level
Configuration Registers (ELCR), so rename it as such and mentally
decouple it from the long since dead EISA bus.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Len Brown <len.brown@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: x86@kernel.org
Link: http://lkml.kernel.org/r/1431217657-934-1-git-send-email-paul.gortmaker@windriver.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/include/asm/hw_irq.h | 3 +--
arch/x86/kernel/acpi/boot.c | 2 +-
arch/x86/pci/irq.c | 13 +++++++------
3 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 9472c9a..9ec5d37 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -157,8 +157,7 @@ static inline void unlock_vector_lock(void) {}
extern atomic_t irq_err_count;
extern atomic_t irq_mis_count;
-/* EISA */
-extern void eisa_set_level_irq(unsigned int irq);
+extern void elcr_set_level_irq(unsigned int irq);
/* SMP */
extern __visible void smp_apic_timer_interrupt(struct pt_regs *);
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 271293a..e49ee24 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -608,7 +608,7 @@ static int acpi_register_gsi_pic(struct device *dev, u32 gsi,
* Make sure all (legacy) PCI IRQs are set as level-triggered.
*/
if (trigger == ACPI_LEVEL_SENSITIVE)
- eisa_set_level_irq(gsi);
+ elcr_set_level_irq(gsi);
#endif
return gsi;
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index 5dc6ca5..9bd1154 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -146,19 +146,20 @@ static void __init pirq_peer_trick(void)
/*
* Code for querying and setting of IRQ routes on various interrupt routers.
+ * PIC Edge/Level Control Registers (ELCR) 0x4d0 & 0x4d1.
*/
-void eisa_set_level_irq(unsigned int irq)
+void elcr_set_level_irq(unsigned int irq)
{
unsigned char mask = 1 << (irq & 7);
unsigned int port = 0x4d0 + (irq >> 3);
unsigned char val;
- static u16 eisa_irq_mask;
+ static u16 elcr_irq_mask;
- if (irq >= 16 || (1 << irq) & eisa_irq_mask)
+ if (irq >= 16 || (1 << irq) & elcr_irq_mask)
return;
- eisa_irq_mask |= (1 << irq);
+ elcr_irq_mask |= (1 << irq);
printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
val = inb(port);
if (!(val & mask)) {
@@ -965,11 +966,11 @@ static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
} else if (r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask))) {
msg = "found";
- eisa_set_level_irq(irq);
+ elcr_set_level_irq(irq);
} else if (newirq && r->set &&
(dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
if (r->set(pirq_router_dev, dev, pirq, newirq)) {
- eisa_set_level_irq(newirq);
+ elcr_set_level_irq(newirq);
msg = "assigned";
irq = newirq;
}
^ permalink raw reply related [flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-05-19 9:28 UTC | newest]
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2015-05-10 0:27 [PATCH] x86: rename eisa_set_level_irq to elcr_set_level_irq Paul Gortmaker
2015-05-10 1:09 ` Maciej W. Rozycki
2015-05-13 9:30 ` Pavel Machek
2015-05-19 9:27 ` [tip:x86/apic] x86: Rename " tip-bot for Paul Gortmaker
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