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From: Borislav Petkov <bp@alien8.de>
To: Ingo Molnar <mingo@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH 15/20] x86/mce: Add infrastructure to support Local MCE
Date: Thu,  4 Jun 2015 18:55:23 +0200
Message-ID: <1433436928-31903-16-git-send-email-bp@alien8.de> (raw)
In-Reply-To: <1433436928-31903-1-git-send-email-bp@alien8.de>

From: Ashok Raj <ashok.raj@intel.com>

Initialize and prepare for handling LMCEs. Add a boot-time option to
disable LMCEs.

Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1433267394-10943-3-git-send-email-ashok.raj@intel.com
[ Simplify stuff, align statements for better readability, reflow comments; kill
  unused lmce_clear(); save us an MSR write if LMCE is already enabled. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
---
 Documentation/x86/x86_64/boot-options.txt |  3 +++
 arch/x86/include/asm/mce.h                |  5 ++++
 arch/x86/kernel/cpu/mcheck/mce.c          |  3 +++
 arch/x86/kernel/cpu/mcheck/mce_intel.c    | 43 +++++++++++++++++++++++++++++++
 4 files changed, 54 insertions(+)

diff --git a/Documentation/x86/x86_64/boot-options.txt b/Documentation/x86/x86_64/boot-options.txt
index 5223479291a2..68ed3114c363 100644
--- a/Documentation/x86/x86_64/boot-options.txt
+++ b/Documentation/x86/x86_64/boot-options.txt
@@ -31,6 +31,9 @@ Machine check
 		(e.g. BIOS or hardware monitoring applications), conflicting
 		with OS's error handling, and you cannot deactivate the agent,
 		then this option will be a help.
+   mce=no_lmce
+		Do not opt-in to Local MCE delivery. Use legacy method
+		to broadcast MCEs.
    mce=bootlog
 		Enable logging of machine checks left over from booting.
 		Disabled by default on AMD because some BIOS leave bogus ones.
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index ae2bfb895994..982dfc3679ad 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -109,6 +109,7 @@ struct mce_log {
 struct mca_config {
 	bool dont_log_ce;
 	bool cmci_disabled;
+	bool lmce_disabled;
 	bool ignore_ce;
 	bool disabled;
 	bool ser;
@@ -184,12 +185,16 @@ void cmci_clear(void);
 void cmci_reenable(void);
 void cmci_rediscover(void);
 void cmci_recheck(void);
+void lmce_clear(void);
+void lmce_enable(void);
 #else
 static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) { }
 static inline void cmci_clear(void) {}
 static inline void cmci_reenable(void) {}
 static inline void cmci_rediscover(void) {}
 static inline void cmci_recheck(void) {}
+static inline void lmce_clear(void) {}
+static inline void lmce_enable(void) {}
 #endif
 
 #ifdef CONFIG_X86_MCE_AMD
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 0cbcd3183acf..c8c6577b4ada 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1982,6 +1982,7 @@ void mce_disable_bank(int bank)
 /*
  * mce=off Disables machine check
  * mce=no_cmci Disables CMCI
+ * mce=no_lmce Disables LMCE
  * mce=dont_log_ce Clears corrected events silently, no log created for CEs.
  * mce=ignore_ce Disables polling and CMCI, corrected events are not cleared.
  * mce=TOLERANCELEVEL[,monarchtimeout] (number, see above)
@@ -2005,6 +2006,8 @@ static int __init mcheck_enable(char *str)
 		cfg->disabled = true;
 	else if (!strcmp(str, "no_cmci"))
 		cfg->cmci_disabled = true;
+	else if (!strcmp(str, "no_lmce"))
+		cfg->lmce_disabled = true;
 	else if (!strcmp(str, "dont_log_ce"))
 		cfg->dont_log_ce = true;
 	else if (!strcmp(str, "ignore_ce"))
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c
index b4a41cf030ed..2d872deb2c50 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c
@@ -91,6 +91,36 @@ static int cmci_supported(int *banks)
 	return !!(cap & MCG_CMCI_P);
 }
 
+static bool lmce_supported(void)
+{
+	u64 tmp;
+
+	if (mca_cfg.lmce_disabled)
+		return false;
+
+	rdmsrl(MSR_IA32_MCG_CAP, tmp);
+
+	/*
+	 * LMCE depends on recovery support in the processor. Hence both
+	 * MCG_SER_P and MCG_LMCE_P should be present in MCG_CAP.
+	 */
+	if ((tmp & (MCG_SER_P | MCG_LMCE_P)) !=
+		   (MCG_SER_P | MCG_LMCE_P))
+		return false;
+
+	/*
+	 * BIOS should indicate support for LMCE by setting bit 20 in
+	 * IA32_FEATURE_CONTROL without which touching MCG_EXT_CTL will
+	 * generate a #GP fault.
+	 */
+	rdmsrl(MSR_IA32_FEATURE_CONTROL, tmp);
+	if ((tmp & (FEATURE_CONTROL_LOCKED | FEATURE_CONTROL_LMCE)) ==
+		   (FEATURE_CONTROL_LOCKED | FEATURE_CONTROL_LMCE))
+		return true;
+
+	return false;
+}
+
 bool mce_intel_cmci_poll(void)
 {
 	if (__this_cpu_read(cmci_storm_state) == CMCI_STORM_NONE)
@@ -405,6 +435,19 @@ static void intel_init_cmci(void)
 	cmci_recheck();
 }
 
+void intel_init_lmce(void)
+{
+	u64 val;
+
+	if (!lmce_supported())
+		return;
+
+	rdmsrl(MSR_IA32_MCG_EXT_CTL, val);
+
+	if (!(val & MCG_EXT_CTL_LMCE_EN))
+		wrmsrl(MSR_IA32_MCG_EXT_CTL, val | MCG_EXT_CTL_LMCE_EN);
+}
+
 void mce_intel_feature_init(struct cpuinfo_x86 *c)
 {
 	intel_init_thermal(c);
-- 
2.3.5


  parent reply index

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-04 16:55 [PATCH 00/20] tip queue 2015-06-04 Borislav Petkov
2015-06-04 16:55 ` [PATCH 01/20] x86/mm/pat: Untangle pat_init() Borislav Petkov
2015-06-07 17:39   ` [tip:x86/mm] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 02/20] x86/mm/pat: Emulate PAT when it is disabled Borislav Petkov
2015-06-07 17:39   ` [tip:x86/mm] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 03/20] x86/mm/pat: Remove pat_enabled() checks Borislav Petkov
2015-06-07 17:40   ` [tip:x86/mm] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 04/20] x86/mm/pat: Use 7th PAT MSR slot for Write-Through PAT type Borislav Petkov
2015-06-04 16:55 ` [PATCH 05/20] x86/mm/pat: Change reserve_memtype() for Write-Through type Borislav Petkov
2015-06-07 17:40   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 06/20] x86/mm: Teach is_new_memtype_allowed() about " Borislav Petkov
2015-06-07 17:41   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 07/20] x86/mm, asm-generic: Add ioremap_wt() for creating Write-Through mappings Borislav Petkov
2015-06-07 17:41   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 08/20] arch/*/io.h: Add ioremap_wt() to all architectures Borislav Petkov
2015-06-07 17:41   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 09/20] video/fbdev, asm/io.h: Remove ioremap_writethrough() Borislav Petkov
2015-06-07 17:41   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 10/20] x86/mm/pat: Add pgprot_writethrough() Borislav Petkov
2015-06-07 17:42   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 11/20] x86/mm/pat: Extend set_page_memtype() to support Write-Through type Borislav Petkov
2015-06-07 17:42   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 12/20] x86/mm: Add set_memory_wt() for " Borislav Petkov
2015-06-07 17:42   ` [tip:x86/mm] x86/mm/pat: " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 13/20] drivers/block/pmem: Map NVDIMM in Write-Through mode Borislav Petkov
2015-06-07 17:43   ` [tip:x86/mm] " tip-bot for Toshi Kani
2015-06-04 16:55 ` [PATCH 14/20] x86/mce: Add Local MCE definitions Borislav Petkov
2015-06-07 17:43   ` [tip:x86/core] " tip-bot for Ashok Raj
2015-06-04 16:55 ` Borislav Petkov [this message]
2015-06-07 17:43   ` [tip:x86/core] x86/mce: Add infrastructure to support Local MCE tip-bot for Ashok Raj
2015-06-04 16:55 ` [PATCH 16/20] x86/mce: Handle Local MCE events Borislav Petkov
2015-06-07 17:44   ` [tip:x86/core] " tip-bot for Ashok Raj
2015-06-04 16:55 ` [PATCH 17/20] x86: Kill CONFIG_X86_HT Borislav Petkov
2015-06-07 17:44   ` [tip:x86/core] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 18/20] x86/uapi: Do not export <asm/msr-index.h> as part of the user API headers Borislav Petkov
2015-06-07 17:44   ` [tip:x86/core] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 19/20] x86/microcode: Disable builtin microcode loading on 32-bit for now Borislav Petkov
2015-06-07 17:45   ` [tip:x86/microcode] " tip-bot for Borislav Petkov
2015-06-04 16:55 ` [PATCH 20/20] x86/microcode: Correct variables type Borislav Petkov
2015-06-07 17:45   ` [tip:x86/microcode] x86/microcode: Correct CPU family related variable types tip-bot for Andy Shevchenko

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