[PATCH 0/4] MIPS: ath79: Add USB support on the TL-WR1043ND

[PATCH 0/4] MIPS: ath79: Add USB support on the TL-WR1043ND

[Alban Bedel]

Hi,

this serie add a driver for the USB phy on the ATH79 SoCs and enable the
USB port on the TL-WR1043ND. The phy controller is really trivial as it
only use reset lines.

Alban

Alban Bedel (4):
  devicetree: Add bindings for the ATH79 USB phy
  phy: Add a driver for the ATH79 USB phy
  MIPS: ath79: Add the EHCI controller and USB phy to the AR9132 dtsi
  MIPS: ath79: Enable the USB port on the TL-WR1043ND

 .../devicetree/bindings/phy/phy-ath79-usb.txt      |  18 ++++
 arch/mips/boot/dts/qca/ar9132.dtsi                 |  24 +++++
 arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts   |   4 +
 drivers/phy/Kconfig                                |   8 ++
 drivers/phy/Makefile                               |   1 +
 drivers/phy/phy-ath79-usb.c                        | 115 +++++++++++++++++++++
 6 files changed, 170 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-ath79-usb.txt
 create mode 100644 drivers/phy/phy-ath79-usb.c

-- 
2.0.0

[PATCH 1/4] devicetree: Add bindings for the ATH79 USB phy

[Alban Bedel]

Signed-off-by: Alban Bedel <albeu@free.fr>
---
 .../devicetree/bindings/phy/phy-ath79-usb.txt          | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-ath79-usb.txt

diff --git a/Documentation/devicetree/bindings/phy/phy-ath79-usb.txt b/Documentation/devicetree/bindings/phy/phy-ath79-usb.txt
new file mode 100644
index 0000000..cafe219
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/phy-ath79-usb.txt
@@ -0,0 +1,18 @@
+* Atheros AR71XX/9XXX USB PHY
+
+Required properties:
+- compatible: "qca,ar7100-usb-phy"
+- #phys-cells: should be 0
+- reset-names: "usb-phy"[, "usb-suspend-override"]
+- resets: references to the reset controllers
+
+Example:
+
+	usb-phy {
+		compatible = "qca,ar7100-usb-phy";
+
+		reset-names = "usb-phy", "usb-suspend-override";
+		resets = <&rst 4>, <&rst 3>;
+
+		#phy-cells = <0>;
+	};
-- 
2.0.0

[PATCH 2/4] phy: Add a driver for the ATH79 USB phy

[Alban Bedel]

The ATH79 USB phy is very simple, it only have a reset. On some SoC a
second reset is used to force the phy in suspend mode regardless of the
USB controller status.

Signed-off-by: Alban Bedel <albeu@free.fr>
---
 drivers/phy/Kconfig         |   8 +++
 drivers/phy/Makefile        |   1 +
 drivers/phy/phy-ath79-usb.c | 115 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 124 insertions(+)
 create mode 100644 drivers/phy/phy-ath79-usb.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 47da573..aa950a7 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -15,6 +15,14 @@ config GENERIC_PHY
 	  phy users can obtain reference to the PHY. All the users of this
 	  framework should select this config.
 
+config PHY_ATH79_USB
+	tristate "Atheros AR71XX/9XXX USB PHY driver"
+	depends on ATH79 || COMPILE_TEST
+	default y if USB_EHCI_HCD_PLATFORM
+	select GENERIC_PHY
+	help
+	  Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
+
 config PHY_BERLIN_USB
 	tristate "Marvell Berlin USB PHY Driver"
 	depends on ARCH_BERLIN && RESET_CONTROLLER && HAS_IOMEM && OF
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a5b18c1..ba13fcf 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_GENERIC_PHY)		+= phy-core.o
+obj-$(CONFIG_PHY_ATH79_USB)		+= phy-ath79-usb.o
 obj-$(CONFIG_PHY_BERLIN_USB)		+= phy-berlin-usb.o
 obj-$(CONFIG_PHY_BERLIN_SATA)		+= phy-berlin-sata.o
 obj-$(CONFIG_PHY_DM816X_USB)		+= phy-dm816x-usb.o
diff --git a/drivers/phy/phy-ath79-usb.c b/drivers/phy/phy-ath79-usb.c
new file mode 100644
index 0000000..d26aabe
--- /dev/null
+++ b/drivers/phy/phy-ath79-usb.c
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2015 Alban Bedel <albeu@free.fr>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy/phy.h>
+#include <linux/reset.h>
+
+struct ath79_usb_phy {
+	struct reset_control *reset;
+	struct reset_control *suspend_override;
+};
+
+static int ath79_usb_phy_power_on(struct phy *phy)
+{
+	struct ath79_usb_phy *priv = phy_get_drvdata(phy);
+	int err;
+
+	err = reset_control_deassert(priv->reset);
+	if (err)
+		return err;
+
+	if (priv->suspend_override) {
+		err = reset_control_assert(priv->suspend_override);
+		if (err)
+			return err;
+	}
+
+	return 0;
+}
+
+static int ath79_usb_phy_power_off(struct phy *phy)
+{
+	struct ath79_usb_phy *priv = phy_get_drvdata(phy);
+	int err;
+
+	if (priv->suspend_override) {
+		err = reset_control_deassert(priv->suspend_override);
+		if (err)
+			return err;
+	}
+
+	err = reset_control_assert(priv->reset);
+	if (err)
+		return err;
+
+	return 0;
+}
+
+static struct phy_ops ath79_usb_phy_ops = {
+	.power_on	= ath79_usb_phy_power_on,
+	.power_off	= ath79_usb_phy_power_off,
+	.owner		= THIS_MODULE,
+};
+
+static int ath79_usb_phy_probe(struct platform_device *pdev)
+{
+	struct ath79_usb_phy *priv;
+	struct phy *phy;
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->reset = devm_reset_control_get(&pdev->dev, "usb-phy");
+	if (IS_ERR(priv->reset))
+		return PTR_ERR(priv->reset);
+
+	priv->suspend_override = devm_reset_control_get_optional(
+		&pdev->dev, "usb-suspend-override");
+	if (IS_ERR(priv->suspend_override)) {
+		if (PTR_ERR(priv->suspend_override) == -ENOENT)
+			priv->suspend_override = NULL;
+		else
+			return PTR_ERR(priv->suspend_override);
+	}
+
+	phy = devm_phy_create(&pdev->dev, NULL, &ath79_usb_phy_ops);
+	if (IS_ERR(phy))
+		return PTR_ERR(phy);
+	phy_set_drvdata(phy, priv);
+
+	return PTR_ERR_OR_ZERO(devm_of_phy_provider_register(
+				&pdev->dev, of_phy_simple_xlate));
+}
+
+static const struct of_device_id ath79_usb_phy_of_match[] = {
+	{ .compatible = "qca,ar7100-usb-phy" },
+	{}
+};
+MODULE_DEVICE_TABLE(of, ath79_usb_phy_of_match);
+
+static struct platform_driver ath79_usb_phy_driver = {
+	.probe	= ath79_usb_phy_probe,
+	.driver = {
+		.of_match_table	= ath79_usb_phy_of_match,
+		.name		= "ath79-usb-phy",
+	}
+};
+module_platform_driver(ath79_usb_phy_driver);
+
+MODULE_DESCRIPTION("ATH79 USB PHY driver");
+MODULE_AUTHOR("Alban Bedel <albeu@free.fr>");
+MODULE_LICENSE("GPL");
-- 
2.0.0

[PATCH 3/4] MIPS: ath79: Add the EHCI controller and USB phy to the AR9132 dtsi

[Alban Bedel]

Signed-off-by: Alban Bedel <albeu@free.fr>
---
 arch/mips/boot/dts/qca/ar9132.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi
index fb7734e..665ee84 100644
--- a/arch/mips/boot/dts/qca/ar9132.dtsi
+++ b/arch/mips/boot/dts/qca/ar9132.dtsi
@@ -125,6 +125,21 @@
 			};
 		};
 
+		ehci@1b000100 {
+			compatible = "qca,ar7100-ehci", "generic-ehci";
+			reg = <0x1b000100 0x100>;
+
+			interrupts = <3>;
+			resets = <&rst 5>;
+
+			has-transaction-translator;
+
+			phy-names = "usb";
+			phys = <&usb_phy>;
+
+			status = "disabled";
+		};
+
 		spi@1f000000 {
 			compatible = "qca,ar9132-spi", "qca,ar7100-spi";
 			reg = <0x1f000000 0x10>;
@@ -138,4 +153,13 @@
 			#size-cells = <0>;
 		};
 	};
+
+	usb_phy: usb-phy {
+		compatible = "qca,ar7100-usb-phy";
+
+		reset-names = "usb-phy", "usb-suspend-override";
+		resets = <&rst 4>, <&rst 3>;
+
+		#phy-cells = <0>;
+	};
 };
-- 
2.0.0

Re: [PATCH 3/4] MIPS: ath79: Add the EHCI controller and USB phy to the AR9132 dtsi

[Sergei Shtylyov]

Hello.

On 09/01/2015 06:23 PM, Alban Bedel wrote:

> Signed-off-by: Alban Bedel <albeu@free.fr>
> ---
>   arch/mips/boot/dts/qca/ar9132.dtsi | 24 ++++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
>
> diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi
> index fb7734e..665ee84 100644
> --- a/arch/mips/boot/dts/qca/ar9132.dtsi
> +++ b/arch/mips/boot/dts/qca/ar9132.dtsi
> @@ -125,6 +125,21 @@
>   			};
>   		};
>
> +		ehci@1b000100 {

    Please name the node "usb", not "ehci" in order to comply to the ePAPR 
standard.

> +			compatible = "qca,ar7100-ehci", "generic-ehci";

MBR, Sergei

[PATCH 4/4] MIPS: ath79: Enable the USB port on the TL-WR1043ND

[Alban Bedel]

Signed-off-by: Alban Bedel <albeu@free.fr>
---
 arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
index 003015a..cd51199 100644
--- a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
+++ b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
@@ -35,6 +35,10 @@
 			};
 		};
 
+		ehci@1b000100 {
+			status = "okay";
+		};
+
 		spi@1f000000 {
 			status = "okay";
 			num-cs = <1>;
-- 
2.0.0

Re: [PATCH 0/4] MIPS: ath79: Add USB support on the TL-WR1043ND

[Arnd Bergmann]

On Tuesday 01 September 2015 17:23:10 Alban Bedel wrote:
> 
> this serie add a driver for the USB phy on the ATH79 SoCs and enable the
> USB port on the TL-WR1043ND. The phy controller is really trivial as it
> only use reset lines.
> 

Is this a common thing to have? If other PHY devices are like this, we
could instead add a simple generic PHY driver that just asserts all
its reset lines in the order as provided, rather than making this a
hardware specific driver that ends up getting copied several times.

	Arnd

Re: [PATCH 0/4] MIPS: ath79: Add USB support on the TL-WR1043ND

[Alban]

On Mon, 07 Sep 2015 15:20:42 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> On Tuesday 01 September 2015 17:23:10 Alban Bedel wrote:
> > 
> > this serie add a driver for the USB phy on the ATH79 SoCs and enable the
> > USB port on the TL-WR1043ND. The phy controller is really trivial as it
> > only use reset lines.
> > 
> 
> Is this a common thing to have? If other PHY devices are like this, we
> could instead add a simple generic PHY driver that just asserts all
> its reset lines in the order as provided, rather than making this a
> hardware specific driver that ends up getting copied several times.

I don't know how common it is. However I agree that a simple driver that
can start a clock and toggle a few GPIO and/or reset would make sense.

However in the case of the ATH79 SoC some models have a reset line that
is misused to force the PHY in sleep mode. Sadly this extra reset must
be asserted for the PHY to work, so it wouldn't fit in such a generic
design.

Still we could have such a generic driver and let the ATH79 driver
build on top of it. Honestly that's what I wanted to do, but getting
generic drivers with DT support accepted is not easy. That's why I went
with this driver, it is technically inferior but much easier to get
considered for merging.

Alban

Re: [PATCH 0/4] MIPS: ath79: Add USB support on the TL-WR1043ND

[Arnd Bergmann]

On Wednesday 09 September 2015 16:14:59 Alban wrote:
> On Mon, 07 Sep 2015 15:20:42 +0200
> Arnd Bergmann <arnd@arndb.de> wrote:
> 
> > On Tuesday 01 September 2015 17:23:10 Alban Bedel wrote:
> > > 
> > > this serie add a driver for the USB phy on the ATH79 SoCs and enable the
> > > USB port on the TL-WR1043ND. The phy controller is really trivial as it
> > > only use reset lines.
> > > 
> > 
> > Is this a common thing to have? If other PHY devices are like this, we
> > could instead add a simple generic PHY driver that just asserts all
> > its reset lines in the order as provided, rather than making this a
> > hardware specific driver that ends up getting copied several times.
> 
> I don't know how common it is. However I agree that a simple driver that
> can start a clock and toggle a few GPIO and/or reset would make sense.
> 
> However in the case of the ATH79 SoC some models have a reset line that
> is misused to force the PHY in sleep mode. Sadly this extra reset must
> be asserted for the PHY to work, so it wouldn't fit in such a generic
> design.
> 
> Still we could have such a generic driver and let the ATH79 driver
> build on top of it. Honestly that's what I wanted to do, but getting
> generic drivers with DT support accepted is not easy. That's why I went
> with this driver, it is technically inferior but much easier to get
> considered for merging.

Ok, fair enough. If we end up doing a more generic driver for this,
we can still consider adding the compatible string there, potentially
with some workaround for the sleep mode.

	Arnd

Re: [PATCH 0/4] MIPS: ath79: Add USB support on the TL-WR1043ND

[Kishon Vijay Abraham I]

Hi,

On Wednesday 09 September 2015 07:51 PM, Arnd Bergmann wrote:
> On Wednesday 09 September 2015 16:14:59 Alban wrote:
>> On Mon, 07 Sep 2015 15:20:42 +0200
>> Arnd Bergmann <arnd@arndb.de> wrote:
>>
>>> On Tuesday 01 September 2015 17:23:10 Alban Bedel wrote:
>>>>
>>>> this serie add a driver for the USB phy on the ATH79 SoCs and enable the
>>>> USB port on the TL-WR1043ND. The phy controller is really trivial as it
>>>> only use reset lines.
>>>>
>>>
>>> Is this a common thing to have? If other PHY devices are like this, we
>>> could instead add a simple generic PHY driver that just asserts all
>>> its reset lines in the order as provided, rather than making this a
>>> hardware specific driver that ends up getting copied several times.
>>
>> I don't know how common it is. However I agree that a simple driver that
>> can start a clock and toggle a few GPIO and/or reset would make sense.
>>
>> However in the case of the ATH79 SoC some models have a reset line that
>> is misused to force the PHY in sleep mode. Sadly this extra reset must
>> be asserted for the PHY to work, so it wouldn't fit in such a generic
>> design.
>>
>> Still we could have such a generic driver and let the ATH79 driver
>> build on top of it. Honestly that's what I wanted to do, but getting
>> generic drivers with DT support accepted is not easy. That's why I went
>> with this driver, it is technically inferior but much easier to get
>> considered for merging.
> 
> Ok, fair enough. If we end up doing a more generic driver for this,
> we can still consider adding the compatible string there, potentially
> with some workaround for the sleep mode.

hmm, makes sense to have a generic PHY driver for PHY's which doesn't
have PHY registers to be programmed like a PHY driver which enables only
clocks, regulators, drives gpios etc.

Cheers
Kishon