[PATCH v5 0/6] bcm2835: auxiliar device support for spi

[PATCH v5 0/6] bcm2835: auxiliar device support for spi

[kernel]

From: Martin Sperl <kernel@martin.sperl.org>

The BCM2835 contains 3 auxiliar devices:
* spi1
* spi2
* uart1

All of those 3 devices are enabled/disabled via a shared register,
which is set by default to be disabled.

Access to this register needs to get serialized.

So after several iterations of discussions with the following ideas:
* syscon - device tree should describe HW not drivers to use -
           'compatiblity = "brcm,bcm2835-aux-enable", "syscon";'
           is not acceptable
* regulator - it is not necessarily a regulator or a power gate
              that is implemented in HW, so it is not valid to use
              this framework

The recommendation was made to create a new minimal API in soc
just for access to this shared enable/disable register.

This patch-series implements:
* the bcm2835-auxiliar device enable/disable api in soc.
* the bcm2835-auxiliar spi device driver

The uart1 device driver (ns16550 based) is not implemented so far
but would be using the same API.

Both spi and uart drivers can run with shared interrupts,
so there is no need for an interrupt-controller to get implemented.

Martin Sperl (6):
  soc: bcm2835: auxiliar devices enable infrastructure
  ARM: bcm2835: add DT for the bcm2835 auxiliar devices
  dt/bindings: bcm2835: add binding documentation for bcm2835-aux
  spi: bcm2835: new driver implementing auxiliar spi1/spi2 on the
    bcm2835 soc
  ARM: bcm2835: enable building of spi-bcm2835aux driver in default
    config
  dt/bindings: bcm2835: Add binding documentation for auxiliar spi
    devices

 .../bindings/soc/bcm/brcm,bcm2835-aux.txt          |   27 +
 .../bindings/spi/brcm,bcm2835-aux-spi.txt          |   47 ++
 arch/arm/boot/dts/bcm2835.dtsi                     |   37 ++
 arch/arm/configs/bcm2835_defconfig                 |    1 +
 drivers/soc/Kconfig                                |    1 +
 drivers/soc/Makefile                               |    1 +
 drivers/soc/bcm/Kconfig                            |   11 +
 drivers/soc/bcm/Makefile                           |    1 +
 drivers/soc/bcm/bcm2835-aux.c                      |  154 ++++++
 drivers/spi/Kconfig                                |   12 +
 drivers/spi/Makefile                               |    1 +
 drivers/spi/spi-bcm2835aux.c                       |  514 ++++++++++++++++++++
 include/linux/soc/bcm/bcm2835-aux.h                |   23 +
 13 files changed, 830 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt
 create mode 100644 Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
 create mode 100644 drivers/soc/bcm/Kconfig
 create mode 100644 drivers/soc/bcm/Makefile
 create mode 100644 drivers/soc/bcm/bcm2835-aux.c
 create mode 100644 drivers/spi/spi-bcm2835aux.c
 create mode 100644 include/linux/soc/bcm/bcm2835-aux.h

--
1.7.10.4

[PATCH 1/6] soc: bcm2835: auxiliar devices enable infrastructure

[kernel]

From: Martin Sperl <kernel@martin.sperl.org>

The bcm2835 SOC contains 3 auxiliar devices (spi1, spi2 and uart1)
that all are enabled via a shared register.

To serialize access to this shared register this soc-driver
is created that implements:
  bcm2835aux_enable(struct device *dev, const char *property);
  bcm2835aux_disable(struct device *dev, const char *property);

Which will read the property from the device tree of the device
and enable/disable that specific device as per device tree.

First use of this api will be spi-bcm2835aux.

This driver does not implement an interrupt-controller,
so only access to the auxiliar-device-enable register is required.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
 drivers/soc/Kconfig                 |    1 +
 drivers/soc/Makefile                |    1 +
 drivers/soc/bcm/Kconfig             |   11 +++
 drivers/soc/bcm/Makefile            |    1 +
 drivers/soc/bcm/bcm2835-aux.c       |  154 +++++++++++++++++++++++++++++++++++
 include/linux/soc/bcm/bcm2835-aux.h |   23 ++++++
 6 files changed, 191 insertions(+)
 create mode 100644 drivers/soc/bcm/Kconfig
 create mode 100644 drivers/soc/bcm/Makefile
 create mode 100644 drivers/soc/bcm/bcm2835-aux.c
 create mode 100644 include/linux/soc/bcm/bcm2835-aux.h

diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 96ddecb..5506e39 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -1,5 +1,6 @@
 menu "SOC (System On Chip) specific Drivers"

+source "drivers/soc/bcm/Kconfig"
 source "drivers/soc/mediatek/Kconfig"
 source "drivers/soc/qcom/Kconfig"
 source "drivers/soc/sunxi/Kconfig"
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 7dc7c0d..c5744e1 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -2,6 +2,7 @@
 # Makefile for the Linux Kernel SOC specific device drivers.
 #

+obj-$(CONFIG_ARCH_BCM)		+= bcm/
 obj-$(CONFIG_ARCH_MEDIATEK)	+= mediatek/
 obj-$(CONFIG_ARCH_QCOM)		+= qcom/
 obj-$(CONFIG_ARCH_SUNXI)	+= sunxi/
diff --git a/drivers/soc/bcm/Kconfig b/drivers/soc/bcm/Kconfig
new file mode 100644
index 0000000..e57e98f
--- /dev/null
+++ b/drivers/soc/bcm/Kconfig
@@ -0,0 +1,11 @@
+#
+# Broadcom SoC drivers
+#
+config SOC_BCM2835_AUX
+	tristate "Broadcom BCM2835 aux"
+	depends on OF
+	depends on ARCH_BCM2835 || COMPILE_TEST
+
+	help
+	  Support to enable/disable the BCM2835 auxiliar
+	  devices spi1, spi2, uart1
diff --git a/drivers/soc/bcm/Makefile b/drivers/soc/bcm/Makefile
new file mode 100644
index 0000000..370a872
--- /dev/null
+++ b/drivers/soc/bcm/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SOC_BCM2835_AUX) += bcm2835-aux.o
diff --git a/drivers/soc/bcm/bcm2835-aux.c b/drivers/soc/bcm/bcm2835-aux.c
new file mode 100644
index 0000000..5980d67
--- /dev/null
+++ b/drivers/soc/bcm/bcm2835-aux.c
@@ -0,0 +1,154 @@
+/*
+ * bcm2835-aux
+ *
+ * Copyright (C) 2015 Martin Sperl
+ *
+ * Author: Martin Sperl <kernel@martin.sperl.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/soc/bcm/bcm2835-aux.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+static DEFINE_SPINLOCK(bcm2835aux_lock);
+
+static struct platform_driver bcm2835aux_driver;
+
+static int bcm2835aux_dev_match(struct device *dev, void *data)
+{
+	struct device_node *dn = data;
+
+	return (dev->of_node == dn) ? 1 : 0;
+}
+
+static void *bcm2835aux_find_base(struct device *dev, const char *property)
+{
+	struct device *found = NULL;
+	struct device_node *np;
+
+	/* get the phandle of the device */
+	np = of_parse_phandle(dev->of_node, property, 0);
+	if (!np) {
+		dev_err(dev, "missing property %s\n", property);
+		return ERR_PTR(-ENODEV);
+	}
+
+	/* now find the device it points to */
+	found = driver_find_device(&bcm2835aux_driver.driver, NULL,
+				   np, bcm2835aux_dev_match);
+	if (!found) {
+		dev_err(dev, "device for phandle of %s not found\n",
+			property);
+		return ERR_PTR(-EPROBE_DEFER);
+	}
+
+	/* now we got the device, so return the pointer */
+	return dev_get_drvdata(found);
+}
+
+static u32 bcm2835aux_find_mask(struct device *dev, const char *property)
+{
+	int err;
+	u32 mask;
+
+	err = of_property_read_u32_index(dev->of_node, property, 1, &mask);
+	if (err) {
+		dev_err(dev, "missing argument to %s: %d\n",
+			property, err);
+		return 0;
+	}
+
+	return mask;
+}
+
+static int bcm2835aux_bitset(struct device *dev, const char *property,
+			     bool set)
+{
+	u32 v, mask;
+	unsigned long flags;
+	void __iomem *base;
+
+	/* find the device */
+	base = bcm2835aux_find_base(dev, property);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	/* and extract the mask */
+	mask = bcm2835aux_find_mask(dev, property);
+	if (!mask)
+		return -ENOENT;
+
+	spin_lock_irqsave(&bcm2835aux_lock, flags);
+
+	v = readl(base);
+	if (set)
+		v |= mask;
+	else
+		v &= ~mask;
+
+	writel(v, base);
+
+	spin_unlock_irqrestore(&bcm2835aux_lock, flags);
+
+	return 0;
+}
+
+int bcm2835aux_enable(struct device *dev, const char *property)
+{
+	return bcm2835aux_bitset(dev, property, true);
+}
+EXPORT_SYMBOL_GPL(bcm2835aux_enable);
+
+int bcm2835aux_disable(struct device *dev, const char *property)
+{
+	return bcm2835aux_bitset(dev, property, false);
+}
+EXPORT_SYMBOL_GPL(bcm2835aux_disable);
+
+static int bcm2835aux_probe(struct platform_device *pdev)
+{
+	struct resource *res;
+	void __iomem *base;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res)
+		return -ENOENT;
+
+	base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	platform_set_drvdata(pdev, base);
+
+	return 0;
+}
+
+static const struct of_device_id bcm2835aux_match[] = {
+	{ .compatible = "brcm,bcm2835-aux", },
+	{}
+};
+MODULE_DEVICE_TABLE(of, bcm2835aux_match);
+
+static struct platform_driver bcm2835aux_driver = {
+	.driver = {
+		.name           = "bcm2835-aux",
+		.of_match_table	= bcm2835aux_match,
+	},
+	.probe			= bcm2835aux_probe,
+};
+module_platform_driver(bcm2835aux_driver);
+
+MODULE_DESCRIPTION("enable/disable driver for aux-spi1/spi2/uart1 on Broadcom BCM2835");
+MODULE_AUTHOR("Martin Sperl <kernel@martin.sperl.org>");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/soc/bcm/bcm2835-aux.h b/include/linux/soc/bcm/bcm2835-aux.h
new file mode 100644
index 0000000..17a64c6
--- /dev/null
+++ b/include/linux/soc/bcm/bcm2835-aux.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2015 Martin Sperl
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __BCM2835_AUX_H__
+#define __BCM2835_AUX_H__
+
+struct device;
+
+int bcm2835aux_enable(struct device *dev, const char *property);
+int bcm2835aux_disable(struct device *dev, const char *property);
+
+#endif
--
1.7.10.4

[PATCH v5 2/6] ARM: bcm2835: add DT for the bcm2835 auxiliar devices

[kernel]

From: Martin Sperl <kernel@martin.sperl.org>

Add device tree definitions for auxiliar bcm2835 devices:
* spi1
* spi2
* uart1

This also include a device to get used by the relevant
device-drivers (via a shared register) to enable/disable
the HW-block.

The aux-interrupt-register (0x7e21500) is intentionally left
out of scope, so that in the future it is still possible to
implement a separate interrupt-driver - if deemed necessary.

The spi (and also uart) drivers are able to use shared interrupts,
so there is no real need for an interrupt driver.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
 arch/arm/boot/dts/bcm2835.dtsi |   37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi
index 301c73f..4e6fc61 100644
--- a/arch/arm/boot/dts/bcm2835.dtsi
+++ b/arch/arm/boot/dts/bcm2835.dtsi
@@ -158,6 +158,43 @@
 		arm-pmu {
 			compatible = "arm,arm1176-pmu";
 		};
+
+		aux_enable: aux_enable@0x7e215004 {
+			compatible = "brcm,bcm2835-aux";
+			reg = <0x7e215004 0x04>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
+		uart1: uart@7e215040 {
+			compatible = "brcm,bcm2835-aux-uart";
+			reg = <0x7e215040 0x40>;
+			interrupts = <1 29>;
+			brcm,aux-enable = <&aux_enable 1>;
+			status = "disabled";
+		};
+
+		spi1: spi@7e215080 {
+			compatible = "brcm,bcm2835-aux-spi";
+			reg = <0x7e215080 0x40>;
+			brcm,aux-enable = <&aux_enable 2>;
+			interrupts = <1 29>;
+			clocks = <&clk_spi>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi2: spi@7e2150c0 {
+			compatible = "brcm,bcm2835-aux-spi";
+			reg = <0x7e2150c0 0x40>;
+			brcm,aux-enable = <&aux_enable 4>;
+			interrupts = <1 29>;
+			clocks = <&clk_spi>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
 	};

 	clocks {
--
1.7.10.4

[PATCH v5 3/6] dt/bindings: bcm2835: add binding documentation for bcm2835-aux

[kernel]

From: Martin Sperl <kernel@martin.sperl.org>

add binding documentation

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
 .../bindings/soc/bcm/brcm,bcm2835-aux.txt          |   27 ++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt

diff --git a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt
new file mode 100644
index 0000000..8b79cf3
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-aux.txt
@@ -0,0 +1,27 @@
+Broadcom BCM2835 auxiliar device enable register
+
+the BCM2835 contains 3 auxiliar devices (spi1/spi2/uart1)
+which need to get enabled via a shared register.
+
+Required properties:
+- compatible: Should be "brcm,bcm2835-aux".
+- reg: Should contain register location and length for the
+       enable register
+
+Example:
+
+aux_enable: aux_enable@0x7e215004 {
+	compatible = "bcrm,bcm2835-aux";
+	reg = <0x7e215004 0x04>;
+};
+
+Typically used in the respective auxiliar device descriptions
+like this:
+
+uart1: uart@7e215040 {
+	...
+	brcm,aux-enable = <&aux_enable 1>;
+	...
+};
+
+The name of the property can be device/driver specific.
--
1.7.10.4

[PATCH v5 4/6] spi: bcm2835: new driver implementing auxiliar spi1/spi2 on the bcm2835 soc

[kernel]

From: Martin Sperl <kernel@martin.sperl.org>

Implements spi master driver for the 2 auxiliar spi devices
supported by the bcm2835 SOC.

The driver does not implement native chip-selects but uses
framework provided aribtrary GPIO-chip-selects.

Requires soc-bcm2835-aux enable api to enable/disable HW blocks.

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
 drivers/spi/Kconfig          |   12 +
 drivers/spi/Makefile         |    1 +
 drivers/spi/spi-bcm2835aux.c |  514 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 527 insertions(+)
 create mode 100644 drivers/spi/spi-bcm2835aux.c

Changelog:
	v4->v5: added error-handling and deferred probing support
		moved change to default-config to a separate patch
		fixed Kconfig to add the correct dependency

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 4887f31..25242cc 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -88,6 +88,18 @@ config SPI_BCM2835
 	  is for the regular SPI controller. Slave mode operation is not also
 	  not supported.

+config SPI_BCM2835AUX
+	tristate "BCM2835 SPI auxiliar controller"
+	depends on ARCH_BCM2835 || COMPILE_TEST
+	depends on GPIOLIB
+	select SOC_BCM2835_AUX
+	help
+	  This selects a driver for the Broadcom BCM2835 SPI aux master.
+
+	  The BCM2835 contains two types of SPI master controller; the
+	  "universal SPI master", and the regular SPI controller.
+	  This driver is for the universal/auxiliar SPI controller.
+
 config SPI_BFIN5XX
 	tristate "SPI controller driver for ADI Blackfin5xx"
 	depends on BLACKFIN && !BF60x
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 6a7f6f9..31fb7fb 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_SPI_ATMEL)			+= spi-atmel.o
 obj-$(CONFIG_SPI_ATH79)			+= spi-ath79.o
 obj-$(CONFIG_SPI_AU1550)		+= spi-au1550.o
 obj-$(CONFIG_SPI_BCM2835)		+= spi-bcm2835.o
+obj-$(CONFIG_SPI_BCM2835AUX)		+= spi-bcm2835aux.o
 obj-$(CONFIG_SPI_BCM53XX)		+= spi-bcm53xx.o
 obj-$(CONFIG_SPI_BCM63XX)		+= spi-bcm63xx.o
 obj-$(CONFIG_SPI_BCM63XX_HSSPI)		+= spi-bcm63xx-hsspi.o
diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c
new file mode 100644
index 0000000..d968647
--- /dev/null
+++ b/drivers/spi/spi-bcm2835aux.c
@@ -0,0 +1,514 @@
+/*
+ * Driver for Broadcom BCM2835 SPI Controllers
+ *
+ * the driver does not rely on the native chipselects at all
+ * but only uses the gpio type chipselects
+ *
+ * Based on: spi-bcm2835.c
+ *
+ * Copyright (C) 2015 Martin Sperl
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/completion.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/soc/bcm/bcm2835-aux.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/of_irq.h>
+#include <linux/regmap.h>
+#include <linux/spi/spi.h>
+#include <linux/spinlock.h>
+
+/*
+ * shared aux registers between spi1/spi2 and uart1
+ *
+ * these defines could go to a separate module if needed
+ * so that it can also get used with the uart1 implementation
+ * when it materializes.
+ */
+
+/* the AUX register offsets */
+#define BCM2835_AUX_IRQ		0x00
+#define BCM2835_AUX_ENABLE	0x04
+
+/* the AUX Bitfield identical for both register */
+#define BCM2835_AUX_BIT_UART	0x00000001
+#define BCM2835_AUX_BIT_SPI1	0x00000002
+#define BCM2835_AUX_BIT_SPI2	0x00000004
+
+/*
+ * spi register defines
+ *
+ * note there is garbage in the "official" documentation,
+ * so somedata taken from the file:
+ *   brcm_usrlib/dag/vmcsx/vcinclude/bcm2708_chip/aux_io.h
+ * inside of:
+ *   http://www.broadcom.com/docs/support/videocore/Brcm_Android_ICS_Graphics_Stack.tar.gz
+ */
+
+/* SPI register offsets */
+#define BCM2835_AUX_SPI_CNTL0	0x00
+#define BCM2835_AUX_SPI_CNTL1	0x04
+#define BCM2835_AUX_SPI_STAT	0x08
+#define BCM2835_AUX_SPI_PEEK	0x0C
+#define BCM2835_AUX_SPI_IO	0x20
+#define BCM2835_AUX_SPI_TXHOLD	0x30
+
+/* Bitfields in CNTL0 */
+#define BCM2835_AUX_SPI_CNTL0_SPEED	0xFFF00000
+#define BCM2835_AUX_SPI_CNTL0_SPEED_MAX	0xFFF
+#define BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT	20
+#define BCM2835_AUX_SPI_CNTL0_CS	0x000E0000
+#define BCM2835_AUX_SPI_CNTL0_POSTINPUT	0x00010000
+#define BCM2835_AUX_SPI_CNTL0_VAR_CS	0x00008000
+#define BCM2835_AUX_SPI_CNTL0_VAR_WIDTH	0x00004000
+#define BCM2835_AUX_SPI_CNTL0_DOUTHOLD	0x00003000
+#define BCM2835_AUX_SPI_CNTL0_ENABLE	0x00000800
+#define BCM2835_AUX_SPI_CNTL0_CPHA_IN	0x00000400
+#define BCM2835_AUX_SPI_CNTL0_CLEARFIFO	0x00000200
+#define BCM2835_AUX_SPI_CNTL0_CPHA_OUT	0x00000100
+#define BCM2835_AUX_SPI_CNTL0_CPOL	0x00000080
+#define BCM2835_AUX_SPI_CNTL0_MSBF_OUT	0x00000040
+#define BCM2835_AUX_SPI_CNTL0_SHIFTLEN	0x0000003F
+
+/* Bitfields in CNTL1 */
+#define BCM2835_AUX_SPI_CNTL1_CSHIGH	0x00000700
+#define BCM2835_AUX_SPI_CNTL1_IDLE	0x00000080
+#define BCM2835_AUX_SPI_CNTL1_TXEMPTY	0x00000040
+#define BCM2835_AUX_SPI_CNTL1_MSBF_IN	0x00000002
+#define BCM2835_AUX_SPI_CNTL1_KEEP_IN	0x00000001
+
+/* Bitfields in STAT */
+#define BCM2835_AUX_SPI_STAT_TX_LVL	0xFF000000
+#define BCM2835_AUX_SPI_STAT_RX_LVL	0x00FF0000
+#define BCM2835_AUX_SPI_STAT_TX_FULL	0x00000400
+#define BCM2835_AUX_SPI_STAT_TX_EMPTY	0x00000200
+#define BCM2835_AUX_SPI_STAT_RX_FULL	0x00000100
+#define BCM2835_AUX_SPI_STAT_RX_EMPTY	0x00000080
+#define BCM2835_AUX_SPI_STAT_BUSY	0x00000040
+#define BCM2835_AUX_SPI_STAT_BITCOUNT	0x0000003F
+
+/* timeout values */
+#define BCM2835_AUX_SPI_POLLING_LIMIT_US	30
+#define BCM2835_AUX_SPI_POLLING_JIFFIES		2
+
+#define BCM2835_AUX_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
+				  | SPI_NO_CS)
+
+#define DRV_NAME	"spi-bcm2835aux"
+#define ENABLE_PROPERTY "brcm,aux-enable"
+
+struct bcm2835aux_spi {
+	void __iomem *regs;
+	struct clk *clk;
+	int irq;
+	u32 cntl[2];
+	const u8 *tx_buf;
+	u8 *rx_buf;
+	int tx_len;
+	int rx_len;
+};
+
+static inline u32 bcm2835aux_rd(struct bcm2835aux_spi *bs, unsigned reg)
+{
+	return readl(bs->regs + reg);
+}
+
+static inline void bcm2835aux_wr(struct bcm2835aux_spi *bs, unsigned reg,
+				 u32 val)
+{
+	writel(val, bs->regs + reg);
+}
+
+static inline void bcm2835aux_rd_fifo(struct bcm2835aux_spi *bs)
+{
+	u32 data;
+	int i;
+	int count = min(bs->rx_len, 3);
+
+	data = bcm2835aux_rd(bs, BCM2835_AUX_SPI_IO);
+	if (bs->rx_buf) {
+		for (i = 0; i < count; i++)
+			*bs->rx_buf++ = (data >> (8 * (2 - i))) & 0xff;
+	}
+	bs->rx_len -= count;
+}
+
+static inline void bcm2835aux_wr_fifo(struct bcm2835aux_spi *bs)
+{
+	u32 data;
+	u8 byte;
+	int count;
+	int i;
+
+	/* gather up to 3 bytes to write to the FIFO */
+	count = min(bs->tx_len, 3);
+	data = 0;
+	for (i = 0; i < count; i++) {
+		byte = bs->tx_buf ? *bs->tx_buf++ : 0;
+		data |= byte << (8 * (2 - i));
+	}
+
+	/* and set the variable bit-length */
+	data |= (count * 8) << 24;
+
+	/* and decrement length */
+	bs->tx_len -= count;
+
+	/* write to the correct TX-register */
+	if (bs->tx_len)
+		bcm2835aux_wr(bs, BCM2835_AUX_SPI_TXHOLD, data);
+	else
+		bcm2835aux_wr(bs, BCM2835_AUX_SPI_IO, data);
+}
+
+static void bcm2835aux_spi_reset_hw(struct bcm2835aux_spi *bs)
+{
+	/* disable spi clearing fifo and interrupts */
+	bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, 0);
+	bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0,
+		      BCM2835_AUX_SPI_CNTL0_CLEARFIFO);
+}
+
+static irqreturn_t bcm2835aux_spi_interrupt(int irq, void *dev_id)
+{
+	struct spi_master *master = dev_id;
+	struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
+	irqreturn_t ret = IRQ_NONE;
+
+	/* check if we have data to read */
+	while (bs->rx_len &&
+	       (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT) &
+		  BCM2835_AUX_SPI_STAT_RX_EMPTY))) {
+		bcm2835aux_rd_fifo(bs);
+		ret = IRQ_HANDLED;
+	}
+
+	/* check if we have data to write */
+	while (bs->tx_len &&
+	       (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT) &
+		  BCM2835_AUX_SPI_STAT_TX_FULL))) {
+		bcm2835aux_wr_fifo(bs);
+		ret = IRQ_HANDLED;
+	}
+
+	/* and check if we have reached "done" */
+	while (bs->rx_len &&
+	       (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT) &
+		  BCM2835_AUX_SPI_STAT_BUSY))) {
+		bcm2835aux_rd_fifo(bs);
+		ret = IRQ_HANDLED;
+	}
+
+	/* and if rx_len is 0 then wake up completion and disable spi */
+	if (!bs->rx_len) {
+		bcm2835aux_spi_reset_hw(bs);
+		complete(&master->xfer_completion);
+	}
+
+	/* and return */
+	return ret;
+}
+
+static int __bcm2835aux_spi_transfer_one_irq(struct spi_master *master,
+					     struct spi_device *spi,
+					     struct spi_transfer *tfr)
+{
+	struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
+
+	/* enable interrupts */
+	bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1] |
+		BCM2835_AUX_SPI_CNTL1_TXEMPTY |
+		BCM2835_AUX_SPI_CNTL1_IDLE);
+
+	/* and wait for finish... */
+	return 1;
+}
+
+static int bcm2835aux_spi_transfer_one_irq(struct spi_master *master,
+					   struct spi_device *spi,
+					   struct spi_transfer *tfr)
+{
+	struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
+
+	/* fill in registers and fifos before enabling interrupts */
+	bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]);
+	bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]);
+
+	/* fill in tx fifo with data before enabling interrupts */
+	while ((bs->tx_len) &&
+	       (!(bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT) &
+		  BCM2835_AUX_SPI_STAT_TX_FULL))) {
+		bcm2835aux_wr_fifo(bs);
+	}
+
+	/* now run the interrupt mode */
+	return __bcm2835aux_spi_transfer_one_irq(master, spi, tfr);
+}
+
+static int bcm2835aux_spi_transfer_one_poll(struct spi_master *master,
+					    struct spi_device *spi,
+					    struct spi_transfer *tfr,
+					    unsigned long xfer_time_us)
+{
+	struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
+	unsigned long timeout;
+	u32 stat;
+
+	/* configure spi */
+	bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL1, bs->cntl[1]);
+	bcm2835aux_wr(bs, BCM2835_AUX_SPI_CNTL0, bs->cntl[0]);
+
+	/* set the timeout */
+	timeout = jiffies + BCM2835_AUX_SPI_POLLING_JIFFIES;
+
+	/* loop until finished the transfer */
+	while (bs->rx_len) {
+		/* read status */
+		stat = bcm2835aux_rd(bs, BCM2835_AUX_SPI_STAT);
+
+		/* fill in tx fifo with remaining data */
+		if ((bs->tx_len) && (!(stat & BCM2835_AUX_SPI_STAT_TX_FULL))) {
+			bcm2835aux_wr_fifo(bs);
+			continue;
+		}
+
+		/* read data from fifo for both cases */
+		if (!(stat & BCM2835_AUX_SPI_STAT_RX_EMPTY)) {
+			bcm2835aux_rd_fifo(bs);
+			continue;
+		}
+		if (!(stat & BCM2835_AUX_SPI_STAT_BUSY)) {
+			bcm2835aux_rd_fifo(bs);
+			continue;
+		}
+
+		/* there is still data pending to read check the timeout */
+		if (bs->rx_len && time_after(jiffies, timeout)) {
+			dev_dbg_ratelimited(&spi->dev,
+					    "timeout period reached: jiffies: %lu remaining tx/rx: %d/%d - falling back to interrupt mode\n",
+					    jiffies - timeout,
+					    bs->tx_len, bs->rx_len);
+			/* forward to interrupt handler */
+			return __bcm2835aux_spi_transfer_one_irq(master,
+							       spi, tfr);
+		}
+	}
+
+	/* Transfer complete - reset SPI HW */
+	bcm2835aux_spi_reset_hw(bs);
+
+	/* and return without waiting for completion */
+	return 0;
+}
+
+static int bcm2835aux_spi_transfer_one(struct spi_master *master,
+				       struct spi_device *spi,
+				       struct spi_transfer *tfr)
+{
+	struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
+	unsigned long spi_hz, clk_hz, speed;
+	unsigned long spi_used_hz, xfer_time_us;
+
+	/* calculate the registers to handle
+	 *
+	 * note that we use the variable data mode, which
+	 * is not optimal for longer transfers as we waste registers
+	 * resulting (potentially) in more interrupts when transferring
+	 * more than 12 bytes
+	 */
+	bs->cntl[0] = BCM2835_AUX_SPI_CNTL0_ENABLE |
+		      BCM2835_AUX_SPI_CNTL0_VAR_WIDTH |
+		      BCM2835_AUX_SPI_CNTL0_MSBF_OUT;
+	bs->cntl[1] = BCM2835_AUX_SPI_CNTL1_MSBF_IN;
+
+	/* set clock */
+	spi_hz = tfr->speed_hz;
+	clk_hz = clk_get_rate(bs->clk);
+
+	if (spi_hz >= clk_hz / 2) {
+		speed = 0;
+	} else if (spi_hz) {
+		speed = DIV_ROUND_UP(clk_hz, 2 * spi_hz) - 1;
+		if (speed >  BCM2835_AUX_SPI_CNTL0_SPEED_MAX)
+			speed = BCM2835_AUX_SPI_CNTL0_SPEED_MAX;
+	} else { /* the slowest we can go */
+		speed = BCM2835_AUX_SPI_CNTL0_SPEED_MAX;
+	}
+	bs->cntl[0] |= speed << BCM2835_AUX_SPI_CNTL0_SPEED_SHIFT;
+	spi_used_hz = clk_hz / (2 * (speed + 1));
+
+	/* handle all the modes */
+	if (spi->mode & SPI_CPOL)
+		bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_CPOL;
+	if (spi->mode & SPI_CPHA)
+		bs->cntl[0] |= BCM2835_AUX_SPI_CNTL0_CPHA_OUT |
+			       BCM2835_AUX_SPI_CNTL0_CPHA_IN;
+
+	/* set transmit buffers and length */
+	bs->tx_buf = tfr->tx_buf;
+	bs->rx_buf = tfr->rx_buf;
+	bs->tx_len = tfr->len;
+	bs->rx_len = tfr->len;
+
+	/* calculate the estimated time in us the transfer runs */
+	xfer_time_us = tfr->len
+		* 9 /* clocks/byte - SPI-HW waits 1 clock after each byte */
+		* 1000000 / spi_used_hz;
+
+	/* run in polling mode for short transfers */
+	if (xfer_time_us < BCM2835_AUX_SPI_POLLING_LIMIT_US)
+		return bcm2835aux_spi_transfer_one_poll(master, spi, tfr,
+							xfer_time_us);
+
+	/* run in interrupt mode for all others */
+	return bcm2835aux_spi_transfer_one_irq(master, spi, tfr);
+}
+
+static void bcm2835aux_spi_handle_err(struct spi_master *master,
+				      struct spi_message *msg)
+{
+	struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
+
+	bcm2835aux_spi_reset_hw(bs);
+}
+
+static int bcm2835aux_spi_probe(struct platform_device *pdev)
+{
+	struct spi_master *master;
+	struct bcm2835aux_spi *bs;
+	struct resource *res;
+	int err;
+
+	master = spi_alloc_master(&pdev->dev, sizeof(*bs));
+	if (!master) {
+		dev_err(&pdev->dev, "spi_alloc_master() failed\n");
+		return -ENOMEM;
+	}
+
+	platform_set_drvdata(pdev, master);
+	master->mode_bits = BCM2835_AUX_SPI_MODE_BITS;
+	master->bits_per_word_mask = SPI_BPW_MASK(8);
+	master->num_chipselect = -1;
+	master->transfer_one = bcm2835aux_spi_transfer_one;
+	master->handle_err = bcm2835aux_spi_handle_err;
+	master->dev.of_node = pdev->dev.of_node;
+
+	bs = spi_master_get_devdata(master);
+
+	/* the main area */
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	bs->regs = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(bs->regs)) {
+		err = PTR_ERR(bs->regs);
+		goto out_master_put;
+	}
+
+	bs->clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(bs->clk)) {
+		err = PTR_ERR(bs->clk);
+		dev_err(&pdev->dev, "could not get clk: %d\n", err);
+		goto out_master_put;
+	}
+	bs->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
+	if (bs->irq <= 0) {
+		dev_err(&pdev->dev, "could not get IRQ: %d\n", bs->irq);
+		err = bs->irq ? bs->irq : -ENODEV;
+		goto out_master_put;
+	}
+
+	err = clk_prepare_enable(bs->clk);
+	if (err) {
+		dev_err(&pdev->dev, "could not prepare clock: %d\n", err);
+		goto out_master_put;
+	}
+
+	err = devm_request_irq(&pdev->dev, bs->irq,
+			       bcm2835aux_spi_interrupt,
+			       IRQF_SHARED,
+			       dev_name(&pdev->dev), master);
+	if (err) {
+		dev_err(&pdev->dev, "could not request IRQ: %d\n", err);
+		goto out_clk_disable;
+	}
+
+	/* enable HW block */
+	err = bcm2835aux_enable(&pdev->dev, ENABLE_PROPERTY);
+	if (err) {
+		dev_err(&pdev->dev, "could not enable aux: %d\n", err);
+		goto out_clk_disable;
+	}
+
+	/* reset SPI-HW block */
+	bcm2835aux_spi_reset_hw(bs);
+
+	err = devm_spi_register_master(&pdev->dev, master);
+	if (err) {
+		dev_err(&pdev->dev, "could not register SPI master: %d\n", err);
+		goto out_hw_disable;
+	}
+
+	return 0;
+
+out_hw_disable:
+	bcm2835aux_disable(&pdev->dev, ENABLE_PROPERTY);
+out_clk_disable:
+	clk_disable_unprepare(bs->clk);
+out_master_put:
+	spi_master_put(master);
+	return err;
+}
+
+static int bcm2835aux_spi_remove(struct platform_device *pdev)
+{
+	struct spi_master *master = platform_get_drvdata(pdev);
+	struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
+
+	/* Clear FIFOs, and disable the HW block */
+	clk_disable_unprepare(bs->clk);
+
+	bcm2835aux_spi_reset_hw(bs);
+
+	/* disable HW block */
+	bcm2835aux_disable(&pdev->dev, ENABLE_PROPERTY);
+
+	return 0;
+}
+
+static const struct of_device_id bcm2835aux_spi_match[] = {
+	{ .compatible = "brcm,bcm2835-aux-spi", },
+	{}
+};
+MODULE_DEVICE_TABLE(of, bcm2835aux_spi_match);
+
+static struct platform_driver bcm2835aux_spi_driver = {
+	.driver		= {
+		.name		= DRV_NAME,
+		.of_match_table	= bcm2835aux_spi_match,
+	},
+	.probe		= bcm2835aux_spi_probe,
+	.remove		= bcm2835aux_spi_remove,
+};
+module_platform_driver(bcm2835aux_spi_driver);
+
+MODULE_DESCRIPTION("SPI controller driver for Broadcom BCM2835 aux");
+MODULE_AUTHOR("Martin Sperl <kernel@martin.sperl.org>");
+MODULE_LICENSE("GPL v2");
--
1.7.10.4

[PATCH v5 5/6] ARM: bcm2835: enable building of spi-bcm2835aux driver in default config

[kernel]

From: Martin Sperl <kernel@martin.sperl.org>

Added spi-bcm2835aux to default config

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
 arch/arm/configs/bcm2835_defconfig |    1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/bcm2835_defconfig b/arch/arm/configs/bcm2835_defconfig
index 31cb073..a205c8b 100644
--- a/arch/arm/configs/bcm2835_defconfig
+++ b/arch/arm/configs/bcm2835_defconfig
@@ -75,6 +75,7 @@ CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_BCM2835=y
 CONFIG_SPI=y
 CONFIG_SPI_BCM2835=y
+CONFIG_SPI_BCM2835AUX=y
 CONFIG_GPIO_SYSFS=y
 # CONFIG_HWMON is not set
 CONFIG_FB=y
--
1.7.10.4

[PATCH v5 6/6] dt/bindings: bcm2835: Add binding documentation for auxiliar spi devices

[kernel]

From: Martin Sperl <kernel@martin.sperl.org>

add binding documentation

Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
---
 .../bindings/spi/brcm,bcm2835-aux-spi.txt          |   47 ++++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt

Changelog:
	v4->v5: fixed wording for reg
		removed reference to syscon
		removed documentation on typical GPIO config

diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
new file mode 100644
index 0000000..3ade499
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/brcm,bcm2835-aux-spi.txt
@@ -0,0 +1,47 @@
+Broadcom BCM2835 auxiliar SPI1/2 controller
+
+The BCM2835 contains two forms of SPI master controller, one known simply as
+SPI0, and the other known as the "Universal SPI Master"; part of the
+auxiliary block. This binding applies to the SPI1/2 controller.
+
+Required properties:
+- compatible: Should be "brcm,bcm2835-aux-spi".
+- reg: Should contain register location and length for the spi block
+- interrupts: Should contain shared interrupt of the aux block
+- clocks: The clock feeding the SPI controller.
+- cs-gpios: the cs-gpios (native cs is NOT supported)
+	    see also spi-bus.txt
+- bcrm,aux-enable: the bcrm,bcm2835-aux-enable config entry to handle
+		  enabling/disabling of the spi1/spi2/uart1 HW block
+		  second "argument" is the mask to apply to the
+		  enable register
+
+Example:
+
+spi1@7e215080 {
+	compatible = "brcm,bcm2835-aux-spi";
+	reg = <0x7e215080 0x40>;
+	interrupts = <1 29>;
+	clocks = <&clk_spi>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>;
+	bcrm,aux-enable = <&aux_enable 2>;
+};
+
+spi2@7e2150c0 {
+	compatible = "brcm,bcm2835-aux-spi";
+	reg = <0x7e2150c0 0x40>;
+	interrupts = <1 29>;
+	clocks = <&clk_spi>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cs-gpios = <&gpio 43>, <&gpio 44>, <&gpio 45>;
+	bcrm,aux-enable = <&aux_enable 4>;
+};
+
+/* the necessary bcm2835 aux-enable referenced above */
+aux_enable: aux_enable@0x7e215004 {
+	compatible = "bcrm,bcm2835-aux";
+	reg = <0x7e215004 0x04>;
+};
--
1.7.10.4

Re: [PATCH v5 0/6] bcm2835: auxiliar device support for spi

[Eric Anholt]

[-- Attachment #1: Type: text/plain, Size: 1937 bytes --]

kernel@martin.sperl.org writes:

> From: Martin Sperl <kernel@martin.sperl.org>
>
> The BCM2835 contains 3 auxiliar devices:
> * spi1
> * spi2
> * uart1
>
> All of those 3 devices are enabled/disabled via a shared register,
> which is set by default to be disabled.
>
> Access to this register needs to get serialized.
>
> So after several iterations of discussions with the following ideas:
> * syscon - device tree should describe HW not drivers to use -
>            'compatiblity = "brcm,bcm2835-aux-enable", "syscon";'
>            is not acceptable
> * regulator - it is not necessarily a regulator or a power gate
>               that is implemented in HW, so it is not valid to use
>               this framework
>
> The recommendation was made to create a new minimal API in soc
> just for access to this shared enable/disable register.
>
> This patch-series implements:
> * the bcm2835-auxiliar device enable/disable api in soc.
> * the bcm2835-auxiliar spi device driver
>
> The uart1 device driver (ns16550 based) is not implemented so far
> but would be using the same API.
>
> Both spi and uart drivers can run with shared interrupts,
> so there is no need for an interrupt-controller to get implemented.

I finally had a chance to sit down and look at what the hardware's doing
with the enable bit (also, I've read a whole lot more of the hardware
now, so I'm a lot faster at answering questions like this).  The enable
bits are a clock gate off of the VPU clock.

I knocked together the enable bits as a clock gate driver, since I'd
just written very similar code for the audio domain clock driver (and I
assume you are grumpy about how much time you've spent on this one
stupid register).  It's up at
https://github.com/anholt/linux/tree/bcm2835-clock-aux and I can submit
it if you like the result.  I've compile tested it only, but I'm hoping
you could just drop your aux SPI driver on top of it and have things
work.

[-- Attachment #2: signature.asc --]
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Re: [PATCH v5 4/6] spi: bcm2835: new driver implementing auxiliar spi1/spi2 on the bcm2835 soc

[Eric Anholt]

[-- Attachment #1: Type: text/plain, Size: 6411 bytes --]

kernel@martin.sperl.org writes:

> From: Martin Sperl <kernel@martin.sperl.org>
>
> Implements spi master driver for the 2 auxiliar spi devices
> supported by the bcm2835 SOC.
>
> The driver does not implement native chip-selects but uses
> framework provided aribtrary GPIO-chip-selects.
>
> Requires soc-bcm2835-aux enable api to enable/disable HW blocks.
>
> Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
> ---
>  drivers/spi/Kconfig          |   12 +
>  drivers/spi/Makefile         |    1 +
>  drivers/spi/spi-bcm2835aux.c |  514 ++++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 527 insertions(+)
>  create mode 100644 drivers/spi/spi-bcm2835aux.c
>
> Changelog:
> 	v4->v5: added error-handling and deferred probing support
> 		moved change to default-config to a separate patch
> 		fixed Kconfig to add the correct dependency

Review comments as a diff, so you can git-am and squash them in if you
like.  If you take them all, you can add "Acked-by: Eric Anholt
<eric@anholt.net>".

I didn't know anything about SPI before tonight, but I've looked through
what you did and it looks solid when compared to the hardware docs I've
got.  The only functional comment I had that's not in my diff is that
you could probably reduce the transfer overhead by knowing that there
are 4 dwords in the transfer and receive FIFOs, so I think you could
write more before checking if you had to stop.

From e082c3b5ea32d3eb1a40b7f9b5a822ba307cf886 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 8 Sep 2015 17:51:08 -0700
Subject: [PATCH] spi: Changes for Martin's aux spi driver.

The intention is for these to be review fixes squashed into his commit of the driver.

- Reset has to happen before the clock gate is disabled, since
  register writes wouldn't take effect.

- Typo fixes.

- Dropped unnecessary regs/defines.

- Dropped custom clock enable/disable, assuming we use the aux clock
  driver instead.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 drivers/spi/Kconfig          |  5 ++---
 drivers/spi/spi-bcm2835aux.c | 45 ++++++--------------------------------------
 2 files changed, 8 insertions(+), 42 deletions(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index cdb3dba..20854d4 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -89,16 +89,15 @@ config SPI_BCM2835
 	  not supported.
 
 config SPI_BCM2835AUX
-	tristate "BCM2835 SPI auxiliar controller"
+	tristate "BCM2835 SPI auxiliary controller"
 	depends on ARCH_BCM2835 || COMPILE_TEST
 	depends on GPIOLIB
-	select SOC_BCM2835_AUX
 	help
 	  This selects a driver for the Broadcom BCM2835 SPI aux master.
 
 	  The BCM2835 contains two types of SPI master controller; the
 	  "universal SPI master", and the regular SPI controller.
-	  This driver is for the universal/auxiliar SPI controller.
+	  This driver is for the universal/auxiliary SPI controller.
 
 config SPI_BFIN5XX
 	tristate "SPI controller driver for ADI Blackfin5xx"
diff --git a/drivers/spi/spi-bcm2835aux.c b/drivers/spi/spi-bcm2835aux.c
index d968647..3451ecb 100644
--- a/drivers/spi/spi-bcm2835aux.c
+++ b/drivers/spi/spi-bcm2835aux.c
@@ -1,5 +1,5 @@
 /*
- * Driver for Broadcom BCM2835 SPI Controllers
+ * Driver for Broadcom BCM2835 auxiliary SPI Controllers
  *
  * the driver does not rely on the native chipselects at all
  * but only uses the gpio type chipselects
@@ -26,7 +26,6 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
-#include <linux/soc/bcm/bcm2835-aux.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
@@ -38,27 +37,10 @@
 #include <linux/spinlock.h>
 
 /*
- * shared aux registers between spi1/spi2 and uart1
- *
- * these defines could go to a separate module if needed
- * so that it can also get used with the uart1 implementation
- * when it materializes.
- */
-
-/* the AUX register offsets */
-#define BCM2835_AUX_IRQ		0x00
-#define BCM2835_AUX_ENABLE	0x04
-
-/* the AUX Bitfield identical for both register */
-#define BCM2835_AUX_BIT_UART	0x00000001
-#define BCM2835_AUX_BIT_SPI1	0x00000002
-#define BCM2835_AUX_BIT_SPI2	0x00000004
-
-/*
  * spi register defines
  *
  * note there is garbage in the "official" documentation,
- * so somedata taken from the file:
+ * so some data is taken from the file:
  *   brcm_usrlib/dag/vmcsx/vcinclude/bcm2708_chip/aux_io.h
  * inside of:
  *   http://www.broadcom.com/docs/support/videocore/Brcm_Android_ICS_Graphics_Stack.tar.gz
@@ -113,9 +95,6 @@
 #define BCM2835_AUX_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \
 				  | SPI_NO_CS)
 
-#define DRV_NAME	"spi-bcm2835aux"
-#define ENABLE_PROPERTY "brcm,aux-enable"
-
 struct bcm2835aux_spi {
 	void __iomem *regs;
 	struct clk *clk;
@@ -450,26 +429,17 @@ static int bcm2835aux_spi_probe(struct platform_device *pdev)
 		goto out_clk_disable;
 	}
 
-	/* enable HW block */
-	err = bcm2835aux_enable(&pdev->dev, ENABLE_PROPERTY);
-	if (err) {
-		dev_err(&pdev->dev, "could not enable aux: %d\n", err);
-		goto out_clk_disable;
-	}
-
 	/* reset SPI-HW block */
 	bcm2835aux_spi_reset_hw(bs);
 
 	err = devm_spi_register_master(&pdev->dev, master);
 	if (err) {
 		dev_err(&pdev->dev, "could not register SPI master: %d\n", err);
-		goto out_hw_disable;
+		goto out_clk_disable;
 	}
 
 	return 0;
 
-out_hw_disable:
-	bcm2835aux_disable(&pdev->dev, ENABLE_PROPERTY);
 out_clk_disable:
 	clk_disable_unprepare(bs->clk);
 out_master_put:
@@ -482,13 +452,10 @@ static int bcm2835aux_spi_remove(struct platform_device *pdev)
 	struct spi_master *master = platform_get_drvdata(pdev);
 	struct bcm2835aux_spi *bs = spi_master_get_devdata(master);
 
-	/* Clear FIFOs, and disable the HW block */
-	clk_disable_unprepare(bs->clk);
-
 	bcm2835aux_spi_reset_hw(bs);
 
-	/* disable HW block */
-	bcm2835aux_disable(&pdev->dev, ENABLE_PROPERTY);
+	/* Clear FIFOs, and disable the HW block */
+	clk_disable_unprepare(bs->clk);
 
 	return 0;
 }
@@ -501,7 +468,7 @@ MODULE_DEVICE_TABLE(of, bcm2835aux_spi_match);
 
 static struct platform_driver bcm2835aux_spi_driver = {
 	.driver		= {
-		.name		= DRV_NAME,
+		.name		= "spi-bcm2835aux",
 		.of_match_table	= bcm2835aux_spi_match,
 	},
 	.probe		= bcm2835aux_spi_probe,
-- 
2.1.4

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Re: [PATCH v5 0/6] bcm2835: auxiliar device support for spi

[Alexander Stein]

Hi,
On Tuesday 08 September 2015 18:48:07, Eric Anholt wrote:
> I finally had a chance to sit down and look at what the hardware's doing
> with the enable bit (also, I've read a whole lot more of the hardware
> now, so I'm a lot faster at answering questions like this).  The enable
> bits are a clock gate off of the VPU clock.

Are any hardware documents about such things available (in public)?

> I knocked together the enable bits as a clock gate driver, since I'd
> just written very similar code for the audio domain clock driver (and I
> assume you are grumpy about how much time you've spent on this one
> stupid register).  It's up at
> https://github.com/anholt/linux/tree/bcm2835-clock-aux and I can submit
> it if you like the result.  I've compile tested it only, but I'm hoping
> you could just drop your aux SPI driver on top of it and have things
> work.

IMHO line 45 (https://github.com/anholt/linux/commit/facb4ba917a1b9f6c2ee0cea7d529acf55f584dd#diff-1b6f753c132811b3f6d70f5b31866950R45) should be like this
> onecell->clks = kzalloc(sizeof(*onecell->clks) * BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
or you will only allocate a single struct clk*.

Best regards,
Alexander

Re: [PATCH v5 0/6] bcm2835: auxiliar device support for spi

[Eric Anholt]

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Alexander Stein <alexanders83@web.de> writes:

> Hi,
> On Tuesday 08 September 2015 18:48:07, Eric Anholt wrote:
>> I finally had a chance to sit down and look at what the hardware's doing
>> with the enable bit (also, I've read a whole lot more of the hardware
>> now, so I'm a lot faster at answering questions like this).  The enable
>> bits are a clock gate off of the VPU clock.
>
> Are any hardware documents about such things available (in public)?

Nope, I just went through the HDL to see how things were routed.

>> I knocked together the enable bits as a clock gate driver, since I'd
>> just written very similar code for the audio domain clock driver (and I
>> assume you are grumpy about how much time you've spent on this one
>> stupid register).  It's up at
>> https://github.com/anholt/linux/tree/bcm2835-clock-aux and I can submit
>> it if you like the result.  I've compile tested it only, but I'm hoping
>> you could just drop your aux SPI driver on top of it and have things
>> work.
>
> IMHO line 45 (https://github.com/anholt/linux/commit/facb4ba917a1b9f6c2ee0cea7d529acf55f584dd#diff-1b6f753c132811b3f6d70f5b31866950R45) should be like this
>> onecell->clks = kzalloc(sizeof(*onecell->clks) * BCM2835_AUX_CLOCK_COUNT, GFP_KERNEL);
> or you will only allocate a single struct clk*.

Thanks, that was a bug in my other clock driver, too!

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Re: [PATCH v5 0/6] bcm2835: auxiliar device support for spi

[Noralf Trønnes]

Den 09.09.2015 03:48, skrev Eric Anholt:
> kernel@martin.sperl.org writes:
>
>> From: Martin Sperl <kernel@martin.sperl.org>
>>
>> The BCM2835 contains 3 auxiliar devices:
>> * spi1
>> * spi2
>> * uart1
>>
>> All of those 3 devices are enabled/disabled via a shared register,
>> which is set by default to be disabled.
>>
>> Access to this register needs to get serialized.
>>
>> So after several iterations of discussions with the following ideas:
>> * syscon - device tree should describe HW not drivers to use -
>>             'compatiblity = "brcm,bcm2835-aux-enable", "syscon";'
>>             is not acceptable
>> * regulator - it is not necessarily a regulator or a power gate
>>                that is implemented in HW, so it is not valid to use
>>                this framework
>>
>> The recommendation was made to create a new minimal API in soc
>> just for access to this shared enable/disable register.
>>
>> This patch-series implements:
>> * the bcm2835-auxiliar device enable/disable api in soc.
>> * the bcm2835-auxiliar spi device driver
>>
>> The uart1 device driver (ns16550 based) is not implemented so far
>> but would be using the same API.
>>
>> Both spi and uart drivers can run with shared interrupts,
>> so there is no need for an interrupt-controller to get implemented.
> I finally had a chance to sit down and look at what the hardware's doing
> with the enable bit (also, I've read a whole lot more of the hardware
> now, so I'm a lot faster at answering questions like this).  The enable
> bits are a clock gate off of the VPU clock.
>
> I knocked together the enable bits as a clock gate driver, since I'd
> just written very similar code for the audio domain clock driver (and I
> assume you are grumpy about how much time you've spent on this one
> stupid register).  It's up at
> https://github.com/anholt/linux/tree/bcm2835-clock-aux and I can submit
> it if you like the result.  I've compile tested it only, but I'm hoping
> you could just drop your aux SPI driver on top of it and have things
> work.
>

This looks interesting.
But there's a challenge with the uart1 and the 8250 driver.

Phil Elwell has this to say:
This means that that UART1 isn't an exact clone of a 8250 UART.
In a particular, the clock divisor is calculated differently.
A standard 8250 derives the baud rate as clock/(divisor16),
whereas the BCM2835 mini UART uses clock/(divisor8). This means
that if you want to use the standard driver then you need to lie
about the clock frequency, providing a value is twice the real
value, in order for a suitable divisor to be calculated.

Ref: https://github.com/raspberrypi/linux/pull/1008#issuecomment-139234607

So either we need a new uart1 driver or a doubled clock freq. somehow.


Noralf.

Re: [PATCH v5 0/6] bcm2835: auxiliar device support for spi

[Martin Sperl]

> On 10.09.2015, at 17:48, Noralf Trønnes <noralf@tronnes.org> wrote:
> 
> This looks interesting.
> But there's a challenge with the uart1 and the 8250 driver.
> 
> Phil Elwell has this to say:
> This means that that UART1 isn't an exact clone of a 8250 UART.
> In a particular, the clock divisor is calculated differently.
> A standard 8250 derives the baud rate as clock/(divisor16),
> whereas the BCM2835 mini UART uses clock/(divisor8). This means
> that if you want to use the standard driver then you need to lie
> about the clock frequency, providing a value is twice the real
> value, in order for a suitable divisor to be calculated.
> 
> Ref: https://github.com/raspberrypi/linux/pull/1008#issuecomment-139234607
> 
> So either we need a new uart1 driver or a doubled clock freq. somehow.

Found out the same thing and communicated it to Eric - not 
knowing about the different divider…

Martin

Re: [PATCH v5 0/6] bcm2835: auxiliar device support for spi

[Phil Elwell]

[ Sending again in plain text ]
Noralf pointed me at fixed-factor-clock, and that works in our
(downstream) environment:

    soc: soc {
        ...
        uart1: uart@7e215040 {
            compatible = "brcm,bcm2835-aux-uart", "ns16550";
            reg = <0x7e215040 0x40>;
            interrupts = <1 29>;
            clocks = <&clk_uart1>;
            reg-shift = <2>;
            no-loopback-test;
            status = "disabled";
            };
    };

    clocks: clocks {
        ...
        clk_core: clock@2 {
            compatible = "fixed-clock";
            reg = <2>;
            #clock-cells = <0>;
            clock-output-names = "core";
            clock-frequency = <250000000>;
        };
        ...
        clk_uart1: clock@6 {
            compatible = "fixed-factor-clock";
            clocks = <&clk_core>;
            #clock-cells = <0>;
            clock-div = <1>;
            clock-mult = <2>;
        };
    };

Phil

On 10/09/2015 16:57, Martin Sperl wrote:
>> On 10.09.2015, at 17:48, Noralf Trønnes <noralf@tronnes.org> wrote:
>>
>> This looks interesting.
>> But there's a challenge with the uart1 and the 8250 driver.
>>
>> Phil Elwell has this to say:
>> This means that that UART1 isn't an exact clone of a 8250 UART.
>> In a particular, the clock divisor is calculated differently.
>> A standard 8250 derives the baud rate as clock/(divisor16),
>> whereas the BCM2835 mini UART uses clock/(divisor8). This means
>> that if you want to use the standard driver then you need to lie
>> about the clock frequency, providing a value is twice the real
>> value, in order for a suitable divisor to be calculated.
>>
>> Ref: https://github.com/raspberrypi/linux/pull/1008#issuecomment-139234607
>>
>> So either we need a new uart1 driver or a doubled clock freq. somehow.
> Found out the same thing and communicated it to Eric - not 
> knowing about the different divider…
>
> Martin



On 10/09/2015 16:57, Martin Sperl wrote:
>> On 10.09.2015, at 17:48, Noralf Trønnes <noralf@tronnes.org> wrote:
>>
>> This looks interesting.
>> But there's a challenge with the uart1 and the 8250 driver.
>>
>> Phil Elwell has this to say:
>> This means that that UART1 isn't an exact clone of a 8250 UART.
>> In a particular, the clock divisor is calculated differently.
>> A standard 8250 derives the baud rate as clock/(divisor16),
>> whereas the BCM2835 mini UART uses clock/(divisor8). This means
>> that if you want to use the standard driver then you need to lie
>> about the clock frequency, providing a value is twice the real
>> value, in order for a suitable divisor to be calculated.
>>
>> Ref: https://github.com/raspberrypi/linux/pull/1008#issuecomment-139234607
>>
>> So either we need a new uart1 driver or a doubled clock freq. somehow.
> Found out the same thing and communicated it to Eric - not 
> knowing about the different divider…
>
> Martin