From: Xing Zheng <zhengxing@rock-chips.com>
To: heiko@sntech.de
Cc: linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org,
zhengxing@rock-chips.com
Subject: [PATCH v2 8/9] ARM: rockchip: add support smp for rk3036
Date: Thu, 17 Sep 2015 18:38:06 +0800 [thread overview]
Message-ID: <1442486286-1873-1-git-send-email-zhengxing@rock-chips.com> (raw)
In-Reply-To: <1442478540-15068-1-git-send-email-zhengxing@rock-chips.com>
The rk3036 is dual-core soc, we can use this patch to enable cpu1
enter boot secondary, and hotplug(online/offline).
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
---
Changes in v2: None
arch/arm/mach-rockchip/platsmp.c | 121 ++++++++++++++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
diff --git a/arch/arm/mach-rockchip/platsmp.c b/arch/arm/mach-rockchip/platsmp.c
index 3e7a4b7..14218eb 100644
--- a/arch/arm/mach-rockchip/platsmp.c
+++ b/arch/arm/mach-rockchip/platsmp.c
@@ -34,6 +34,8 @@
static void __iomem *scu_base_addr;
static void __iomem *sram_base_addr;
+static void __iomem *cru_base_addr;
+
static int ncores;
#define PMU_PWRDN_CON 0x08
@@ -41,6 +43,8 @@ static int ncores;
#define PMU_PWRDN_SCU 4
+#define RK3036_SOFTRST_CON(x) ((x) * 0x4 + 0x110)
+
static struct regmap *pmu;
static int pmu_power_domain_is_on(int pd)
@@ -184,6 +188,7 @@ static int __init rockchip_smp_prepare_sram(struct device_node *node)
}
rsize = resource_size(&res);
+
if (rsize < trampoline_sz) {
pr_err("%s: reserved block with size 0x%x is to small for trampoline size 0x%x\n",
__func__, rsize, trampoline_sz);
@@ -350,3 +355,119 @@ static struct smp_operations rockchip_smp_ops __initdata = {
};
CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops);
+
+/* for rk3036 */
+
+static int rk3036_set_power_domain(int pd, bool on)
+{
+ /* there are 2cpus on rk3036 soc, we just need to be care cpu1 */
+ if (pd != 1)
+ return 0;
+
+ if (on)
+ writel_relaxed(0x20000, cru_base_addr + RK3036_SOFTRST_CON(0));
+ else
+ writel_relaxed(0x20002, cru_base_addr + RK3036_SOFTRST_CON(0));
+
+ dsb();
+
+ return 0;
+}
+
+static void __init rk3036_smp_prepare_cpus(unsigned int max_cpus)
+{
+ struct device_node *node;
+ unsigned int l2ctlr;
+ unsigned int i, cpu;
+
+ /* get cru_base_addr */
+ node = of_find_compatible_node(NULL, NULL, "rockchip,rk3036-cru");
+ if (!node) {
+ pr_err("%s: could not find cru dt node\n", __func__);
+ return;
+ }
+
+ cru_base_addr = of_iomap(node, 0);
+ if (!cru_base_addr) {
+ pr_err("%s: could not map cru registers\n", __func__);
+ return;
+ }
+
+ /* get sram_base_addr */
+ node = of_find_compatible_node(NULL, NULL, "rockchip,rk3036-smp-sram");
+ if (!node) {
+ pr_err("%s: could not find sram dt node\n", __func__);
+ return;
+ }
+
+ sram_base_addr = of_iomap(node, 0);
+ if (!sram_base_addr) {
+ pr_err("%s: could not map sram registers\n", __func__);
+ return;
+ }
+
+ /* get ncores */
+ asm ("mrc p15, 1, %0, c9, c0, 2\n" : "=r" (l2ctlr));
+ ncores = ((l2ctlr >> 24) & 0x3) + 1;
+ cpu = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 0);
+
+ /* Make sure that all cores except the first are really off */
+ for (i = 1; i < ncores; i++)
+ rk3036_set_power_domain(0 + i, false);
+}
+
+static int rk3036_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+ if (cpu >= ncores) {
+ pr_err("%s: cpu %d outside maximum number of cpus %d\n",
+ __func__, cpu, ncores);
+ return -ENXIO;
+ }
+
+ /* start the core */
+ rk3036_set_power_domain(0 + cpu, true);
+
+ /*
+ * We need to wait a moment after soft reset CPUx on rk3036,
+ * otherwise, CPUx will startup failed.
+ */
+ udelay(10);
+ writel(virt_to_phys(secondary_startup), sram_base_addr + 8);
+ writel(0xDEADBEAF, sram_base_addr + 4);
+ dsb_sev();
+
+ return 0;
+}
+
+#ifdef CONFIG_HOTPLUG_CPU
+static int rk3066_cpu_kill(unsigned int cpu)
+{
+ /*
+ * We need a delay here to ensure that the dying CPU can finish
+ * executing v7_coherency_exit() and reach the WFI/WFE state
+ * prior to having the power domain disabled.
+ */
+ mdelay(1);
+
+ rk3036_set_power_domain(0 + cpu, false);
+
+ return 1;
+}
+
+static void rk3066_cpu_die(unsigned int cpu)
+{
+ v7_exit_coherency_flush(louis);
+ while (1)
+ cpu_do_idle();
+}
+#endif
+
+static struct smp_operations rk3036_smp_ops __initdata = {
+ .smp_prepare_cpus = rk3036_smp_prepare_cpus,
+ .smp_boot_secondary = rk3036_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_kill = rk3066_cpu_kill,
+ .cpu_die = rk3066_cpu_die,
+#endif
+};
+CPU_METHOD_OF_DECLARE(rk3036_smp, "rockchip,rk3036-smp", &rk3036_smp_ops);
--
1.7.9.5
next prev parent reply other threads:[~2015-09-17 10:38 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-17 8:28 [PATCH v2 0/9] Build and support rk3036 SoC platform Xing Zheng
2015-09-17 8:28 ` [PATCH v2 1/9] ARM: dts: rockchip: add core rk3036 dts Xing Zheng
2015-09-17 9:18 ` Heiko Stübner
2015-09-24 2:18 ` Xing Zheng
2015-09-17 8:28 ` [PATCH v2 2/9] clk: rockchip: add dt-binding header for rk3036 Xing Zheng
2015-09-17 9:25 ` Heiko Stübner
2015-09-24 2:17 ` Xing Zheng
2015-09-17 8:28 ` [PATCH v2 3/9] clk: rockchip: add clock controller " Xing Zheng
2015-09-17 9:47 ` Heiko Stübner
2015-09-24 3:04 ` Xing Zheng
2015-09-24 3:31 ` Xing Zheng
2015-10-07 10:24 ` Heiko Stuebner
2015-09-17 8:28 ` [PATCH v2 4/9] clk: rockchip: add new clock type and " Xing Zheng
2015-09-17 9:54 ` Heiko Stübner
2015-09-22 22:41 ` Stephen Boyd
2015-09-22 22:58 ` Heiko Stübner
2015-09-22 23:19 ` Stephen Boyd
2015-09-30 23:32 ` Heiko Stübner
2015-10-01 0:51 ` Stephen Boyd
2015-09-17 9:59 ` [PATCH v2 0/9] Build and support rk3036 SoC platform Heiko Stübner
2015-09-17 10:32 ` [PATCH v2 5/9] dt-bindings: add documentation of rk3036 clock controller Xing Zheng
2015-09-17 15:09 ` Heiko Stübner
2015-09-24 3:42 ` Xing Zheng
2015-09-17 10:34 ` [PATCH v2 6/9] pinctrl: rockchip: add support for the rk3036 Xing Zheng
2015-09-17 12:47 ` Heiko Stübner
2015-09-17 10:37 ` [PATCH v2 7/9] rockchip: make sure timer5 is enabled on rk3036 platforms Xing Zheng
2015-09-17 15:05 ` Heiko Stübner
2015-09-28 12:25 ` Xing Zheng
2015-09-28 12:44 ` Heiko Stübner
2015-09-28 12:53 ` Xing Zheng
2015-09-17 10:38 ` Xing Zheng [this message]
2015-09-17 20:15 ` [PATCH v2 8/9] ARM: rockchip: add support smp for rk3036 Heiko Stübner
2015-09-28 11:50 ` Xing Zheng
2015-09-17 10:39 ` [PATCH v2 9/9] rtc: hym8563: make sure hym8563 can be normal work Xing Zheng
2015-09-17 12:07 ` Heiko Stübner
2015-09-17 12:31 ` Alexandre Belloni
2015-09-17 12:44 ` Xing Zheng
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