[PATCH 0/4] add support for GICv3 on the Foundation model

[PATCH 0/4] add support for GICv3 on the Foundation model

[Andre Przywara]

Hi,

the freely available ARM Foundation model [1] supports emulating a
GICv3 interrupt controller (--gicv3).
To provide the kernel with the proper information, prepare the
existing model .dts to be split up and eventually create a new .dts
file which can be used to boot a kernel using the GICv3 in the model.

Patch 1/4 changes the common device tree to allow sharing most of the
definitions later, while patch 2/4 is a drive-by-fix to add support
for the recently enabled EOImode=1.
Patch 3/4 splits the existing DT up to have a common .dtsi file and a
stub foundation-v8.dts in preparation for the final patch 4/4, which
adds a new foundation-v8-gicv3.dts that has the required GICv3 node.

Together with the GICv3 support of the bootwrapper this allows to boot
Linux and make it use the GICv3 interrupt controller.

Cheers,
Andre.

[1]: http://www.arm.com/products/tools/models/fast-models/foundation-model.php

Andre Przywara (4):
  arm64: dts: prepare foundation-v8.dts to cope with GICv3
  arm64: dts: Foundation model: increate GICC region to allow EOImode=1
  arm64: dts: split Foundation model dts to put the GIC separately
  arm64: dts: add .dts for GICv3 Foundation model

 arch/arm64/boot/dts/arm/Makefile                   |   2 +-
 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts    |  30 +++
 arch/arm64/boot/dts/arm/foundation-v8.dts          | 227 +--------------------
 .../arm/{foundation-v8.dts => foundation-v8.dtsi}  |  98 ++++-----
 4 files changed, 78 insertions(+), 279 deletions(-)
 create mode 100644 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
 copy arch/arm64/boot/dts/arm/{foundation-v8.dts => foundation-v8.dtsi} (73%)

-- 
2.5.1

[PATCH 1/4] arm64: dts: prepare foundation-v8.dts to cope with GICv3

[Andre Przywara]

To prepare the ARM foundation model to support GICv3, we adjust
the #address-cells property of the current GICv2 node to be
compatible with the two cells required for GICv3 later.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/arm/foundation-v8.dts | 88 +++++++++++++++----------------
 1 file changed, 44 insertions(+), 44 deletions(-)

diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 4eac8dc..3c5595d 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -75,7 +75,7 @@
 	gic: interrupt-controller@2c001000 {
 		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 		#interrupt-cells = <3>;
-		#address-cells = <0>;
+		#address-cells = <2>;
 		interrupt-controller;
 		reg = <0x0 0x2c001000 0 0x1000>,
 		      <0x0 0x2c002000 0 0x1000>,
@@ -116,49 +116,49 @@
 
 		#interrupt-cells = <1>;
 		interrupt-map-mask = <0 0 63>;
-		interrupt-map = <0 0  0 &gic 0  0 4>,
-				<0 0  1 &gic 0  1 4>,
-				<0 0  2 &gic 0  2 4>,
-				<0 0  3 &gic 0  3 4>,
-				<0 0  4 &gic 0  4 4>,
-				<0 0  5 &gic 0  5 4>,
-				<0 0  6 &gic 0  6 4>,
-				<0 0  7 &gic 0  7 4>,
-				<0 0  8 &gic 0  8 4>,
-				<0 0  9 &gic 0  9 4>,
-				<0 0 10 &gic 0 10 4>,
-				<0 0 11 &gic 0 11 4>,
-				<0 0 12 &gic 0 12 4>,
-				<0 0 13 &gic 0 13 4>,
-				<0 0 14 &gic 0 14 4>,
-				<0 0 15 &gic 0 15 4>,
-				<0 0 16 &gic 0 16 4>,
-				<0 0 17 &gic 0 17 4>,
-				<0 0 18 &gic 0 18 4>,
-				<0 0 19 &gic 0 19 4>,
-				<0 0 20 &gic 0 20 4>,
-				<0 0 21 &gic 0 21 4>,
-				<0 0 22 &gic 0 22 4>,
-				<0 0 23 &gic 0 23 4>,
-				<0 0 24 &gic 0 24 4>,
-				<0 0 25 &gic 0 25 4>,
-				<0 0 26 &gic 0 26 4>,
-				<0 0 27 &gic 0 27 4>,
-				<0 0 28 &gic 0 28 4>,
-				<0 0 29 &gic 0 29 4>,
-				<0 0 30 &gic 0 30 4>,
-				<0 0 31 &gic 0 31 4>,
-				<0 0 32 &gic 0 32 4>,
-				<0 0 33 &gic 0 33 4>,
-				<0 0 34 &gic 0 34 4>,
-				<0 0 35 &gic 0 35 4>,
-				<0 0 36 &gic 0 36 4>,
-				<0 0 37 &gic 0 37 4>,
-				<0 0 38 &gic 0 38 4>,
-				<0 0 39 &gic 0 39 4>,
-				<0 0 40 &gic 0 40 4>,
-				<0 0 41 &gic 0 41 4>,
-				<0 0 42 &gic 0 42 4>;
+		interrupt-map = <0 0  0 &gic 0 0 0  0 4>,
+				<0 0  1 &gic 0 0 0  1 4>,
+				<0 0  2 &gic 0 0 0  2 4>,
+				<0 0  3 &gic 0 0 0  3 4>,
+				<0 0  4 &gic 0 0 0  4 4>,
+				<0 0  5 &gic 0 0 0  5 4>,
+				<0 0  6 &gic 0 0 0  6 4>,
+				<0 0  7 &gic 0 0 0  7 4>,
+				<0 0  8 &gic 0 0 0  8 4>,
+				<0 0  9 &gic 0 0 0  9 4>,
+				<0 0 10 &gic 0 0 0 10 4>,
+				<0 0 11 &gic 0 0 0 11 4>,
+				<0 0 12 &gic 0 0 0 12 4>,
+				<0 0 13 &gic 0 0 0 13 4>,
+				<0 0 14 &gic 0 0 0 14 4>,
+				<0 0 15 &gic 0 0 0 15 4>,
+				<0 0 16 &gic 0 0 0 16 4>,
+				<0 0 17 &gic 0 0 0 17 4>,
+				<0 0 18 &gic 0 0 0 18 4>,
+				<0 0 19 &gic 0 0 0 19 4>,
+				<0 0 20 &gic 0 0 0 20 4>,
+				<0 0 21 &gic 0 0 0 21 4>,
+				<0 0 22 &gic 0 0 0 22 4>,
+				<0 0 23 &gic 0 0 0 23 4>,
+				<0 0 24 &gic 0 0 0 24 4>,
+				<0 0 25 &gic 0 0 0 25 4>,
+				<0 0 26 &gic 0 0 0 26 4>,
+				<0 0 27 &gic 0 0 0 27 4>,
+				<0 0 28 &gic 0 0 0 28 4>,
+				<0 0 29 &gic 0 0 0 29 4>,
+				<0 0 30 &gic 0 0 0 30 4>,
+				<0 0 31 &gic 0 0 0 31 4>,
+				<0 0 32 &gic 0 0 0 32 4>,
+				<0 0 33 &gic 0 0 0 33 4>,
+				<0 0 34 &gic 0 0 0 34 4>,
+				<0 0 35 &gic 0 0 0 35 4>,
+				<0 0 36 &gic 0 0 0 36 4>,
+				<0 0 37 &gic 0 0 0 37 4>,
+				<0 0 38 &gic 0 0 0 38 4>,
+				<0 0 39 &gic 0 0 0 39 4>,
+				<0 0 40 &gic 0 0 0 40 4>,
+				<0 0 41 &gic 0 0 0 41 4>,
+				<0 0 42 &gic 0 0 0 42 4>;
 
 		ethernet@2,02000000 {
 			compatible = "smsc,lan91c111";
-- 
2.5.1

[PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1

[Andre Przywara]

Recent commits made the GIC driver use EOImode=1 for all GICs
that advertise the proper GICC region size.
To let the model benefit from the blessings of that mode, increase
the GICC region to its actual size of 8K.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/arm/foundation-v8.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 3c5595d..57ad9fe 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -78,7 +78,7 @@
 		#address-cells = <2>;
 		interrupt-controller;
 		reg = <0x0 0x2c001000 0 0x1000>,
-		      <0x0 0x2c002000 0 0x1000>,
+		      <0x0 0x2c002000 0 0x2000>,
 		      <0x0 0x2c004000 0 0x2000>,
 		      <0x0 0x2c006000 0 0x2000>;
 		interrupts = <1 9 0xf04>;
-- 
2.5.1

[PATCH 3/4] arm64: dts: split Foundation model dts to put the GIC separately

[Andre Przywara]

The ARMv8 Foundation model can be run with a GICv2 or a GICv3.
To prepare for the GICv3 version of the .dts without code duplication,
move most of the nodes of the existing DT (except the GIC) into an
include file and just keep that include statement and the GIC node in
the current foundation-v8.dts.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/arm/foundation-v8.dts          | 223 +--------------------
 .../arm/{foundation-v8.dts => foundation-v8.dtsi}  |  12 --
 2 files changed, 2 insertions(+), 233 deletions(-)
 copy arch/arm64/boot/dts/arm/{foundation-v8.dts => foundation-v8.dtsi} (93%)

diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 57ad9fe..7116807 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -1,77 +1,12 @@
 /*
  * ARM Ltd.
  *
- * ARMv8 Foundation model DTS
+ * ARMv8 Foundation model DTS (GICv2 configuration)
  */
 
-/dts-v1/;
-
-/memreserve/ 0x80000000 0x00010000;
+#include "foundation-v8.dtsi"
 
 / {
-	model = "Foundation-v8A";
-	compatible = "arm,foundation-aarch64", "arm,vexpress";
-	interrupt-parent = <&gic>;
-	#address-cells = <2>;
-	#size-cells = <2>;
-
-	chosen { };
-
-	aliases {
-		serial0 = &v2m_serial0;
-		serial1 = &v2m_serial1;
-		serial2 = &v2m_serial2;
-		serial3 = &v2m_serial3;
-	};
-
-	cpus {
-		#address-cells = <2>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x0>;
-			enable-method = "spin-table";
-			cpu-release-addr = <0x0 0x8000fff8>;
-			next-level-cache = <&L2_0>;
-		};
-		cpu@1 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x1>;
-			enable-method = "spin-table";
-			cpu-release-addr = <0x0 0x8000fff8>;
-			next-level-cache = <&L2_0>;
-		};
-		cpu@2 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x2>;
-			enable-method = "spin-table";
-			cpu-release-addr = <0x0 0x8000fff8>;
-			next-level-cache = <&L2_0>;
-		};
-		cpu@3 {
-			device_type = "cpu";
-			compatible = "arm,armv8";
-			reg = <0x0 0x3>;
-			enable-method = "spin-table";
-			cpu-release-addr = <0x0 0x8000fff8>;
-			next-level-cache = <&L2_0>;
-		};
-
-		L2_0: l2-cache0 {
-			compatible = "cache";
-		};
-	};
-
-	memory@80000000 {
-		device_type = "memory";
-		reg = <0x00000000 0x80000000 0 0x80000000>,
-		      <0x00000008 0x80000000 0 0x80000000>;
-	};
-
 	gic: interrupt-controller@2c001000 {
 		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
 		#interrupt-cells = <3>;
@@ -83,158 +18,4 @@
 		      <0x0 0x2c006000 0 0x2000>;
 		interrupts = <1 9 0xf04>;
 	};
-
-	timer {
-		compatible = "arm,armv8-timer";
-		interrupts = <1 13 0xf08>,
-			     <1 14 0xf08>,
-			     <1 11 0xf08>,
-			     <1 10 0xf08>;
-		clock-frequency = <100000000>;
-	};
-
-	pmu {
-		compatible = "arm,armv8-pmuv3";
-		interrupts = <0 60 4>,
-			     <0 61 4>,
-			     <0 62 4>,
-			     <0 63 4>;
-	};
-
-	smb {
-		compatible = "arm,vexpress,v2m-p1", "simple-bus";
-		arm,v2m-memory-map = "rs1";
-		#address-cells = <2>; /* SMB chipselect number and offset */
-		#size-cells = <1>;
-
-		ranges = <0 0 0 0x08000000 0x04000000>,
-			 <1 0 0 0x14000000 0x04000000>,
-			 <2 0 0 0x18000000 0x04000000>,
-			 <3 0 0 0x1c000000 0x04000000>,
-			 <4 0 0 0x0c000000 0x04000000>,
-			 <5 0 0 0x10000000 0x04000000>;
-
-		#interrupt-cells = <1>;
-		interrupt-map-mask = <0 0 63>;
-		interrupt-map = <0 0  0 &gic 0 0 0  0 4>,
-				<0 0  1 &gic 0 0 0  1 4>,
-				<0 0  2 &gic 0 0 0  2 4>,
-				<0 0  3 &gic 0 0 0  3 4>,
-				<0 0  4 &gic 0 0 0  4 4>,
-				<0 0  5 &gic 0 0 0  5 4>,
-				<0 0  6 &gic 0 0 0  6 4>,
-				<0 0  7 &gic 0 0 0  7 4>,
-				<0 0  8 &gic 0 0 0  8 4>,
-				<0 0  9 &gic 0 0 0  9 4>,
-				<0 0 10 &gic 0 0 0 10 4>,
-				<0 0 11 &gic 0 0 0 11 4>,
-				<0 0 12 &gic 0 0 0 12 4>,
-				<0 0 13 &gic 0 0 0 13 4>,
-				<0 0 14 &gic 0 0 0 14 4>,
-				<0 0 15 &gic 0 0 0 15 4>,
-				<0 0 16 &gic 0 0 0 16 4>,
-				<0 0 17 &gic 0 0 0 17 4>,
-				<0 0 18 &gic 0 0 0 18 4>,
-				<0 0 19 &gic 0 0 0 19 4>,
-				<0 0 20 &gic 0 0 0 20 4>,
-				<0 0 21 &gic 0 0 0 21 4>,
-				<0 0 22 &gic 0 0 0 22 4>,
-				<0 0 23 &gic 0 0 0 23 4>,
-				<0 0 24 &gic 0 0 0 24 4>,
-				<0 0 25 &gic 0 0 0 25 4>,
-				<0 0 26 &gic 0 0 0 26 4>,
-				<0 0 27 &gic 0 0 0 27 4>,
-				<0 0 28 &gic 0 0 0 28 4>,
-				<0 0 29 &gic 0 0 0 29 4>,
-				<0 0 30 &gic 0 0 0 30 4>,
-				<0 0 31 &gic 0 0 0 31 4>,
-				<0 0 32 &gic 0 0 0 32 4>,
-				<0 0 33 &gic 0 0 0 33 4>,
-				<0 0 34 &gic 0 0 0 34 4>,
-				<0 0 35 &gic 0 0 0 35 4>,
-				<0 0 36 &gic 0 0 0 36 4>,
-				<0 0 37 &gic 0 0 0 37 4>,
-				<0 0 38 &gic 0 0 0 38 4>,
-				<0 0 39 &gic 0 0 0 39 4>,
-				<0 0 40 &gic 0 0 0 40 4>,
-				<0 0 41 &gic 0 0 0 41 4>,
-				<0 0 42 &gic 0 0 0 42 4>;
-
-		ethernet@2,02000000 {
-			compatible = "smsc,lan91c111";
-			reg = <2 0x02000000 0x10000>;
-			interrupts = <15>;
-		};
-
-		v2m_clk24mhz: clk24mhz {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <24000000>;
-			clock-output-names = "v2m:clk24mhz";
-		};
-
-		v2m_refclk1mhz: refclk1mhz {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <1000000>;
-			clock-output-names = "v2m:refclk1mhz";
-		};
-
-		v2m_refclk32khz: refclk32khz {
-			compatible = "fixed-clock";
-			#clock-cells = <0>;
-			clock-frequency = <32768>;
-			clock-output-names = "v2m:refclk32khz";
-		};
-
-		iofpga@3,00000000 {
-			compatible = "arm,amba-bus", "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges = <0 3 0 0x200000>;
-
-			v2m_sysreg: sysreg@010000 {
-				compatible = "arm,vexpress-sysreg";
-				reg = <0x010000 0x1000>;
-			};
-
-			v2m_serial0: uart@090000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x090000 0x1000>;
-				interrupts = <5>;
-				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-				clock-names = "uartclk", "apb_pclk";
-			};
-
-			v2m_serial1: uart@0a0000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0a0000 0x1000>;
-				interrupts = <6>;
-				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-				clock-names = "uartclk", "apb_pclk";
-			};
-
-			v2m_serial2: uart@0b0000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0b0000 0x1000>;
-				interrupts = <7>;
-				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-				clock-names = "uartclk", "apb_pclk";
-			};
-
-			v2m_serial3: uart@0c0000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0c0000 0x1000>;
-				interrupts = <8>;
-				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-				clock-names = "uartclk", "apb_pclk";
-			};
-
-			virtio_block@0130000 {
-				compatible = "virtio,mmio";
-				reg = <0x130000 0x200>;
-				interrupts = <42>;
-			};
-		};
-	};
 };
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
similarity index 93%
copy from arch/arm64/boot/dts/arm/foundation-v8.dts
copy to arch/arm64/boot/dts/arm/foundation-v8.dtsi
index 57ad9fe..9314f39 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -72,18 +72,6 @@
 		      <0x00000008 0x80000000 0 0x80000000>;
 	};
 
-	gic: interrupt-controller@2c001000 {
-		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
-		#interrupt-cells = <3>;
-		#address-cells = <2>;
-		interrupt-controller;
-		reg = <0x0 0x2c001000 0 0x1000>,
-		      <0x0 0x2c002000 0 0x2000>,
-		      <0x0 0x2c004000 0 0x2000>,
-		      <0x0 0x2c006000 0 0x2000>;
-		interrupts = <1 9 0xf04>;
-	};
-
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <1 13 0xf08>,
-- 
2.5.1

[PATCH 4/4] arm64: dts: add .dts for GICv3 Foundation model

[Andre Przywara]

The ARMv8 Foundation model sports a command line parameter to use
a GICv3 emulation instead of the default GICv2 interrupt controller.
Add a new .dts file which reuses most of the definitions of the
existing model while just adding the required properties for the
GICv3 node.
This allows the public Foundation model to run with a GICv3.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm64/boot/dts/arm/Makefile                |  2 +-
 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts | 30 +++++++++++++++++++++++++
 2 files changed, 31 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts

diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile
index bb3c072..46d342d 100644
--- a/arch/arm64/boot/dts/arm/Makefile
+++ b/arch/arm64/boot/dts/arm/Makefile
@@ -1,4 +1,4 @@
-dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb
+dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb foundation-v8-gicv3.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb
 dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
new file mode 100644
index 0000000..ecdbe98
--- /dev/null
+++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
@@ -0,0 +1,30 @@
+/*
+ * ARM Ltd.
+ *
+ * ARMv8 Foundation model DTS (GICv3 configuration)
+ */
+
+#include "foundation-v8.dtsi"
+
+/ {
+	gic: interrupt-controller@2f000000 {
+		compatible = "arm,gic-v3";
+		#interrupt-cells = <3>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		interrupt-controller;
+		reg =	<0x0 0x2f000000 0x0 0x10000>,
+			<0x0 0x2f100000 0x0 0x200000>,
+			<0x0 0x2c000000 0x0 0x2000>,
+			<0x0 0x2c010000 0x0 0x2000>,
+			<0x0 0x2c02f000 0x0 0x2000>;
+		interrupts = <1 9 0xf04>;
+
+		its: its@2f020000 {
+			compatible = "arm,gic-v3-its";
+			msi-controller;
+			reg = <0x0 0x2f020000 0x0 0x20000>;
+		};
+	};
+};
-- 
2.5.1

Re: [PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1

[Marc Zyngier]

Hi Andre,

s/increate/increase size of/ in the subject line

On 13/10/15 10:37, Andre Przywara wrote:
> Recent commits made the GIC driver use EOImode=1 for all GICs
> that advertise the proper GICC region size.

Well, it is not so much that the kernel uses EOImode=1, but the fact
that the model has a GICv2 implementation, hence a 8kB GICC region.

> To let the model benefit from the blessings of that mode, increase
> the GICC region to its actual size of 8K.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/arm/foundation-v8.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
> index 3c5595d..57ad9fe 100644
> --- a/arch/arm64/boot/dts/arm/foundation-v8.dts
> +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
> @@ -78,7 +78,7 @@
>  		#address-cells = <2>;
>  		interrupt-controller;
>  		reg = <0x0 0x2c001000 0 0x1000>,
> -		      <0x0 0x2c002000 0 0x1000>,
> +		      <0x0 0x2c002000 0 0x2000>,
>  		      <0x0 0x2c004000 0 0x2000>,
>  		      <0x0 0x2c006000 0 0x2000>;
>  		interrupts = <1 9 0xf04>;
> 

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH 4/4] arm64: dts: add .dts for GICv3 Foundation model

[Marc Zyngier]

On 13/10/15 10:37, Andre Przywara wrote:
> The ARMv8 Foundation model sports a command line parameter to use
> a GICv3 emulation instead of the default GICv2 interrupt controller.
> Add a new .dts file which reuses most of the definitions of the
> existing model while just adding the required properties for the
> GICv3 node.
> This allows the public Foundation model to run with a GICv3.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/arm/Makefile                |  2 +-
>  arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts | 30 +++++++++++++++++++++++++
>  2 files changed, 31 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
> 
> diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile
> index bb3c072..46d342d 100644
> --- a/arch/arm64/boot/dts/arm/Makefile
> +++ b/arch/arm64/boot/dts/arm/Makefile
> @@ -1,4 +1,4 @@
> -dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb
> +dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb foundation-v8-gicv3.dtb
>  dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb
>  dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb
>  dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
> new file mode 100644
> index 0000000..ecdbe98
> --- /dev/null
> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
> @@ -0,0 +1,30 @@
> +/*
> + * ARM Ltd.
> + *
> + * ARMv8 Foundation model DTS (GICv3 configuration)
> + */
> +
> +#include "foundation-v8.dtsi"
> +
> +/ {
> +	gic: interrupt-controller@2f000000 {
> +		compatible = "arm,gic-v3";
> +		#interrupt-cells = <3>;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +		interrupt-controller;
> +		reg =	<0x0 0x2f000000 0x0 0x10000>,
> +			<0x0 0x2f100000 0x0 0x200000>,
> +			<0x0 0x2c000000 0x0 0x2000>,
> +			<0x0 0x2c010000 0x0 0x2000>,
> +			<0x0 0x2c02f000 0x0 0x2000>;
> +		interrupts = <1 9 0xf04>;
> +
> +		its: its@2f020000 {
> +			compatible = "arm,gic-v3-its";
> +			msi-controller;
> +			reg = <0x0 0x2f020000 0x0 0x20000>;
> +		};
> +	};
> +};
> 

Do you know if the ITS has any modelled device connected to it? Not very
useful on its own, but you may want to use it as a way to inject IPIs
(just kidding, don't do that!).

	M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH 4/4] arm64: dts: add .dts for GICv3 Foundation model

[Andre Przywara]

Hi Marc,

On 13/10/15 11:44, Marc Zyngier wrote:
> On 13/10/15 10:37, Andre Przywara wrote:
>> The ARMv8 Foundation model sports a command line parameter to use
>> a GICv3 emulation instead of the default GICv2 interrupt controller.
>> Add a new .dts file which reuses most of the definitions of the
>> existing model while just adding the required properties for the
>> GICv3 node.
>> This allows the public Foundation model to run with a GICv3.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>>  arch/arm64/boot/dts/arm/Makefile                |  2 +-
>>  arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts | 30 +++++++++++++++++++++++++
>>  2 files changed, 31 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
>>
>> diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile
>> index bb3c072..46d342d 100644
>> --- a/arch/arm64/boot/dts/arm/Makefile
>> +++ b/arch/arm64/boot/dts/arm/Makefile
>> @@ -1,4 +1,4 @@
>> -dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb
>> +dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb foundation-v8-gicv3.dtb
>>  dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb
>>  dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb
>>  dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
>> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
>> new file mode 100644
>> index 0000000..ecdbe98
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
>> @@ -0,0 +1,30 @@
>> +/*
>> + * ARM Ltd.
>> + *
>> + * ARMv8 Foundation model DTS (GICv3 configuration)
>> + */
>> +
>> +#include "foundation-v8.dtsi"
>> +
>> +/ {
>> +	gic: interrupt-controller@2f000000 {
>> +		compatible = "arm,gic-v3";
>> +		#interrupt-cells = <3>;
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
>> +		ranges;
>> +		interrupt-controller;
>> +		reg =	<0x0 0x2f000000 0x0 0x10000>,
>> +			<0x0 0x2f100000 0x0 0x200000>,
>> +			<0x0 0x2c000000 0x0 0x2000>,
>> +			<0x0 0x2c010000 0x0 0x2000>,
>> +			<0x0 0x2c02f000 0x0 0x2000>;
>> +		interrupts = <1 9 0xf04>;
>> +
>> +		its: its@2f020000 {
>> +			compatible = "arm,gic-v3-its";
>> +			msi-controller;
>> +			reg = <0x0 0x2f020000 0x0 0x20000>;
>> +		};
>> +	};
>> +};
>>
> 
> Do you know if the ITS has any modelled device connected to it? Not very
> useful on its own, but you may want to use it as a way to inject IPIs
> (just kidding, don't do that!).

Well, the ITS itself is there (the driver initializes and all ID
registers match the ARM description).
I tried to squeeze in the PCI node from some other model, but there does
not seem to be any PCI controller at this address, so this panics.

If I get this correctly, the only kind of hardware the model emulates is
the virtio-blk (which is virtio/mmio and thus wired IRQ only?) and the
SMC LAN, which also does not support MSIs.

So indeed there seems to be no user of the ITS so far, but I tend to
leave the ITS node in here anyway: and does not seem to hurt and we get
at least some testing coverage of the basic ITS initialization code.

Cheers,
Andre.

Re: [PATCH 2/4] arm64: dts: Foundation model: increate GICC region to allow EOImode=1

[Marc Zyngier]

Hey Andre,

On 13/10/15 10:37, Andre Przywara wrote:
> Recent commits made the GIC driver use EOImode=1 for all GICs
> that advertise the proper GICC region size.
> To let the model benefit from the blessings of that mode, increase
> the GICC region to its actual size of 8K.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

The patch looks good, but the commit log is slightly confusing. Apart
from the typo in the title ("increate"), it would be better to say
something like:

"The Foundation model GIC mapping is wrong, as the GICC region should be
8kB instead of 4kB (the model implements the GICv2 architecture). This
defect prevents the driver from switching to EOImode==1."

Or something similar.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH 1/4] arm64: dts: prepare foundation-v8.dts to cope with GICv3

[Marc Zyngier]

On 13/10/15 10:37, Andre Przywara wrote:
> To prepare the ARM foundation model to support GICv3, we adjust
> the #address-cells property of the current GICv2 node to be
> compatible with the two cells required for GICv3 later.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH 3/4] arm64: dts: split Foundation model dts to put the GIC separately

[Marc Zyngier]

On 13/10/15 10:37, Andre Przywara wrote:
> The ARMv8 Foundation model can be run with a GICv2 or a GICv3.
> To prepare for the GICv3 version of the .dts without code duplication,
> move most of the nodes of the existing DT (except the GIC) into an
> include file and just keep that include statement and the GIC node in
> the current foundation-v8.dts.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
-- 
Jazz is not dead. It just smells funny...

Re: [PATCH 4/4] arm64: dts: add .dts for GICv3 Foundation model

[Marc Zyngier]

On 13/10/15 10:37, Andre Przywara wrote:
> The ARMv8 Foundation model sports a command line parameter to use
> a GICv3 emulation instead of the default GICv2 interrupt controller.
> Add a new .dts file which reuses most of the definitions of the
> existing model while just adding the required properties for the
> GICv3 node.
> This allows the public Foundation model to run with a GICv3.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
>  arch/arm64/boot/dts/arm/Makefile                |  2 +-
>  arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts | 30 +++++++++++++++++++++++++
>  2 files changed, 31 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
> 
> diff --git a/arch/arm64/boot/dts/arm/Makefile b/arch/arm64/boot/dts/arm/Makefile
> index bb3c072..46d342d 100644
> --- a/arch/arm64/boot/dts/arm/Makefile
> +++ b/arch/arm64/boot/dts/arm/Makefile
> @@ -1,4 +1,4 @@
> -dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb
> +dtb-$(CONFIG_ARCH_VEXPRESS) += foundation-v8.dtb foundation-v8-gicv3.dtb
>  dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb juno-r1.dtb
>  dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb
>  dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2f-1xv7-ca53x2.dtb
> diff --git a/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
> new file mode 100644
> index 0000000..ecdbe98
> --- /dev/null
> +++ b/arch/arm64/boot/dts/arm/foundation-v8-gicv3.dts
> @@ -0,0 +1,30 @@
> +/*
> + * ARM Ltd.
> + *
> + * ARMv8 Foundation model DTS (GICv3 configuration)
> + */
> +
> +#include "foundation-v8.dtsi"
> +
> +/ {
> +	gic: interrupt-controller@2f000000 {
> +		compatible = "arm,gic-v3";
> +		#interrupt-cells = <3>;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +		interrupt-controller;
> +		reg =	<0x0 0x2f000000 0x0 0x10000>,
> +			<0x0 0x2f100000 0x0 0x200000>,
> +			<0x0 0x2c000000 0x0 0x2000>,
> +			<0x0 0x2c010000 0x0 0x2000>,
> +			<0x0 0x2c02f000 0x0 0x2000>;
> +		interrupts = <1 9 0xf04>;

You can remove the 'f' from the GIC maintenance interrupt - this doesn't
mean anything on GICv3.

> +
> +		its: its@2f020000 {
> +			compatible = "arm,gic-v3-its";
> +			msi-controller;
> +			reg = <0x0 0x2f020000 0x0 0x20000>;
> +		};
> +	};
> +};
> 

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...