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From: Qais Yousef <qais.yousef@imgtec.com>
To: <linux-kernel@vger.kernel.org>
Cc: <tglx@linutronix.de>, <jason@lakedaemon.net>,
	<marc.zyngier@arm.com>, <jiang.liu@linux.intel.com>,
	<ralf@linux-mips.org>, <linux-mips@linux-mips.org>,
	Qais Yousef <qais.yousef@imgtec.com>
Subject: [PATCH 11/14] MIPS: Add generic SMP IPI support
Date: Tue, 3 Nov 2015 11:12:58 +0000	[thread overview]
Message-ID: <1446549181-31788-12-git-send-email-qais.yousef@imgtec.com> (raw)
In-Reply-To: <1446549181-31788-1-git-send-email-qais.yousef@imgtec.com>

Use the new generic IPI layer to provide generic SMP IPI support if the irqchip
supports it.

Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
---
 arch/mips/kernel/smp.c | 136 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 136 insertions(+)

diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index bd4385a8e6e8..197e1c8af4ef 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -33,12 +33,16 @@
 #include <linux/cpu.h>
 #include <linux/err.h>
 #include <linux/ftrace.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 
 #include <linux/atomic.h>
 #include <asm/cpu.h>
 #include <asm/processor.h>
 #include <asm/idle.h>
 #include <asm/r4k-timer.h>
+#include <asm/mips-cpc.h>
 #include <asm/mmu_context.h>
 #include <asm/time.h>
 #include <asm/setup.h>
@@ -79,6 +83,11 @@ static cpumask_t cpu_core_setup_map;
 
 cpumask_t cpu_coherent_mask;
 
+#ifdef CONFIG_GENERIC_IRQ_IPI
+static struct irq_desc *call_desc;
+static struct irq_desc *sched_desc;
+#endif
+
 static inline void set_cpu_sibling_map(int cpu)
 {
 	int i;
@@ -145,6 +154,133 @@ void register_smp_ops(struct plat_smp_ops *ops)
 	mp_ops = ops;
 }
 
+#ifdef CONFIG_GENERIC_IRQ_IPI
+void mips_smp_send_ipi_single(int cpu, unsigned int action)
+{
+	mips_smp_send_ipi_mask(cpumask_of(cpu), action);
+}
+
+void mips_smp_send_ipi_mask(const struct cpumask *mask, unsigned int action)
+{
+	unsigned long flags;
+	unsigned int core;
+	int cpu;
+	struct ipi_mask ipimask;
+
+	ipi_mask_set_cpumask(&ipimask, mask);
+
+	local_irq_save(flags);
+
+	switch (action) {
+	case SMP_CALL_FUNCTION:
+		__irq_desc_send_ipi(call_desc, &ipimask);
+		break;
+
+	case SMP_RESCHEDULE_YOURSELF:
+		__irq_desc_send_ipi(sched_desc, &ipimask);
+		break;
+
+	default:
+		BUG();
+	}
+
+	if (mips_cpc_present()) {
+		for_each_cpu(cpu, mask) {
+			core = cpu_data[cpu].core;
+
+			if (core == current_cpu_data.core)
+				continue;
+
+			while (!cpumask_test_cpu(cpu, &cpu_coherent_mask)) {
+				mips_cpc_lock_other(core);
+				write_cpc_co_cmd(CPC_Cx_CMD_PWRUP);
+				mips_cpc_unlock_other();
+			}
+		}
+	}
+
+	local_irq_restore(flags);
+}
+
+
+static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id)
+{
+	scheduler_ipi();
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t ipi_call_interrupt(int irq, void *dev_id)
+{
+	generic_smp_call_function_interrupt();
+
+	return IRQ_HANDLED;
+}
+
+static struct irqaction irq_resched = {
+	.handler	= ipi_resched_interrupt,
+	.flags		= IRQF_PERCPU,
+	.name		= "IPI resched"
+};
+
+static struct irqaction irq_call = {
+	.handler	= ipi_call_interrupt,
+	.flags		= IRQF_PERCPU,
+	.name		= "IPI call"
+};
+
+static __init void smp_ipi_init_one(unsigned int virq,
+				    struct irqaction *action)
+{
+	int ret;
+
+	irq_set_handler(virq, handle_percpu_irq);
+	ret = setup_irq(virq, action);
+	BUG_ON(ret);
+}
+
+static int __init mips_smp_ipi_init(void)
+{
+	unsigned int call_virq, sched_virq;
+	struct irq_domain *ipidomain;
+	struct device_node *node;
+	struct ipi_mask ipimask;
+	int cpu;
+
+	node = of_irq_find_parent(of_root);
+	ipidomain = irq_find_matching_host(node, DOMAIN_BUS_IPI);
+
+	/*
+	 * Some platforms have half DT setup. So if we found irq node but
+	 * didn't find an ipidomain, try to search for one that is not in the
+	 * DT.
+	 */
+	if (node && !ipidomain)
+		ipidomain = irq_find_matching_host(NULL, DOMAIN_BUS_IPI);
+
+	BUG_ON(!ipidomain);
+
+	ipi_mask_set_cpumask(&ipimask, cpu_possible_mask);
+
+	call_virq = irq_reserve_ipi(ipidomain, &ipimask);
+	BUG_ON(!call_virq);
+
+	sched_virq = irq_reserve_ipi(ipidomain, &ipimask);
+	BUG_ON(!sched_virq);
+
+	for_each_cpu(cpu, cpu_possible_mask) {
+		smp_ipi_init_one(call_virq + cpu, &irq_call);
+		smp_ipi_init_one(sched_virq + cpu, &irq_resched);
+	}
+
+	call_desc = irq_to_desc(call_virq);
+	sched_desc = irq_to_desc(sched_virq);
+
+	return 0;
+}
+early_initcall(mips_smp_ipi_init);
+#endif
+
 /*
  * First C code run on the secondary CPUs after being started up by
  * the master.
-- 
2.1.0


  parent reply	other threads:[~2015-11-03 11:15 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-03 11:12 [PATCH 00/14] Implement generic IPI support mechanism Qais Yousef
2015-11-03 11:12 ` [PATCH 01/14] genirq: Add new IRQ_DOMAIN_FLAGS_IPI Qais Yousef
2015-11-03 11:12 ` [PATCH 02/14] genirq: Add DOMAIN_BUS_IPI Qais Yousef
2015-11-03 11:12 ` [PATCH 03/14] genirq: Add GENERIC_IRQ_IPI Kconfig symbol Qais Yousef
2015-11-03 11:12 ` [PATCH 04/14] genirq: Add new struct ipi_mask and helper functions Qais Yousef
2015-11-07 12:05   ` Thomas Gleixner
2015-11-03 11:12 ` [PATCH 05/14] genirq: Add struct ipi_mask to irq_data Qais Yousef
2015-11-03 11:12 ` [PATCH 06/14] genirq: Add struct ipi_mapping and its helper functions Qais Yousef
2015-11-07 12:09   ` Thomas Gleixner
2015-11-09 10:05     ` Qais Yousef
2015-11-03 11:12 ` [PATCH 07/14] genirq: Add a new generic IPI reservation code to irq core Qais Yousef
2015-11-03 12:06   ` kbuild test robot
2015-11-07 12:11   ` Thomas Gleixner
2015-11-07 13:31   ` Thomas Gleixner
2015-11-09 10:07     ` Qais Yousef
2015-11-16 15:09       ` Thomas Gleixner
2015-11-03 11:12 ` [PATCH 08/14] genirq: Add a new irq_send_ipi() to irq_chip Qais Yousef
2015-11-03 11:12 ` [PATCH 09/14] genirq: Implement irq_send_ipi() to be used by drivers Qais Yousef
2015-11-03 12:09   ` kbuild test robot
2015-11-07 12:14   ` Thomas Gleixner
2015-11-03 11:12 ` [PATCH 10/14] irqchip/mips-gic: Add a IPI hierarchy domain Qais Yousef
2015-11-07 14:51   ` Thomas Gleixner
2015-11-09 11:10     ` Qais Yousef
2015-11-16 17:17       ` Thomas Gleixner
2015-11-17 10:08         ` Qais Yousef
2015-11-17 10:11           ` Thomas Gleixner
2015-11-17 10:30             ` Qais Yousef
2015-11-20 10:48         ` Qais Yousef
2015-11-20 20:39           ` [PATCH 10/14] irqchip/mips-gic: Add a IPI hierarchy domaind Thomas Gleixner
2015-11-23 16:55             ` Qais Yousef
2015-11-12 15:12     ` [PATCH 10/14] irqchip/mips-gic: Add a IPI hierarchy domain Qais Yousef
2015-11-16 17:24       ` Thomas Gleixner
2015-11-17 10:24         ` Qais Yousef
2015-11-17 10:30           ` Thomas Gleixner
2015-11-03 11:12 ` Qais Yousef [this message]
2015-11-03 11:12 ` [PATCH 12/14] MIPS: Make smp CMP, CPS and MT use the new generic IPI functions Qais Yousef
2015-11-03 11:13 ` [PATCH 13/14] MIPS: Delete smp-gic.c Qais Yousef
2015-11-03 11:13 ` [PATCH 14/14] Docs: IRQ: Add new IRQ-ipi.txt Qais Yousef

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