From: Thomas Gleixner <tglx@linutronix.de>
To: Qais Yousef <qais.yousef@imgtec.com>
Cc: linux-kernel@vger.kernel.org, jason@lakedaemon.net,
marc.zyngier@arm.com, jiang.liu@linux.intel.com,
ralf@linux-mips.org, linux-mips@linux-mips.org
Subject: Re: [PATCH 10/14] irqchip/mips-gic: Add a IPI hierarchy domain
Date: Mon, 16 Nov 2015 18:17:09 +0100 (CET) [thread overview]
Message-ID: <alpine.DEB.2.11.1511161610070.3761@nanos> (raw)
In-Reply-To: <56407F3C.4060404@imgtec.com>
On Mon, 9 Nov 2015, Qais Yousef wrote:
> On 11/07/2015 02:51 PM, Thomas Gleixner wrote:
> Generally it's hard to know whether a real device is connected to a hwirq or
> not. I am saving a patch where we get a set of free hwirqs from DT as only the
> SoC designer knows what hwirq are actually free and safe to use for IPI. I'll
> send this patch with the DT IPI changes or the rproc driver that I will be
> send once these changes are merged.
>
> The current code assumes that the last 2 * NR_CPUs hwirqs are always free to
> use for Linux SMP.
So what you're saying is that you cannot rely on the last X hwirqs
being available for IPIs. That's insane and to my knowledge there is
no hardware out there which does not reserve a consecutive IPI space.
But nevertheless, lets look at the various (possible) requirements we
have:
1) IPI as per_cpu interrupts
Single hwirq represented by a single irq descriptor
2) IPI with consecutive mapping space
No extra mapping from virq base to target cpu required as its just
linear. Everything can be handled via the base virq.
3) IPI with random mapping space
Seperate mapping virq base to target cpu is required. The obvious
place to store it are the irq descriptors. That needs a bit
different machinery for ipi_send_mask(), but it's not rocket
science.
> > That makes a lot of things simpler. You don't have to keep a mapping
> > of the hwirq to the target cpu. You just can use the base hwirq and
> > calculate the destination hwirq from there when sending an IPI
> > (general Linux ones). The coprocessor one will just be a natural
> > fallout.
>
> Are you suggesting here to remove the whole new mapping API from the
> generic code or just that it's not necessary to use it in my case?
Err. I'm saying that you did not make use of hierarchical domains. You
just glued the IPI stuff sideways on the GIC.
We certainly want the generic code for managing the allocation etc.
> I'm confused here as well. Is this a complementary API or are you suggesting
> replacing the one this patch introduces?
Those are replacements. We just need to handle the random mapping case
if we really need it.
Thanks,
tglx
next prev parent reply other threads:[~2015-11-16 17:17 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-03 11:12 [PATCH 00/14] Implement generic IPI support mechanism Qais Yousef
2015-11-03 11:12 ` [PATCH 01/14] genirq: Add new IRQ_DOMAIN_FLAGS_IPI Qais Yousef
2015-11-03 11:12 ` [PATCH 02/14] genirq: Add DOMAIN_BUS_IPI Qais Yousef
2015-11-03 11:12 ` [PATCH 03/14] genirq: Add GENERIC_IRQ_IPI Kconfig symbol Qais Yousef
2015-11-03 11:12 ` [PATCH 04/14] genirq: Add new struct ipi_mask and helper functions Qais Yousef
2015-11-07 12:05 ` Thomas Gleixner
2015-11-03 11:12 ` [PATCH 05/14] genirq: Add struct ipi_mask to irq_data Qais Yousef
2015-11-03 11:12 ` [PATCH 06/14] genirq: Add struct ipi_mapping and its helper functions Qais Yousef
2015-11-07 12:09 ` Thomas Gleixner
2015-11-09 10:05 ` Qais Yousef
2015-11-03 11:12 ` [PATCH 07/14] genirq: Add a new generic IPI reservation code to irq core Qais Yousef
2015-11-03 12:06 ` kbuild test robot
2015-11-07 12:11 ` Thomas Gleixner
2015-11-07 13:31 ` Thomas Gleixner
2015-11-09 10:07 ` Qais Yousef
2015-11-16 15:09 ` Thomas Gleixner
2015-11-03 11:12 ` [PATCH 08/14] genirq: Add a new irq_send_ipi() to irq_chip Qais Yousef
2015-11-03 11:12 ` [PATCH 09/14] genirq: Implement irq_send_ipi() to be used by drivers Qais Yousef
2015-11-03 12:09 ` kbuild test robot
2015-11-07 12:14 ` Thomas Gleixner
2015-11-03 11:12 ` [PATCH 10/14] irqchip/mips-gic: Add a IPI hierarchy domain Qais Yousef
2015-11-07 14:51 ` Thomas Gleixner
2015-11-09 11:10 ` Qais Yousef
2015-11-16 17:17 ` Thomas Gleixner [this message]
2015-11-17 10:08 ` Qais Yousef
2015-11-17 10:11 ` Thomas Gleixner
2015-11-17 10:30 ` Qais Yousef
2015-11-20 10:48 ` Qais Yousef
2015-11-20 20:39 ` [PATCH 10/14] irqchip/mips-gic: Add a IPI hierarchy domaind Thomas Gleixner
2015-11-23 16:55 ` Qais Yousef
2015-11-12 15:12 ` [PATCH 10/14] irqchip/mips-gic: Add a IPI hierarchy domain Qais Yousef
2015-11-16 17:24 ` Thomas Gleixner
2015-11-17 10:24 ` Qais Yousef
2015-11-17 10:30 ` Thomas Gleixner
2015-11-03 11:12 ` [PATCH 11/14] MIPS: Add generic SMP IPI support Qais Yousef
2015-11-03 11:12 ` [PATCH 12/14] MIPS: Make smp CMP, CPS and MT use the new generic IPI functions Qais Yousef
2015-11-03 11:13 ` [PATCH 13/14] MIPS: Delete smp-gic.c Qais Yousef
2015-11-03 11:13 ` [PATCH 14/14] Docs: IRQ: Add new IRQ-ipi.txt Qais Yousef
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