From: Kishon Vijay Abraham I <kishon@ti.com>
To: <kishon@ti.com>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <linux-omap@vger.kernel.org>
Cc: <robh+dt@kernel.org>, <pawel.moll@arm.com>,
<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
<galak@codeaurora.org>, <rogerq@ti.com>, <nsekhar@ti.com>,
<linux-pci@vger.kernel.org>, <linux-usb@vger.kernel.org>,
<tony@atomide.com>, <t-kristo@ti.com>
Subject: [PATCH v3 7/9] phy: ti-pipe3: use *syscon* framework API to set PCS value of the PHY
Date: Tue, 15 Dec 2015 14:46:06 +0530 [thread overview]
Message-ID: <1450170968-11282-8-git-send-email-kishon@ti.com> (raw)
In-Reply-To: <1450170968-11282-1-git-send-email-kishon@ti.com>
Deprecate using phy-omap-control driver to set PCS value of the PHY
and start using *syscon* API to do the same.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
---
Documentation/devicetree/bindings/phy/ti-phy.txt | 2 ++
drivers/phy/phy-ti-pipe3.c | 34 +++++++++++++++++++++-
2 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt
index e06f980..49e5b0c 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -83,6 +83,8 @@ Optional properties:
- syscon-pllreset: Handle to system control region that contains the
CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
+ - syscon-pcs : phandle/offset pair. Phandle to the system control module and the
+ register offset to write the PCS delay value.
Deprecated properties:
- ctrl-module : phandle of the control module used by PHY driver to power on
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index bc03625..684d467 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -65,6 +65,9 @@
#define PIPE3_PHY_TX_RX_POWERON 0x3
#define PIPE3_PHY_TX_RX_POWEROFF 0x0
+#define PCIE_PCS_MASK 0xFF0000
+#define PCIE_PCS_DELAY_COUNT_SHIFT 0x10
+
/*
* This is an Empirical value that works, need to confirm the actual
* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
@@ -96,9 +99,11 @@ struct ti_pipe3 {
struct clk *div_clk;
struct pipe3_dpll_map *dpll_map;
struct regmap *phy_power_syscon; /* ctrl. reg. acces */
+ struct regmap *pcs_syscon; /* ctrl. reg. acces */
struct regmap *dpll_reset_syscon; /* ctrl. reg. acces */
unsigned int dpll_reset_reg; /* reg. index within syscon */
unsigned int power_reg; /* power reg. index within syscon */
+ unsigned int pcie_pcs_reg; /* pcs reg. index in syscon */
bool sata_refclk_enabled;
};
@@ -275,7 +280,16 @@ static int ti_pipe3_init(struct phy *x)
* 18-1804.
*/
if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie")) {
- omap_control_pcie_pcs(phy->control_dev, 0x96);
+ if (phy->pcs_syscon) {
+ val = 0x96 << OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT;
+ ret = regmap_update_bits(phy->pcs_syscon,
+ phy->pcie_pcs_reg,
+ PCIE_PCS_MASK, val);
+ if (ret < 0)
+ return ret;
+ } else {
+ omap_control_pcie_pcs(phy->control_dev, 0x96);
+ }
return 0;
}
@@ -461,6 +475,24 @@ static int ti_pipe3_get_sysctrl(struct ti_pipe3 *phy)
phy->control_dev = &control_pdev->dev;
}
+ if (of_device_is_compatible(node, "ti,phy-pipe3-pcie")) {
+ phy->pcs_syscon = syscon_regmap_lookup_by_phandle(node,
+ "syscon-pcs");
+ if (IS_ERR(phy->pcs_syscon)) {
+ dev_dbg(dev,
+ "can't get syscon-pcs, using omap control\n");
+ phy->pcs_syscon = NULL;
+ } else {
+ if (of_property_read_u32_index(node,
+ "syscon-pcs", 1,
+ &phy->pcie_pcs_reg)) {
+ dev_err(dev,
+ "couldn't get pcie pcs reg. offset\n");
+ return -EINVAL;
+ }
+ }
+ }
+
if (of_device_is_compatible(node, "ti,phy-pipe3-sata")) {
phy->dpll_reset_syscon = syscon_regmap_lookup_by_phandle(node,
"syscon-pllreset");
--
1.7.9.5
next prev parent reply other threads:[~2015-12-15 9:18 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-15 9:15 [PATCH v3 0/9] phy: use syscon framework APIs to set ctrl mod reg Kishon Vijay Abraham I
2015-12-15 9:16 ` [PATCH v3 1/9] phy: ti-pipe3: introduce local struct device* in probe Kishon Vijay Abraham I
2015-12-15 9:16 ` [PATCH v3 2/9] phy: ti-pipe3: move clk initialization to a separate function Kishon Vijay Abraham I
2015-12-15 9:16 ` [PATCH v3 3/9] phy: ti-pipe3: move sysctrl " Kishon Vijay Abraham I
2015-12-15 9:16 ` [PATCH v3 4/9] phy: ti-pipe3: move mem resource " Kishon Vijay Abraham I
2015-12-15 9:16 ` [PATCH v3 5/9] phy: ti-pipe3: use ti_pipe3_power_off to power off the PHY during probe Kishon Vijay Abraham I
2015-12-15 9:16 ` [PATCH v3 6/9] phy: ti-pipe3: use *syscon* framework API to power on/off the PHY Kishon Vijay Abraham I
2015-12-20 3:38 ` Rob Herring
2015-12-21 8:36 ` Kishon Vijay Abraham I
2015-12-15 9:16 ` Kishon Vijay Abraham I [this message]
2015-12-20 3:38 ` [PATCH v3 7/9] phy: ti-pipe3: use *syscon* framework API to set PCS value of " Rob Herring
2015-12-15 9:16 ` [PATCH v3 8/9] phy: omap-usb2: use omap_usb_power_off to power off the PHY during probe Kishon Vijay Abraham I
2015-12-15 9:16 ` [PATCH v3 9/9] phy: omap-usb2: use *syscon* framework API to power on/off the PHY Kishon Vijay Abraham I
2015-12-20 3:39 ` Rob Herring
2015-12-20 12:07 ` Kishon Vijay Abraham I
2015-12-22 18:19 ` Rob Herring
2015-12-15 10:56 ` [PATCH v3 0/9] phy: use syscon framework APIs to set ctrl mod reg Arnd Bergmann
2015-12-15 11:14 ` Kishon Vijay Abraham I
2015-12-15 11:55 ` Arnd Bergmann
2015-12-15 12:46 ` Kishon Vijay Abraham I
2015-12-15 15:26 ` Tony Lindgren
2015-12-18 10:16 ` Kishon Vijay Abraham I
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