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From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <joro@8bytes.org>, <alex.williamson@redhat.com>,
	<gleb@kernel.org>, <pbonzini@redhat.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<wei@redhat.com>, <sherry.hurwitz@amd.com>,
	Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Subject: [PART1 RFC 9/9] svm: Manage vcpu load/unload when enable AVIC
Date: Fri, 12 Feb 2016 20:59:34 +0700	[thread overview]
Message-ID: <1455285574-27892-10-git-send-email-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <1455285574-27892-1-git-send-email-suravee.suthikulpanit@amd.com>

When a vcpu is loaded/unloaded to a physical core, we need to update
information in the Physical APIC-ID table accordingly.

Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
---
 arch/x86/kvm/svm.c | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 32da657..41e68d2 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -32,6 +32,7 @@
 #include <linux/trace_events.h>
 #include <linux/slab.h>
 
+#include <asm/apic.h>
 #include <asm/perf_event.h>
 #include <asm/tlbflush.h>
 #include <asm/desc.h>
@@ -1508,6 +1509,61 @@ static int avic_vcpu_init(struct kvm *kvm, struct vcpu_svm *svm, int id)
 	return 0;
 }
 
+static inline int avic_update_iommu(struct kvm_vcpu *vcpu, int cpu,
+				    phys_addr_t pa, bool is_running)
+{
+	if (!kvm_arch_has_assigned_device(vcpu->kvm))
+		return 0;
+
+	/* TODO: We will hook up with IOMMU API at later time */
+	return 0;
+}
+
+static int avic_set_running(struct kvm_vcpu *vcpu, int cpu, bool is_running)
+{
+	int g_phy_apic_id, h_phy_apic_id;
+	struct svm_avic_phy_ait_entry *entry;
+	struct vcpu_svm *svm = to_svm(vcpu);
+	int ret;
+
+	if (!avic)
+		return 0;
+
+	if (!svm)
+		return -EINVAL;
+
+	/* Note: APIC ID = 0xff is used for broadcast.
+	 *       APIC ID > 0xff is reserved.
+	 */
+	g_phy_apic_id = vcpu->vcpu_id;
+	h_phy_apic_id = __default_cpu_present_to_apicid(cpu);
+
+	if ((g_phy_apic_id >= AVIC_PHY_APIC_ID_MAX) ||
+	    (h_phy_apic_id >= AVIC_PHY_APIC_ID_MAX))
+		return -EINVAL;
+
+	entry = avic_get_phy_ait_entry(vcpu, g_phy_apic_id);
+	if (!entry)
+		return -EINVAL;
+
+	if (is_running) {
+		phys_addr_t pa = PFN_PHYS(page_to_pfn(svm->avic_bk_page));
+
+		entry->bk_pg_ptr = (pa >> 12) & 0xffffffffff;
+		entry->valid = 1;
+		entry->host_phy_apic_id = h_phy_apic_id;
+		barrier();
+		entry->is_running = is_running;
+		ret = avic_update_iommu(vcpu, h_phy_apic_id, pa, is_running);
+	} else {
+		ret = avic_update_iommu(vcpu, 0, 0, is_running);
+		barrier();
+		entry->is_running = is_running;
+	}
+
+	return ret;
+}
+
 static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
 {
 	struct vcpu_svm *svm = to_svm(vcpu);
@@ -1628,6 +1684,8 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 		mark_all_dirty(svm->vmcb);
 	}
 
+	avic_set_running(vcpu, cpu, true);
+
 #ifdef CONFIG_X86_64
 	rdmsrl(MSR_GS_BASE, to_svm(vcpu)->host.gs_base);
 #endif
@@ -1668,6 +1726,9 @@ static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 #endif
 	for (i = 0; i < NR_HOST_SAVE_USER_MSRS; i++)
 		wrmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]);
+
+	avic_set_running(vcpu, 0, false);
+
 }
 
 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
-- 
1.9.1

  parent reply	other threads:[~2016-02-12 14:01 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-12 13:59 [PART1 RFC 0/9] KVM: x86: Introduce SVM AVIC support Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 1/9] KVM: x86: Misc LAPIC changes to exposes helper functions Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 2/9] svm: Introduce new AVIC VMCB registers Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 3/9] svm: clean up V_TPR, V_IRQ, V_INTR_PRIO, and V_INTR_MASKING Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 4/9] KVM: x86: Detect and Initialize AVIC support Suravee Suthikulpanit
2016-02-12 14:13   ` Borislav Petkov
2016-02-12 15:46     ` Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 5/9] svm: Add VMEXIT handlers for AVIC Suravee Suthikulpanit
2016-02-12 15:38   ` Paolo Bonzini
2016-02-15 19:22     ` Radim Krčmář
2016-02-16  6:29     ` Suravee Suthikulpanit
2016-02-16 12:15       ` Paolo Bonzini
2016-02-16 14:13         ` Radim Krčmář
2016-02-16 16:56           ` Paolo Bonzini
2016-02-16 18:06             ` Radim Krčmář
2016-02-18  2:25               ` Suravee Suthikulpanit
2016-02-18 14:18                 ` Radim Krčmář
2016-02-18 14:51                   ` Paolo Bonzini
2016-02-18 15:43                     ` Radim Krčmář
2016-02-18 15:53                       ` Paolo Bonzini
2016-02-18 16:27                         ` Radim Krčmář
2016-02-18 17:18                           ` Paolo Bonzini
2016-02-19 11:39                             ` Suravee Suthikulpanit
2016-02-19 11:44                               ` Paolo Bonzini
2016-02-19 11:59                                 ` Suravee Suthikulpanit
2016-03-03 10:42                             ` Suravee Suthikulpanit
2016-03-03 10:50                               ` Paolo Bonzini
2016-02-19 11:32                   ` Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 6/9] svm: Add interrupt injection via AVIC Suravee Suthikulpanit
2016-02-12 14:16   ` Borislav Petkov
2016-02-12 15:54     ` Suravee Suthikulpanit
2016-02-12 17:14       ` Borislav Petkov
2016-02-12 18:21         ` Paolo Bonzini
2016-02-12 18:30           ` Borislav Petkov
2016-02-12 18:56             ` Paolo Bonzini
2016-02-12 19:33               ` Borislav Petkov
2016-02-16  7:50                 ` Ingo Molnar
2016-02-16  8:39                   ` [PATCH] x86/msr: Document msr-index.h rule for addition Borislav Petkov
2016-02-12 15:55   ` [PART1 RFC 6/9] svm: Add interrupt injection via AVIC Paolo Bonzini
2016-02-12 16:21     ` Suravee Suthikulpanit
2016-02-12 18:19       ` Paolo Bonzini
2016-02-12 19:36         ` Suravee Suthikulpanit
2016-02-19 11:57         ` Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 7/9] svm: Do not expose x2APIC when enable AVIC Suravee Suthikulpanit
2016-02-12 13:59 ` [PART1 RFC 8/9] svm: Do not intercept CR8 " Suravee Suthikulpanit
2016-02-12 15:48   ` Paolo Bonzini
2016-02-12 13:59 ` Suravee Suthikulpanit [this message]
2016-02-12 15:46   ` [PART1 RFC 9/9] svm: Manage vcpu load/unload " Paolo Bonzini
2016-02-12 18:13 ` [PART1 RFC 0/9] KVM: x86: Introduce SVM AVIC support Paolo Bonzini
2016-02-12 19:55   ` Suravee Suthikulpanit
2016-02-12 20:05     ` Paolo Bonzini

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