[RESPIN 0/6] Add support for Exynos SROM Controller driver.

[RESPIN 0/6] Add support for Exynos SROM Controller driver.

[Pankaj Dubey]

This series is collection of patches already reviewed and merged in
maintainer's tree, but could not make it thorugh main linus tree, due
to last moment suggestion of proper location of driver should be
"drivers/memory" instead of "drivers/soc". I have rebased all the patches
and moved into "drivers/memory/samsung".

As this is just a movement without changing actual driver code,
I have not removed "Reviewed-By", "Tested-By" or "Acked-By".

To make sure everything is fine, I have again tested it on Exynos5880 based
Chromebook for normal boot, S2R functionality and its working fine.

This series has been prepared on top of next-soc branch of Krzysztof's tree.

Changes w.r.t. original merged patches:
 - Moved exynos-srom driver into "drivers/memory/samsung"
 - Moved DT binding documentation into "bindings/memory-controller"
 - Added new patch for entry of new directory in MAINTAINERS file.
 - Added new CONFIG as SAMSUNG_MC for grouping Samsung's memory controller drivers.
 - Added my Signed-off-by for patch 5/6 and 6/6 for touching it.

Pankaj Dubey (4):
  dt-bindings: EXYNOS: Add exynos-srom device tree binding
  drivers: memory: Add support for exynos SROM driver
  MAINTAINERS: Add maintainers entry for drivers/memory/samsung
  ARM: EXYNOS: Remove SROM related register settings from mach-exynos

Pavel Fedin (2):
  dt-bindings: EXYNOS: Describe SROMc configuration
  drivers: memory: exynos-srom: Add support for bank configuration

 .../bindings/memory-controllers/exynos-srom.txt    |  81 +++++++
 MAINTAINERS                                        |   1 +
 arch/arm/mach-exynos/Kconfig                       |   2 +
 arch/arm/mach-exynos/exynos.c                      |  17 --
 arch/arm/mach-exynos/include/mach/map.h            |   3 -
 arch/arm/mach-exynos/regs-srom.h                   |  53 -----
 arch/arm/mach-exynos/suspend.c                     |  20 +-
 arch/arm/plat-samsung/include/plat/map-s5p.h       |   1 -
 drivers/memory/Kconfig                             |   1 +
 drivers/memory/Makefile                            |   1 +
 drivers/memory/samsung/Kconfig                     |  12 ++
 drivers/memory/samsung/Makefile                    |   1 +
 drivers/memory/samsung/exynos-srom.c               | 232 +++++++++++++++++++++
 drivers/memory/samsung/exynos-srom.h               |  51 +++++
 14 files changed, 384 insertions(+), 92 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
 delete mode 100644 arch/arm/mach-exynos/regs-srom.h
 create mode 100644 drivers/memory/samsung/Kconfig
 create mode 100644 drivers/memory/samsung/Makefile
 create mode 100644 drivers/memory/samsung/exynos-srom.c
 create mode 100644 drivers/memory/samsung/exynos-srom.h

-- 
2.4.5

[RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[Pankaj Dubey]

This patch adds exynos-srom binding information for SROM Controller
driver on Exynos SoCs.

CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: devicetree@vger.kernel.org
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt

diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
new file mode 100644
index 0000000..33886d5
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
@@ -0,0 +1,12 @@
+SAMSUNG Exynos SoCs SROM Controller driver.
+
+Required properties:
+- compatible : Should contain "samsung,exynos-srom".
+
+- reg: offset and length of the register set
+
+Example:
+	sromc@12570000 {
+		compatible = "samsung,exynos-srom";
+		reg = <0x12570000 0x10>;
+	};
-- 
2.4.5

[RESPIN 2/6] drivers: memory: Add support for exynos SROM driver

[Pankaj Dubey]

This patch adds Exynos SROM controller driver which will handle
save restore of SROM registers during S2R.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[p.fedin@samsung.com: tested on SMDK5410]
Tested-by: Pavel Fedin <p.fedin@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 drivers/memory/Kconfig               |   1 +
 drivers/memory/Makefile              |   1 +
 drivers/memory/samsung/Kconfig       |  12 +++
 drivers/memory/samsung/Makefile      |   1 +
 drivers/memory/samsung/exynos-srom.c | 175 +++++++++++++++++++++++++++++++++++
 drivers/memory/samsung/exynos-srom.h |  51 ++++++++++
 6 files changed, 241 insertions(+)
 create mode 100644 drivers/memory/samsung/Kconfig
 create mode 100644 drivers/memory/samsung/Makefile
 create mode 100644 drivers/memory/samsung/exynos-srom.c
 create mode 100644 drivers/memory/samsung/exynos-srom.h

diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
index 6f31546..bcb1982 100644
--- a/drivers/memory/Kconfig
+++ b/drivers/memory/Kconfig
@@ -114,6 +114,7 @@ config JZ4780_NEMC
 	  the Ingenic JZ4780. This controller is used to handle external
 	  memory devices such as NAND and SRAM.
 
+source "drivers/memory/samsung/Kconfig"
 source "drivers/memory/tegra/Kconfig"
 
 endif
diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
index 1c46af5..d100e40 100644
--- a/drivers/memory/Makefile
+++ b/drivers/memory/Makefile
@@ -16,4 +16,5 @@ obj-$(CONFIG_MVEBU_DEVBUS)	+= mvebu-devbus.o
 obj-$(CONFIG_TEGRA20_MC)	+= tegra20-mc.o
 obj-$(CONFIG_JZ4780_NEMC)	+= jz4780-nemc.o
 
+obj-$(CONFIG_SAMSUNG_MC)	+= samsung/
 obj-$(CONFIG_TEGRA_MC)		+= tegra/
diff --git a/drivers/memory/samsung/Kconfig b/drivers/memory/samsung/Kconfig
new file mode 100644
index 0000000..c2cd45e
--- /dev/null
+++ b/drivers/memory/samsung/Kconfig
@@ -0,0 +1,12 @@
+config SAMSUNG_MC
+	bool "SAMSUNG Exynos Memory Controller support" if COMPILE_TEST
+	default y
+	depends on ARCH_EXYNOS
+	help
+	  This driver supports the Memory Controller (MC) hardwares found on
+	  SAMSUNG Exynos SoCs.
+
+config EXYNOS_SROM
+	bool
+	depends on (ARM && ARCH_EXYNOS && PM) || ((ARM || ARM64) && COMPILE_TEST)
+
diff --git a/drivers/memory/samsung/Makefile b/drivers/memory/samsung/Makefile
new file mode 100644
index 0000000..9c554d5
--- /dev/null
+++ b/drivers/memory/samsung/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EXYNOS_SROM)	+= exynos-srom.o
diff --git a/drivers/memory/samsung/exynos-srom.c b/drivers/memory/samsung/exynos-srom.c
new file mode 100644
index 0000000..57a232d
--- /dev/null
+++ b/drivers/memory/samsung/exynos-srom.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ *	      http://www.samsung.com/
+ *
+ * EXYNOS - SROM Controller support
+ * Author: Pankaj Dubey <pankaj.dubey@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "exynos-srom.h"
+
+static const unsigned long exynos_srom_offsets[] = {
+	/* SROM side */
+	EXYNOS_SROM_BW,
+	EXYNOS_SROM_BC0,
+	EXYNOS_SROM_BC1,
+	EXYNOS_SROM_BC2,
+	EXYNOS_SROM_BC3,
+};
+
+/**
+ * struct exynos_srom_reg_dump: register dump of SROM Controller registers.
+ * @offset: srom register offset from the controller base address.
+ * @value: the value of register under the offset.
+ */
+struct exynos_srom_reg_dump {
+	u32     offset;
+	u32     value;
+};
+
+/**
+ * struct exynos_srom: platform data for exynos srom controller driver.
+ * @dev: platform device pointer
+ * @reg_base: srom base address
+ * @reg_offset: exynos_srom_reg_dump pointer to hold offset and its value.
+ */
+struct exynos_srom {
+	struct device *dev;
+	void __iomem *reg_base;
+	struct exynos_srom_reg_dump *reg_offset;
+};
+
+static struct exynos_srom_reg_dump *exynos_srom_alloc_reg_dump(
+		const unsigned long *rdump,
+		unsigned long nr_rdump)
+{
+	struct exynos_srom_reg_dump *rd;
+	unsigned int i;
+
+	rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
+	if (!rd)
+		return NULL;
+
+	for (i = 0; i < nr_rdump; ++i)
+		rd[i].offset = rdump[i];
+
+	return rd;
+}
+
+static int exynos_srom_probe(struct platform_device *pdev)
+{
+	struct device_node *np;
+	struct exynos_srom *srom;
+	struct device *dev = &pdev->dev;
+
+	np = dev->of_node;
+	if (!np) {
+		dev_err(&pdev->dev, "could not find device info\n");
+		return -EINVAL;
+	}
+
+	srom = devm_kzalloc(&pdev->dev,
+			sizeof(struct exynos_srom), GFP_KERNEL);
+	if (!srom)
+		return -ENOMEM;
+
+	srom->dev = dev;
+	srom->reg_base = of_iomap(np, 0);
+	if (!srom->reg_base) {
+		dev_err(&pdev->dev, "iomap of exynos srom controller failed\n");
+		return -ENOMEM;
+	}
+
+	platform_set_drvdata(pdev, srom);
+
+	srom->reg_offset = exynos_srom_alloc_reg_dump(exynos_srom_offsets,
+			sizeof(exynos_srom_offsets));
+	if (!srom->reg_offset) {
+		iounmap(srom->reg_base);
+		return -ENOMEM;
+	}
+
+	return 0;
+}
+
+static int exynos_srom_remove(struct platform_device *pdev)
+{
+	struct exynos_srom *srom = platform_get_drvdata(pdev);
+
+	kfree(srom->reg_offset);
+	iounmap(srom->reg_base);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static void exynos_srom_save(void __iomem *base,
+				    struct exynos_srom_reg_dump *rd,
+				    unsigned int num_regs)
+{
+	for (; num_regs > 0; --num_regs, ++rd)
+		rd->value = readl(base + rd->offset);
+}
+
+static void exynos_srom_restore(void __iomem *base,
+				      const struct exynos_srom_reg_dump *rd,
+				      unsigned int num_regs)
+{
+	for (; num_regs > 0; --num_regs, ++rd)
+		writel(rd->value, base + rd->offset);
+}
+
+static int exynos_srom_suspend(struct device *dev)
+{
+	struct exynos_srom *srom = dev_get_drvdata(dev);
+
+	exynos_srom_save(srom->reg_base, srom->reg_offset,
+				ARRAY_SIZE(exynos_srom_offsets));
+	return 0;
+}
+
+static int exynos_srom_resume(struct device *dev)
+{
+	struct exynos_srom *srom = dev_get_drvdata(dev);
+
+	exynos_srom_restore(srom->reg_base, srom->reg_offset,
+				ARRAY_SIZE(exynos_srom_offsets));
+	return 0;
+}
+#endif
+
+static const struct of_device_id of_exynos_srom_ids[] = {
+	{
+		.compatible	= "samsung,exynos-srom",
+	},
+	{},
+};
+MODULE_DEVICE_TABLE(of, of_exynos_srom_ids);
+
+static SIMPLE_DEV_PM_OPS(exynos_srom_pm_ops, exynos_srom_suspend, exynos_srom_resume);
+
+static struct platform_driver exynos_srom_driver = {
+	.probe = exynos_srom_probe,
+	.remove = exynos_srom_remove,
+	.driver = {
+		.name = "exynos-srom",
+		.of_match_table = of_exynos_srom_ids,
+		.pm = &exynos_srom_pm_ops,
+	},
+};
+module_platform_driver(exynos_srom_driver);
+
+MODULE_AUTHOR("Pankaj Dubey <pankaj.dubey@samsung.com>");
+MODULE_DESCRIPTION("Exynos SROM Controller Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/memory/samsung/exynos-srom.h b/drivers/memory/samsung/exynos-srom.h
new file mode 100644
index 0000000..34660c6
--- /dev/null
+++ b/drivers/memory/samsung/exynos-srom.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Exynos SROMC register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __EXYNOS_SROM_H
+#define __EXYNOS_SROM_H __FILE__
+
+#define EXYNOS_SROMREG(x)		(x)
+
+#define EXYNOS_SROM_BW		EXYNOS_SROMREG(0x0)
+#define EXYNOS_SROM_BC0		EXYNOS_SROMREG(0x4)
+#define EXYNOS_SROM_BC1		EXYNOS_SROMREG(0x8)
+#define EXYNOS_SROM_BC2		EXYNOS_SROMREG(0xc)
+#define EXYNOS_SROM_BC3		EXYNOS_SROMREG(0x10)
+#define EXYNOS_SROM_BC4		EXYNOS_SROMREG(0x14)
+#define EXYNOS_SROM_BC5		EXYNOS_SROMREG(0x18)
+
+/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
+
+#define EXYNOS_SROM_BW__DATAWIDTH__SHIFT	0
+#define EXYNOS_SROM_BW__ADDRMODE__SHIFT		1
+#define EXYNOS_SROM_BW__WAITENABLE__SHIFT	2
+#define EXYNOS_SROM_BW__BYTEENABLE__SHIFT	3
+
+#define EXYNOS_SROM_BW__CS_MASK			0xf
+
+#define EXYNOS_SROM_BW__NCS0__SHIFT		0
+#define EXYNOS_SROM_BW__NCS1__SHIFT		4
+#define EXYNOS_SROM_BW__NCS2__SHIFT		8
+#define EXYNOS_SROM_BW__NCS3__SHIFT		12
+#define EXYNOS_SROM_BW__NCS4__SHIFT		16
+#define EXYNOS_SROM_BW__NCS5__SHIFT		20
+
+/* applies to same to BCS0 - BCS3 */
+
+#define EXYNOS_SROM_BCX__PMC__SHIFT		0
+#define EXYNOS_SROM_BCX__TACP__SHIFT		4
+#define EXYNOS_SROM_BCX__TCAH__SHIFT		8
+#define EXYNOS_SROM_BCX__TCOH__SHIFT		12
+#define EXYNOS_SROM_BCX__TACC__SHIFT		16
+#define EXYNOS_SROM_BCX__TCOS__SHIFT		24
+#define EXYNOS_SROM_BCX__TACS__SHIFT		28
+
+#endif /* __EXYNOS_SROM_H */
-- 
2.4.5

[RESPIN 3/6] MAINTAINERS: Add maintainers entry for drivers/memory/samsung

[Pankaj Dubey]

This patch adds maintainers entry for new driver folder
drivers/memory/samsung

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index a6f927c..3a05c6b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1493,6 +1493,7 @@ F:	arch/arm/mach-s5p*/
 F:	arch/arm/mach-exynos*/
 F:	drivers/*/*s3c2410*
 F:	drivers/*/*/*s3c2410*
+F:	drivers/memory/samsung/*
 F:	drivers/soc/samsung/*
 F:	drivers/spi/spi-s3c*
 F:	sound/soc/samsung/*
-- 
2.4.5

[RESPIN 4/6] ARM: EXYNOS: Remove SROM related register settings from mach-exynos

[Pankaj Dubey]

As now we have dedicated driver for SROM controller, it will take care
of saving register banks during S2R so we can safely remove these
settings from mach-exynos.

Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 arch/arm/mach-exynos/Kconfig                 |  2 ++
 arch/arm/mach-exynos/exynos.c                | 17 ---------
 arch/arm/mach-exynos/include/mach/map.h      |  3 --
 arch/arm/mach-exynos/regs-srom.h             | 53 ----------------------------
 arch/arm/mach-exynos/suspend.c               | 20 ++---------
 arch/arm/plat-samsung/include/plat/map-s5p.h |  1 -
 6 files changed, 4 insertions(+), 92 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/regs-srom.h

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index c4989c2..8da01d1 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -18,6 +18,7 @@ menuconfig ARCH_EXYNOS
 	select COMMON_CLK_SAMSUNG
 	select EXYNOS_THERMAL
 	select EXYNOS_PMU
+	select EXYNOS_SROM if PM
 	select HAVE_ARM_SCU if SMP
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
@@ -30,6 +31,7 @@ menuconfig ARCH_EXYNOS
 	select SRAM
 	select THERMAL
 	select MFD_SYSCON
+	select MEMORY
 	select CLKSRC_EXYNOS_MCT
 	select POWER_RESET
 	select POWER_RESET_SYSCON
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index bbf51a4..f977eea 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -31,11 +31,6 @@
 
 static struct map_desc exynos4_iodesc[] __initdata = {
 	{
-		.virtual	= (unsigned long)S5P_VA_SROMC,
-		.pfn		= __phys_to_pfn(EXYNOS4_PA_SROMC),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
 		.virtual	= (unsigned long)S5P_VA_CMU,
 		.pfn		= __phys_to_pfn(EXYNOS4_PA_CMU),
 		.length		= SZ_128K,
@@ -58,15 +53,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
 	},
 };
 
-static struct map_desc exynos5_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5P_VA_SROMC,
-		.pfn		= __phys_to_pfn(EXYNOS5_PA_SROMC),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
 static struct platform_device exynos_cpuidle = {
 	.name              = "exynos_cpuidle",
 #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
@@ -138,9 +124,6 @@ static void __init exynos_map_io(void)
 {
 	if (soc_is_exynos4())
 		iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
-
-	if (soc_is_exynos5())
-		iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
 }
 
 static void __init exynos_init_io(void)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index c88325d..c48ba4f 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -25,7 +25,4 @@
 
 #define EXYNOS4_PA_COREPERI		0x10500000
 
-#define EXYNOS4_PA_SROMC		0x12570000
-#define EXYNOS5_PA_SROMC		0x12250000
-
 #endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-exynos/regs-srom.h b/arch/arm/mach-exynos/regs-srom.h
deleted file mode 100644
index 5c4d442..0000000
--- a/arch/arm/mach-exynos/regs-srom.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P SROMC register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __PLAT_SAMSUNG_REGS_SROM_H
-#define __PLAT_SAMSUNG_REGS_SROM_H __FILE__
-
-#include <mach/map.h>
-
-#define S5P_SROMREG(x)		(S5P_VA_SROMC + (x))
-
-#define S5P_SROM_BW		S5P_SROMREG(0x0)
-#define S5P_SROM_BC0		S5P_SROMREG(0x4)
-#define S5P_SROM_BC1		S5P_SROMREG(0x8)
-#define S5P_SROM_BC2		S5P_SROMREG(0xc)
-#define S5P_SROM_BC3		S5P_SROMREG(0x10)
-#define S5P_SROM_BC4		S5P_SROMREG(0x14)
-#define S5P_SROM_BC5		S5P_SROMREG(0x18)
-
-/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
-
-#define S5P_SROM_BW__DATAWIDTH__SHIFT		0
-#define S5P_SROM_BW__ADDRMODE__SHIFT		1
-#define S5P_SROM_BW__WAITENABLE__SHIFT		2
-#define S5P_SROM_BW__BYTEENABLE__SHIFT		3
-
-#define S5P_SROM_BW__CS_MASK			0xf
-
-#define S5P_SROM_BW__NCS0__SHIFT		0
-#define S5P_SROM_BW__NCS1__SHIFT		4
-#define S5P_SROM_BW__NCS2__SHIFT		8
-#define S5P_SROM_BW__NCS3__SHIFT		12
-#define S5P_SROM_BW__NCS4__SHIFT		16
-#define S5P_SROM_BW__NCS5__SHIFT		20
-
-/* applies to same to BCS0 - BCS3 */
-
-#define S5P_SROM_BCX__PMC__SHIFT		0
-#define S5P_SROM_BCX__TACP__SHIFT		4
-#define S5P_SROM_BCX__TCAH__SHIFT		8
-#define S5P_SROM_BCX__TCOH__SHIFT		12
-#define S5P_SROM_BCX__TACC__SHIFT		16
-#define S5P_SROM_BCX__TCOS__SHIFT		24
-#define S5P_SROM_BCX__TACS__SHIFT		28
-
-#endif /* __PLAT_SAMSUNG_REGS_SROM_H */
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index fee2b00..f216909 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -34,10 +34,11 @@
 #include <asm/smp_scu.h>
 #include <asm/suspend.h>
 
+#include <mach/map.h>
+
 #include <plat/pm-common.h>
 
 #include "common.h"
-#include "regs-srom.h"
 
 #define REG_TABLE_END (-1U)
 
@@ -53,15 +54,6 @@ struct exynos_wkup_irq {
 	u32 mask;
 };
 
-static struct sleep_save exynos_core_save[] = {
-	/* SROM side */
-	SAVE_ITEM(S5P_SROM_BW),
-	SAVE_ITEM(S5P_SROM_BC0),
-	SAVE_ITEM(S5P_SROM_BC1),
-	SAVE_ITEM(S5P_SROM_BC2),
-	SAVE_ITEM(S5P_SROM_BC3),
-};
-
 struct exynos_pm_data {
 	const struct exynos_wkup_irq *wkup_irq;
 	unsigned int wake_disable_mask;
@@ -343,8 +335,6 @@ static void exynos_pm_prepare(void)
 	/* Set wake-up mask registers */
 	exynos_pm_set_wakeup_mask();
 
-	s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
-
 	exynos_pm_enter_sleep_mode();
 
 	/* ensure at least INFORM0 has the resume address */
@@ -375,8 +365,6 @@ static void exynos5420_pm_prepare(void)
 	/* Set wake-up mask registers */
 	exynos_pm_set_wakeup_mask();
 
-	s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save));
-
 	exynos_pmu_spare3 = pmu_raw_readl(S5P_PMU_SPARE3);
 	/*
 	 * The cpu state needs to be saved and restored so that the
@@ -467,8 +455,6 @@ static void exynos_pm_resume(void)
 	/* For release retention */
 	exynos_pm_release_retention();
 
-	s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
-
 	if (cpuid == ARM_CPU_PART_CORTEX_A9)
 		scu_enable(S5P_VA_SCU);
 
@@ -535,8 +521,6 @@ static void exynos5420_pm_resume(void)
 
 	pmu_raw_writel(exynos_pmu_spare3, S5P_PMU_SPARE3);
 
-	s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
-
 early_wakeup:
 
 	tmp = pmu_raw_readl(EXYNOS5420_SFR_AXI_CGDIS1);
diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h
index 4ec9a70..b63aeeb 100644
--- a/arch/arm/plat-samsung/include/plat/map-s5p.h
+++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
@@ -18,7 +18,6 @@
 
 #define S5P_VA_DMC0		S3C_ADDR(0x02440000)
 #define S5P_VA_DMC1		S3C_ADDR(0x02480000)
-#define S5P_VA_SROMC		S3C_ADDR(0x024C0000)
 
 #define S5P_VA_COREPERI_BASE	S3C_ADDR(0x02800000)
 #define S5P_VA_COREPERI(x)	(S5P_VA_COREPERI_BASE + (x))
-- 
2.4.5

[RESPIN 5/6] dt-bindings: EXYNOS: Describe SROMc configuration

[Pankaj Dubey]

From: Pavel Fedin <p.fedin@samsung.com>

Add documentation for new subnode properties, allowing bank configuration.
Based on u-boot implementation, but heavily reworked.

Also, fix size of SROMc mapping in the example.

CC: devicetree@vger.kernel.org
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 .../bindings/memory-controllers/exynos-srom.txt    | 73 +++++++++++++++++++++-
 1 file changed, 71 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
index 33886d5..e5c18df 100644
--- a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
@@ -5,8 +5,77 @@ Required properties:
 
 - reg: offset and length of the register set
 
-Example:
+Optional properties:
+The SROM controller can be used to attach external peripherals. In this case
+extra properties, describing the bus behind it, should be specified as below:
+
+- #address-cells: Must be set to 2 to allow device address translation.
+		  Address is specified as (bank#, offset).
+
+- #size-cells: Must be set to 1 to allow device size passing
+
+- ranges: Must be set up to reflect the memory layout with four integer values
+	  per bank:
+		<bank-number> 0 <parent address of bank> <size>
+
+Sub-nodes:
+The actual device nodes should be added as subnodes to the SROMc node. These
+subnodes, except regular device specification, should contain the following
+properties, describing configuration of the relevant SROM bank:
+
+Required properties:
+- reg: bank number, base address (relative to start of the bank) and size of
+       the memory mapped for the device. Note that base address will be
+       typically 0 as this is the start of the bank.
+
+- samsung,srom-timing : array of 6 integers, specifying bank timings in the
+                        following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
+                        Each value is specified in cycles and has the following
+                        meaning and valid range:
+                        Tacp : Page mode access cycle at Page mode (0 - 15)
+                        Tcah : Address holding time after CSn (0 - 15)
+                        Tcoh : Chip selection hold on OEn (0 - 15)
+                        Tacc : Access cycle (0 - 31, the actual time is N + 1)
+                        Tcos : Chip selection set-up before OEn (0 - 15)
+                        Tacs : Address set-up before CSn (0 - 15)
+
+Optional properties:
+- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used.
+
+- samsung,srom-page-mode : page mode configuration for the bank:
+			   0 - normal (one data)
+			   1 - four data
+			   If omitted, default of 0 is used.
+
+Example: basic definition, no banks are configured
+	sromc@12570000 {
+		compatible = "samsung,exynos-srom";
+		reg = <0x12570000 0x14>;
+	};
+
+Example: SROMc with SMSC911x ethernet chip on bank 3
 	sromc@12570000 {
+		#address-cells = <2>;
+		#size-cells = <1>;
+		ranges = <0 0 0x04000000 0x20000   // Bank0
+			  1 0 0x05000000 0x20000   // Bank1
+			  2 0 0x06000000 0x20000   // Bank2
+			  3 0 0x07000000 0x20000>; // Bank3
+
 		compatible = "samsung,exynos-srom";
-		reg = <0x12570000 0x10>;
+		reg = <0x12570000 0x14>;
+
+		ethernet@3,0 {
+			compatible = "smsc,lan9115";
+			reg = <3 0 0x10000>;	   // Bank 3, offset = 0
+			phy-mode = "mii";
+			interrupt-parent = <&gpx0>;
+			interrupts = <5 8>;
+			reg-io-width = <2>;
+			smsc,irq-push-pull;
+			smsc,force-internal-phy;
+
+			samsung,srom-page-mode = <1>;
+			samsung,srom-timing = <9 12 1 9 1 1>;
+		};
 	};
-- 
2.4.5

[RESPIN 6/6] drivers: memory: exynos-srom: Add support for bank configuration

[Pankaj Dubey]

From: Pavel Fedin <p.fedin@samsung.com>

Implement handling properties in subnodes and adding child devices to the
system. Child devices will not be added if configuration fails.

Since the driver now does more than suspend-resume support, dependency on
CONFIG_PM is removed.

Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
---
 arch/arm/mach-exynos/Kconfig         |  2 +-
 drivers/memory/samsung/Kconfig       |  2 +-
 drivers/memory/samsung/exynos-srom.c | 61 ++++++++++++++++++++++++++++++++++--
 3 files changed, 61 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 8da01d1..eb386b3 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -18,7 +18,7 @@ menuconfig ARCH_EXYNOS
 	select COMMON_CLK_SAMSUNG
 	select EXYNOS_THERMAL
 	select EXYNOS_PMU
-	select EXYNOS_SROM if PM
+	select EXYNOS_SROM
 	select HAVE_ARM_SCU if SMP
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
diff --git a/drivers/memory/samsung/Kconfig b/drivers/memory/samsung/Kconfig
index c2cd45e..ca17a27 100644
--- a/drivers/memory/samsung/Kconfig
+++ b/drivers/memory/samsung/Kconfig
@@ -8,5 +8,5 @@ config SAMSUNG_MC
 
 config EXYNOS_SROM
 	bool
-	depends on (ARM && ARCH_EXYNOS && PM) || ((ARM || ARM64) && COMPILE_TEST)
+	depends on (ARM && ARCH_EXYNOS) || ((ARM || ARM64) && COMPILE_TEST)
 
diff --git a/drivers/memory/samsung/exynos-srom.c b/drivers/memory/samsung/exynos-srom.c
index 57a232d..a4cf547 100644
--- a/drivers/memory/samsung/exynos-srom.c
+++ b/drivers/memory/samsung/exynos-srom.c
@@ -14,6 +14,7 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
+#include <linux/of_platform.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 
@@ -67,11 +68,51 @@ static struct exynos_srom_reg_dump *exynos_srom_alloc_reg_dump(
 	return rd;
 }
 
+static int exynos_srom_configure_bank(struct exynos_srom *srom,
+				      struct device_node *np)
+{
+	u32 bank, width, pmc;
+	u32 timing[6];
+	u32 cs, bw;
+
+	if (of_property_read_u32(np, "reg", &bank))
+		return -EINVAL;
+	if (of_property_read_u32(np, "reg-io-width", &width))
+		width = 1;
+	if (of_property_read_u32(np, "samsung,srom-page-mode", &pmc))
+		pmc = 0;
+	if (of_property_read_u32_array(np, "samsung,srom-timing", timing,
+				       ARRAY_SIZE(timing)))
+		return -EINVAL;
+
+	bank *= 4; /* Convert bank into shift/offset */
+
+	cs = 1 << EXYNOS_SROM_BW__BYTEENABLE__SHIFT;
+	if (width == 2)
+		cs |= 1 << EXYNOS_SROM_BW__DATAWIDTH__SHIFT;
+
+	bw = __raw_readl(srom->reg_base + EXYNOS_SROM_BW);
+	bw = (bw & ~(EXYNOS_SROM_BW__CS_MASK << bank)) | (cs << bank);
+	__raw_writel(bw, srom->reg_base + EXYNOS_SROM_BW);
+
+	__raw_writel((pmc << EXYNOS_SROM_BCX__PMC__SHIFT) |
+		    (timing[0] << EXYNOS_SROM_BCX__TACP__SHIFT) |
+		    (timing[1] << EXYNOS_SROM_BCX__TCAH__SHIFT) |
+		    (timing[2] << EXYNOS_SROM_BCX__TCOH__SHIFT) |
+		    (timing[3] << EXYNOS_SROM_BCX__TACC__SHIFT) |
+		    (timing[4] << EXYNOS_SROM_BCX__TCOS__SHIFT) |
+		    (timing[5] << EXYNOS_SROM_BCX__TACS__SHIFT),
+		    srom->reg_base + EXYNOS_SROM_BC0 + bank);
+
+	return 0;
+}
+
 static int exynos_srom_probe(struct platform_device *pdev)
 {
-	struct device_node *np;
+	struct device_node *np, *child;
 	struct exynos_srom *srom;
 	struct device *dev = &pdev->dev;
+	bool bad_bank_config = false;
 
 	np = dev->of_node;
 	if (!np) {
@@ -100,7 +141,23 @@ static int exynos_srom_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
-	return 0;
+	for_each_child_of_node(np, child) {
+		if (exynos_srom_configure_bank(srom, child)) {
+			dev_err(dev,
+				"Could not decode bank configuration for %s\n",
+				child->name);
+			bad_bank_config = true;
+		}
+	}
+
+	/*
+	 * If any bank failed to configure, we still provide suspend/resume,
+	 * but do not probe child devices
+	 */
+	if (bad_bank_config)
+		return 0;
+
+	return of_platform_populate(np, NULL, NULL, dev);
 }
 
 static int exynos_srom_remove(struct platform_device *pdev)
-- 
2.4.5

Re: [RESPIN 2/6] drivers: memory: Add support for exynos SROM driver

[Krzysztof Kozlowski]

On 25.02.2016 17:33, Pankaj Dubey wrote:
> This patch adds Exynos SROM controller driver which will handle
> save restore of SROM registers during S2R.
> 
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> [p.fedin@samsung.com: tested on SMDK5410]
> Tested-by: Pavel Fedin <p.fedin@samsung.com>
> Signed-off-by: Kukjin Kim <kgene@kernel.org>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> ---
>  drivers/memory/Kconfig               |   1 +
>  drivers/memory/Makefile              |   1 +
>  drivers/memory/samsung/Kconfig       |  12 +++
>  drivers/memory/samsung/Makefile      |   1 +
>  drivers/memory/samsung/exynos-srom.c | 175 +++++++++++++++++++++++++++++++++++
>  drivers/memory/samsung/exynos-srom.h |  51 ++++++++++
>  6 files changed, 241 insertions(+)
>  create mode 100644 drivers/memory/samsung/Kconfig
>  create mode 100644 drivers/memory/samsung/Makefile
>  create mode 100644 drivers/memory/samsung/exynos-srom.c
>  create mode 100644 drivers/memory/samsung/exynos-srom.h
> 
> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
> index 6f31546..bcb1982 100644
> --- a/drivers/memory/Kconfig
> +++ b/drivers/memory/Kconfig
> @@ -114,6 +114,7 @@ config JZ4780_NEMC
>  	  the Ingenic JZ4780. This controller is used to handle external
>  	  memory devices such as NAND and SRAM.
>  
> +source "drivers/memory/samsung/Kconfig"
>  source "drivers/memory/tegra/Kconfig"
>  
>  endif
> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
> index 1c46af5..d100e40 100644
> --- a/drivers/memory/Makefile
> +++ b/drivers/memory/Makefile
> @@ -16,4 +16,5 @@ obj-$(CONFIG_MVEBU_DEVBUS)	+= mvebu-devbus.o
>  obj-$(CONFIG_TEGRA20_MC)	+= tegra20-mc.o
>  obj-$(CONFIG_JZ4780_NEMC)	+= jz4780-nemc.o
>  
> +obj-$(CONFIG_SAMSUNG_MC)	+= samsung/
>  obj-$(CONFIG_TEGRA_MC)		+= tegra/
> diff --git a/drivers/memory/samsung/Kconfig b/drivers/memory/samsung/Kconfig
> new file mode 100644
> index 0000000..c2cd45e
> --- /dev/null
> +++ b/drivers/memory/samsung/Kconfig
> @@ -0,0 +1,12 @@
> +config SAMSUNG_MC
> +	bool "SAMSUNG Exynos Memory Controller support" if COMPILE_TEST
> +	default y
> +	depends on ARCH_EXYNOS
> +	help
> +	  This driver supports the Memory Controller (MC) hardwares found on
> +	  SAMSUNG Exynos SoCs.
> +

if SAMSUNG_MC

> +config EXYNOS_SROM
> +	bool
> +	depends on (ARM && ARCH_EXYNOS && PM) || ((ARM || ARM64) && COMPILE_TEST)

(ARM && ARCH_EXYNOS && PM) || COMPILE_TEST

You don't need to limit compile testing to ARM/ARM64.

Rest is good.

If there are no comments from other people, then I can fix this while
applying. If there will be a comment or re-spin, then please apply my
comments.

Best regards,
Krzysztof

Re: [RESPIN 4/6] ARM: EXYNOS: Remove SROM related register settings from mach-exynos

[Krzysztof Kozlowski]

On 25.02.2016 17:33, Pankaj Dubey wrote:
> As now we have dedicated driver for SROM controller, it will take care
> of saving register banks during S2R so we can safely remove these
> settings from mach-exynos.
> 
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> Signed-off-by: Kukjin Kim <kgene@kernel.org>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> ---
>  arch/arm/mach-exynos/Kconfig                 |  2 ++
>  arch/arm/mach-exynos/exynos.c                | 17 ---------
>  arch/arm/mach-exynos/include/mach/map.h      |  3 --
>  arch/arm/mach-exynos/regs-srom.h             | 53 ----------------------------
>  arch/arm/mach-exynos/suspend.c               | 20 ++---------
>  arch/arm/plat-samsung/include/plat/map-s5p.h |  1 -
>  6 files changed, 4 insertions(+), 92 deletions(-)
>  delete mode 100644 arch/arm/mach-exynos/regs-srom.h
> 
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index c4989c2..8da01d1 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -18,6 +18,7 @@ menuconfig ARCH_EXYNOS
>  	select COMMON_CLK_SAMSUNG
>  	select EXYNOS_THERMAL
>  	select EXYNOS_PMU
> +	select EXYNOS_SROM if PM
>  	select HAVE_ARM_SCU if SMP
>  	select HAVE_S3C2410_I2C if I2C
>  	select HAVE_S3C2410_WATCHDOG if WATCHDOG
> @@ -30,6 +31,7 @@ menuconfig ARCH_EXYNOS
>  	select SRAM
>  	select THERMAL
>  	select MFD_SYSCON
> +	select MEMORY

select SAMSUNG_MC because otherwise the directory won't be build
(memory/Kconfig).

Rest looks good. No need to respin (I can fix this when applying),
unless other people will have some comments.

BR,
Krzysztof

Re: [RESPIN 2/6] drivers: memory: Add support for exynos SROM driver

[Krzysztof Kozlowski]

On 26.02.2016 16:25, Krzysztof Kozlowski wrote:
> On 25.02.2016 17:33, Pankaj Dubey wrote:
>> This patch adds Exynos SROM controller driver which will handle
>> save restore of SROM registers during S2R.
>>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> [p.fedin@samsung.com: tested on SMDK5410]
>> Tested-by: Pavel Fedin <p.fedin@samsung.com>
>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>>  drivers/memory/Kconfig               |   1 +
>>  drivers/memory/Makefile              |   1 +
>>  drivers/memory/samsung/Kconfig       |  12 +++
>>  drivers/memory/samsung/Makefile      |   1 +
>>  drivers/memory/samsung/exynos-srom.c | 175 +++++++++++++++++++++++++++++++++++
>>  drivers/memory/samsung/exynos-srom.h |  51 ++++++++++
>>  6 files changed, 241 insertions(+)
>>  create mode 100644 drivers/memory/samsung/Kconfig
>>  create mode 100644 drivers/memory/samsung/Makefile
>>  create mode 100644 drivers/memory/samsung/exynos-srom.c
>>  create mode 100644 drivers/memory/samsung/exynos-srom.h
>>
>> diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig
>> index 6f31546..bcb1982 100644
>> --- a/drivers/memory/Kconfig
>> +++ b/drivers/memory/Kconfig
>> @@ -114,6 +114,7 @@ config JZ4780_NEMC
>>  	  the Ingenic JZ4780. This controller is used to handle external
>>  	  memory devices such as NAND and SRAM.
>>  
>> +source "drivers/memory/samsung/Kconfig"
>>  source "drivers/memory/tegra/Kconfig"
>>  
>>  endif
>> diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile
>> index 1c46af5..d100e40 100644
>> --- a/drivers/memory/Makefile
>> +++ b/drivers/memory/Makefile
>> @@ -16,4 +16,5 @@ obj-$(CONFIG_MVEBU_DEVBUS)	+= mvebu-devbus.o
>>  obj-$(CONFIG_TEGRA20_MC)	+= tegra20-mc.o
>>  obj-$(CONFIG_JZ4780_NEMC)	+= jz4780-nemc.o
>>  
>> +obj-$(CONFIG_SAMSUNG_MC)	+= samsung/
>>  obj-$(CONFIG_TEGRA_MC)		+= tegra/
>> diff --git a/drivers/memory/samsung/Kconfig b/drivers/memory/samsung/Kconfig
>> new file mode 100644
>> index 0000000..c2cd45e
>> --- /dev/null
>> +++ b/drivers/memory/samsung/Kconfig
>> @@ -0,0 +1,12 @@
>> +config SAMSUNG_MC
>> +	bool "SAMSUNG Exynos Memory Controller support" if COMPILE_TEST
>> +	default y
>> +	depends on ARCH_EXYNOS

These two are not needed and they introduce issues (when COMPILE_TEST it
should not depend on exynos and should not be in such case enabled by
default).

>> +	help
>> +	  This driver supports the Memory Controller (MC) hardwares found on
>> +	  SAMSUNG Exynos SoCs.
>> +
> 
> if SAMSUNG_MC
> 
>> +config EXYNOS_SROM
>> +	bool

bool should be described with COMPILE_TEST

>> +	depends on (ARM && ARCH_EXYNOS && PM) || ((ARM || ARM64) && COMPILE_TEST)
> 
> (ARM && ARCH_EXYNOS && PM) || COMPILE_TEST
> 
> You don't need to limit compile testing to ARM/ARM64.
> 

So overall it should be like:

config SAMSUNG_MC
	bool "Samsung Exynos Memory Controller support" if COMPILE_TEST
	help
	  Support for the Memory Controller (MC) devices found on
	  Samsung Exynos SoCs.

if SAMSUNG_MC

config EXYNOS_SROM
	bool "Exynos SROM controller driver" if COMPILE_TEST
	depends on (ARM && ARCH_EXYNOS && PM) || COMPILE_TEST

endif

Re: [RESPIN 0/6] Add support for Exynos SROM Controller driver.

[Krzysztof Kozlowski]

On 25.02.2016 17:33, Pankaj Dubey wrote:
> This series is collection of patches already reviewed and merged in
> maintainer's tree, but could not make it thorugh main linus tree, due
> to last moment suggestion of proper location of driver should be
> "drivers/memory" instead of "drivers/soc". I have rebased all the patches
> and moved into "drivers/memory/samsung".
> 
> As this is just a movement without changing actual driver code,
> I have not removed "Reviewed-By", "Tested-By" or "Acked-By".
> 
> To make sure everything is fine, I have again tested it on Exynos5880 based
> Chromebook for normal boot, S2R functionality and its working fine.
> 
> This series has been prepared on top of next-soc branch of Krzysztof's tree.
> 
> Changes w.r.t. original merged patches:
>  - Moved exynos-srom driver into "drivers/memory/samsung"
>  - Moved DT binding documentation into "bindings/memory-controller"
>  - Added new patch for entry of new directory in MAINTAINERS file.
>  - Added new CONFIG as SAMSUNG_MC for grouping Samsung's memory controller drivers.
>  - Added my Signed-off-by for patch 5/6 and 6/6 for touching it.
> 
> Pankaj Dubey (4):
>   dt-bindings: EXYNOS: Add exynos-srom device tree binding
>   drivers: memory: Add support for exynos SROM driver
>   MAINTAINERS: Add maintainers entry for drivers/memory/samsung
>   ARM: EXYNOS: Remove SROM related register settings from mach-exynos
> 
> Pavel Fedin (2):
>   dt-bindings: EXYNOS: Describe SROMc configuration
>   drivers: memory: exynos-srom: Add support for bank configuration

Thanks!

The driver was put under samsung subdirectory of drivers/memory because
Pankaj has a plan to add more stuff there. This way we can avoid
unnecessary movements of files (making history reading more difficult).


I applied (with fixes mentioned in my comments) everything and pushed
here so everyone could play with it:
https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=for-v4.6/drivers-soc-exynos-srom-2


It is also included in for-next.

If there is no comments then I will send it in pull request for v4.6.

Best regards,
Krzysztof

RE: [RESPIN 0/6] Add support for Exynos SROM Controller driver.

[Pavel Fedin]

 Hello!

> I applied (with fixes mentioned in my comments) everything and pushed
> here so everyone could play with it:
> https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=for-v4.6/drivers-soc-
> exynos-srom-2

 I see the last patch (adding Ethernet chip to DT) is missing. Is it intentional, so that it goes later?

Kind regards,
Pavel Fedin
Senior Engineer
Samsung Electronics Research center Russia

Re: [RESPIN 0/6] Add support for Exynos SROM Controller driver.

[Krzysztof Kozlowski]

2016-02-26 17:33 GMT+09:00 Pavel Fedin <p.fedin@samsung.com>:
>  Hello!
>
>> I applied (with fixes mentioned in my comments) everything and pushed
>> here so everyone could play with it:
>> https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git/log/?h=for-v4.6/drivers-soc-
>> exynos-srom-2
>
>  I see the last patch (adding Ethernet chip to DT) is missing. Is it intentional, so that it goes later?
>

It was already merged into arm-soc:
https://git.kernel.org/cgit/linux/kernel/git/arm/arm-soc.git/commit/?h=next/dt&id=a090435727f6ccf0c5e77793ca48681122e5b950

All DT changes (SROM, PMU) were accepted by arm-soc maintainers.

Best regards,
Krzysztof

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[Rob Herring]

On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
> This patch adds exynos-srom binding information for SROM Controller
> driver on Exynos SoCs.
> 
> CC: Rob Herring <robh+dt@kernel.org>
> CC: Mark Rutland <mark.rutland@arm.com>
> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
> CC: devicetree@vger.kernel.org
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> Signed-off-by: Kukjin Kim <kgene@kernel.org>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> ---
>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> new file mode 100644
> index 0000000..33886d5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> @@ -0,0 +1,12 @@
> +SAMSUNG Exynos SoCs SROM Controller driver.
> +
> +Required properties:
> +- compatible : Should contain "samsung,exynos-srom".

There should be SoC specific compatible strings in addition to this.

> +
> +- reg: offset and length of the register set
> +
> +Example:
> +	sromc@12570000 {

This should be memory-controller@...

> +		compatible = "samsung,exynos-srom";
> +		reg = <0x12570000 0x10>;

The next patch changes the size to 0x14?

BTW, you could just combine both patches. I guess you didn't to maintain 
authorship?

Rob

Re: [RESPIN 5/6] dt-bindings: EXYNOS: Describe SROMc configuration

[Rob Herring]

On Thu, Feb 25, 2016 at 02:03:41PM +0530, Pankaj Dubey wrote:
> From: Pavel Fedin <p.fedin@samsung.com>
> 
> Add documentation for new subnode properties, allowing bank configuration.
> Based on u-boot implementation, but heavily reworked.
> 
> Also, fix size of SROMc mapping in the example.

Fix it in the previous patch.

> CC: devicetree@vger.kernel.org
> Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> Acked-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
> ---
>  .../bindings/memory-controllers/exynos-srom.txt    | 73 +++++++++++++++++++++-
>  1 file changed, 71 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> index 33886d5..e5c18df 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
> @@ -5,8 +5,77 @@ Required properties:
>  
>  - reg: offset and length of the register set
>  
> -Example:
> +Optional properties:
> +The SROM controller can be used to attach external peripherals. In this case
> +extra properties, describing the bus behind it, should be specified as below:
> +
> +- #address-cells: Must be set to 2 to allow device address translation.
> +		  Address is specified as (bank#, offset).
> +
> +- #size-cells: Must be set to 1 to allow device size passing
> +
> +- ranges: Must be set up to reflect the memory layout with four integer values
> +	  per bank:
> +		<bank-number> 0 <parent address of bank> <size>
> +
> +Sub-nodes:
> +The actual device nodes should be added as subnodes to the SROMc node. These
> +subnodes, except regular device specification, should contain the following

s/except/in addition to/

> +properties, describing configuration of the relevant SROM bank:
> +
> +Required properties:
> +- reg: bank number, base address (relative to start of the bank) and size of
> +       the memory mapped for the device. Note that base address will be
> +       typically 0 as this is the start of the bank.
> +
> +- samsung,srom-timing : array of 6 integers, specifying bank timings in the
> +                        following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
> +                        Each value is specified in cycles and has the following
> +                        meaning and valid range:
> +                        Tacp : Page mode access cycle at Page mode (0 - 15)
> +                        Tcah : Address holding time after CSn (0 - 15)
> +                        Tcoh : Chip selection hold on OEn (0 - 15)
> +                        Tacc : Access cycle (0 - 31, the actual time is N + 1)
> +                        Tcos : Chip selection set-up before OEn (0 - 15)
> +                        Tacs : Address set-up before CSn (0 - 15)
> +
> +Optional properties:
> +- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used.
> +
> +- samsung,srom-page-mode : page mode configuration for the bank:
> +			   0 - normal (one data)
> +			   1 - four data
> +			   If omitted, default of 0 is used.

Make this a bool instead.

Rob

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[pankaj.dubey]

Hi,

On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>> This patch adds exynos-srom binding information for SROM Controller
>> driver on Exynos SoCs.
>>
>> CC: Rob Herring <robh+dt@kernel.org>
>> CC: Mark Rutland <mark.rutland@arm.com>
>> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
>> CC: devicetree@vger.kernel.org
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>>  1 file changed, 12 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> new file mode 100644
>> index 0000000..33886d5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> @@ -0,0 +1,12 @@
>> +SAMSUNG Exynos SoCs SROM Controller driver.
>> +
>> +Required properties:
>> +- compatible : Should contain "samsung,exynos-srom".
> 
> There should be SoC specific compatible strings in addition to this.
> 

I do not understood need to additional need to SoC specific compatible,
as of now all SoCs having SROM can work with exynos specific common
compatible. Will you see any issues in this?

>> +
>> +- reg: offset and length of the register set
>> +
>> +Example:
>> +	sromc@12570000 {
> 
> This should be memory-controller@...
> 
>> +		compatible = "samsung,exynos-srom";
>> +		reg = <0x12570000 0x10>;
> 
> The next patch changes the size to 0x14?
> 
> BTW, you could just combine both patches. I guess you didn't to maintain 
> authorship?

OK. Will squash both of these patches, unless Pavel do not any objections.

Thanks,
Pankaj Dubey
> 
> Rob
> 
> 

Re: [RESPIN 5/6] dt-bindings: EXYNOS: Describe SROMc configuration

[pankaj.dubey]

Hi,

On Wednesday 02 March 2016 11:27 PM, Rob Herring wrote:
> On Thu, Feb 25, 2016 at 02:03:41PM +0530, Pankaj Dubey wrote:
>> From: Pavel Fedin <p.fedin@samsung.com>
>>
>> Add documentation for new subnode properties, allowing bank configuration.
>> Based on u-boot implementation, but heavily reworked.
>>
>> Also, fix size of SROMc mapping in the example.
> 
> Fix it in the previous patch.

OK.

> 
>> CC: devicetree@vger.kernel.org
>> Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> Acked-by: Rob Herring <robh@kernel.org>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>>  .../bindings/memory-controllers/exynos-srom.txt    | 73 +++++++++++++++++++++-
>>  1 file changed, 71 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> index 33886d5..e5c18df 100644
>> --- a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> @@ -5,8 +5,77 @@ Required properties:
>>  
>>  - reg: offset and length of the register set
>>  
>> -Example:
>> +Optional properties:
>> +The SROM controller can be used to attach external peripherals. In this case
>> +extra properties, describing the bus behind it, should be specified as below:
>> +
>> +- #address-cells: Must be set to 2 to allow device address translation.
>> +		  Address is specified as (bank#, offset).
>> +
>> +- #size-cells: Must be set to 1 to allow device size passing
>> +
>> +- ranges: Must be set up to reflect the memory layout with four integer values
>> +	  per bank:
>> +		<bank-number> 0 <parent address of bank> <size>
>> +
>> +Sub-nodes:
>> +The actual device nodes should be added as subnodes to the SROMc node. These
>> +subnodes, except regular device specification, should contain the following
> 
> s/except/in addition to/
> 

OK. Will update this description as suggested.

>> +properties, describing configuration of the relevant SROM bank:
>> +
>> +Required properties:
>> +- reg: bank number, base address (relative to start of the bank) and size of
>> +       the memory mapped for the device. Note that base address will be
>> +       typically 0 as this is the start of the bank.
>> +
>> +- samsung,srom-timing : array of 6 integers, specifying bank timings in the
>> +                        following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
>> +                        Each value is specified in cycles and has the following
>> +                        meaning and valid range:
>> +                        Tacp : Page mode access cycle at Page mode (0 - 15)
>> +                        Tcah : Address holding time after CSn (0 - 15)
>> +                        Tcoh : Chip selection hold on OEn (0 - 15)
>> +                        Tacc : Access cycle (0 - 31, the actual time is N + 1)
>> +                        Tcos : Chip selection set-up before OEn (0 - 15)
>> +                        Tacs : Address set-up before CSn (0 - 15)
>> +
>> +Optional properties:
>> +- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used.
>> +
>> +- samsung,srom-page-mode : page mode configuration for the bank:
>> +			   0 - normal (one data)
>> +			   1 - four data
>> +			   If omitted, default of 0 is used.
> 
> Make this a bool instead.
> 

I do not have strong objections to change this, but I can see doing so
will increase two or three lines in driver, as such this property is not
being used as bool in driver.


Sorry to say this but I do not understand why these comments are coming
now? Whereas you had given your "Acked-by" to the same patch when it was
posted previously by Pavel and we were keeping this driver under
"drivers/soc/samsung". Is it just because we are moving to
"drivers/memory" and it needs to be consistent with other memory
controller drivers?

Thanks,
Pankaj Dubey
> Rob
> 
> 

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[pankaj.dubey]

Hi

On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>> This patch adds exynos-srom binding information for SROM Controller
>> driver on Exynos SoCs.
>>
>> CC: Rob Herring <robh+dt@kernel.org>
>> CC: Mark Rutland <mark.rutland@arm.com>
>> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
>> CC: devicetree@vger.kernel.org
>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>> ---
>>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>>  1 file changed, 12 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>
>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> new file mode 100644
>> index 0000000..33886d5
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>> @@ -0,0 +1,12 @@
>> +SAMSUNG Exynos SoCs SROM Controller driver.
>> +
>> +Required properties:
>> +- compatible : Should contain "samsung,exynos-srom".
> 
> There should be SoC specific compatible strings in addition to this.
> 

I do not understood need of additional SoC specific compatible here. As
of now all SoCs having SROM can work with exynos specific common
compatible. Do you see any issues if we do not have SoC specific
compatible here.

>> +
>> +- reg: offset and length of the register set
>> +
>> +Example:
>> +	sromc@12570000 {
> 
> This should be memory-controller@...
> 
>> +		compatible = "samsung,exynos-srom";
>> +		reg = <0x12570000 0x10>;
> 
> The next patch changes the size to 0x14?
> 
> BTW, you could just combine both patches. I guess you didn't to maintain 
> authorship?
> 

OK. Will squash both of these patches, unless Pavel do not have any
objections to this.

Thanks,
Pankaj Dubey

> Rob
> 
> 

RE: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[Pavel Fedin]

 Hello!

>> BTW, you could just combine both patches. I guess you didn't to 
>> maintain authorship?

>OK. Will squash both of these patches, unless Pavel do not any objections.

 I don't.

Kind regards.

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[pankaj.dubey]

On Saturday 05 March 2016 11:48 AM, pankaj.dubey wrote:
> Hi
> 
> On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
>> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>>> This patch adds exynos-srom binding information for SROM Controller
>>> driver on Exynos SoCs.
>>>
>>> CC: Rob Herring <robh+dt@kernel.org>
>>> CC: Mark Rutland <mark.rutland@arm.com>
>>> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
>>> CC: devicetree@vger.kernel.org
>>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>> ---
>>>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>> new file mode 100644
>>> index 0000000..33886d5
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>> @@ -0,0 +1,12 @@
>>> +SAMSUNG Exynos SoCs SROM Controller driver.
>>> +
>>> +Required properties:
>>> +- compatible : Should contain "samsung,exynos-srom".
>>
>> There should be SoC specific compatible strings in addition to this.
>>
> 
> I do not understood need of additional SoC specific compatible here. As
> of now all SoCs having SROM can work with exynos specific common
> compatible. Do you see any issues if we do not have SoC specific
> compatible here.
> 

Gentle ping.

Thanks,
Pankaj Dubey

Re: [RESPIN 1/6] dt-bindings: EXYNOS: Add exynos-srom device tree binding

[Krzysztof Kozlowski]

On 05.03.2016 13:42, pankaj.dubey wrote:
> Hi,
> 
> On Wednesday 02 March 2016 11:23 PM, Rob Herring wrote:
>> On Thu, Feb 25, 2016 at 02:03:37PM +0530, Pankaj Dubey wrote:
>>> This patch adds exynos-srom binding information for SROM Controller
>>> driver on Exynos SoCs.
>>>
>>> CC: Rob Herring <robh+dt@kernel.org>
>>> CC: Mark Rutland <mark.rutland@arm.com>
>>> CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
>>> CC: devicetree@vger.kernel.org
>>> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
>>> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>> Signed-off-by: Kukjin Kim <kgene@kernel.org>
>>> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
>>> ---
>>>  .../devicetree/bindings/memory-controllers/exynos-srom.txt   | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>> new file mode 100644
>>> index 0000000..33886d5
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.txt
>>> @@ -0,0 +1,12 @@
>>> +SAMSUNG Exynos SoCs SROM Controller driver.
>>> +
>>> +Required properties:
>>> +- compatible : Should contain "samsung,exynos-srom".
>>
>> There should be SoC specific compatible strings in addition to this.
>>
> 
> I do not understood need to additional need to SoC specific compatible,
> as of now all SoCs having SROM can work with exynos specific common
> compatible. Will you see any issues in this?

Dear Rob, Pankaj,

I would like to proceed with this patchset. I guess your comment here
was about to change the compatible from generic exynos-like to a model
specific. How about this:
- compatible : Should contain "samsung,exynos4210-srom".

Is this okay?

(the oldest chip mentioning SROM controller as separate block is Exynos4210)


Best regards,
Krzysztof