* [PATCH 0/2] ARM: dts: sunxi: Add pll3 and pll7 clock to sun[47]i.dtsi
@ 2016-05-03 17:14 Priit Laes
2016-05-03 17:14 ` [PATCH 1/2] ARM: sun4i: dt: Add pll3 and pll7 clocks Priit Laes
2016-05-03 17:14 ` [PATCH 2/2] ARM: sun7i: " Priit Laes
0 siblings, 2 replies; 5+ messages in thread
From: Priit Laes @ 2016-05-03 17:14 UTC (permalink / raw)
To: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, Maxime Ripard, Chen-Yu Tsai
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-sunxi, Priit Laes
Enable the pll3 and pll7 clocks in the DT that are used to drive the
display-related clocks.
Priit Laes (2):
ARM: sun4i: dt: Add pll3 and pll7 clocks
ARM: sun7i: dt: Add pll3 and pll7 clocks
arch/arm/boot/dts/sun4i-a10.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
arch/arm/boot/dts/sun7i-a20.dtsi | 41 +++++++++++++++++++++++++++++++++++++
2 files changed, 85 insertions(+)
--
2.8.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] ARM: sun4i: dt: Add pll3 and pll7 clocks
2016-05-03 17:14 [PATCH 0/2] ARM: dts: sunxi: Add pll3 and pll7 clock to sun[47]i.dtsi Priit Laes
@ 2016-05-03 17:14 ` Priit Laes
2016-05-04 18:32 ` Maxime Ripard
2016-05-03 17:14 ` [PATCH 2/2] ARM: sun7i: " Priit Laes
1 sibling, 1 reply; 5+ messages in thread
From: Priit Laes @ 2016-05-03 17:14 UTC (permalink / raw)
To: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, Maxime Ripard, Chen-Yu Tsai
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-sunxi, Priit Laes
Enable pll3 and pll7 clocks that are needed to drive display clocks.
Signed-off-by: Priit Laes <plaes@plaes.org>
---
arch/arm/boot/dts/sun4i-a10.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 268a150..c893744 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -184,6 +184,15 @@
clock-output-names = "osc24M";
};
+ osc3M: osc3M_clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <8>;
+ clock-mult = <1>;
+ clocks = <&osc24M>;
+ clock-output-names = "osc3M";
+ };
+
osc32k: clk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -208,6 +217,24 @@
"pll2-4x", "pll2-8x";
};
+ pll3: clk@01c20010 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-pll3-clk";
+ reg = <0x01c20010 0x4>;
+ clocks = <&osc3M>;
+ clock-output-names = "pll3";
+ };
+
+ pll3x2: pll3x2_clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <2>;
+ clocks = <&pll3>;
+ clock-output-names = "pll3-x2";
+ };
+
+
pll4: clk@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-pll1-clk";
@@ -232,6 +259,23 @@
clock-output-names = "pll6_sata", "pll6_other", "pll6";
};
+ pll7: clk@01c20030 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-pll3-clk";
+ reg = <0x01c20030 0x4>;
+ clocks = <&osc3M>;
+ clock-output-names = "pll7";
+ };
+
+ pll7x2: pll7x2_clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <2>;
+ clocks = <&pll7>;
+ clock-output-names = "pll7-2x";
+ };
+
/* dummy is 200M */
cpu: cpu@01c20054 {
#clock-cells = <0>;
--
2.8.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] ARM: sun7i: dt: Add pll3 and pll7 clocks
2016-05-03 17:14 [PATCH 0/2] ARM: dts: sunxi: Add pll3 and pll7 clock to sun[47]i.dtsi Priit Laes
2016-05-03 17:14 ` [PATCH 1/2] ARM: sun4i: dt: Add pll3 and pll7 clocks Priit Laes
@ 2016-05-03 17:14 ` Priit Laes
2016-05-04 18:32 ` Maxime Ripard
1 sibling, 1 reply; 5+ messages in thread
From: Priit Laes @ 2016-05-03 17:14 UTC (permalink / raw)
To: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, Maxime Ripard, Chen-Yu Tsai
Cc: devicetree, linux-arm-kernel, linux-kernel, linux-sunxi, Priit Laes
Enable pll3 and pll7 clocks that are needed by display clocks.
---
arch/arm/boot/dts/sun7i-a20.dtsi | 41 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index bf5d056..2688512 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -187,6 +187,15 @@
clock-output-names = "osc24M";
};
+ osc3M: osc3M_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-div = <8>;
+ clock-mult = <1>;
+ clocks = <&osc24M>;
+ clock-output-names = "osc3M";
+ };
+
osc32k: clk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
@@ -211,6 +220,22 @@
"pll2-4x", "pll2-8x";
};
+ pll3: clk@01c20010 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-pll3-clk";
+ reg = <0x01c20010 0x4>;
+ clock = <&osc3M>;
+ clock-output-names = "pll3";
+};
+
+ pll3x2: pll3x2_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-div = <1>;
+ clock-mult = <2>;
+ clock-output-names = "pll3-2x";
+ };
+
pll4: clk@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-pll4-clk";
@@ -236,6 +261,22 @@
"pll6_div_4";
};
+ pll7: clk@01c20030 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-pll3-clk";
+ reg = <0x01c20030 0x4>;
+ clock = <&osc3M>;
+ clock-output-names = "pll7";
+};
+
+ pll7x2: pll7x2_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-div = <1>;
+ clock-mult = <2>;
+ clock-output-names = "pll7-2x";
+ };
+
pll8: clk@01c20040 {
#clock-cells = <0>;
compatible = "allwinner,sun7i-a20-pll4-clk";
--
2.8.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] ARM: sun4i: dt: Add pll3 and pll7 clocks
2016-05-03 17:14 ` [PATCH 1/2] ARM: sun4i: dt: Add pll3 and pll7 clocks Priit Laes
@ 2016-05-04 18:32 ` Maxime Ripard
0 siblings, 0 replies; 5+ messages in thread
From: Maxime Ripard @ 2016-05-04 18:32 UTC (permalink / raw)
To: Priit Laes
Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, Chen-Yu Tsai, devicetree, linux-arm-kernel,
linux-kernel, linux-sunxi
[-- Attachment #1: Type: text/plain, Size: 1641 bytes --]
Hi,
On Tue, May 03, 2016 at 08:14:18PM +0300, Priit Laes wrote:
> Enable pll3 and pll7 clocks that are needed to drive display clocks.
>
> Signed-off-by: Priit Laes <plaes@plaes.org>
> ---
> arch/arm/boot/dts/sun4i-a10.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
> index 268a150..c893744 100644
> --- a/arch/arm/boot/dts/sun4i-a10.dtsi
> +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
> @@ -184,6 +184,15 @@
> clock-output-names = "osc24M";
> };
>
> + osc3M: osc3M_clk {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clock-div = <8>;
> + clock-mult = <1>;
> + clocks = <&osc24M>;
> + clock-output-names = "osc3M";
> + };
> +
> osc32k: clk@0 {
> #clock-cells = <0>;
> compatible = "fixed-clock";
> @@ -208,6 +217,24 @@
> "pll2-4x", "pll2-8x";
> };
>
> + pll3: clk@01c20010 {
> + #clock-cells = <0>;
> + compatible = "allwinner,sun4i-a10-pll3-clk";
> + reg = <0x01c20010 0x4>;
> + clocks = <&osc3M>;
> + clock-output-names = "pll3";
> + };
> +
> + pll3x2: pll3x2_clk {
> + compatible = "fixed-factor-clock";
> + #clock-cells = <0>;
> + clock-div = <1>;
> + clock-mult = <2>;
> + clocks = <&pll3>;
> + clock-output-names = "pll3-x2";
We usually call them -2x
> + };
> +
> +
One newline too many.
Fixed it and applied the patch.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] ARM: sun7i: dt: Add pll3 and pll7 clocks
2016-05-03 17:14 ` [PATCH 2/2] ARM: sun7i: " Priit Laes
@ 2016-05-04 18:32 ` Maxime Ripard
0 siblings, 0 replies; 5+ messages in thread
From: Maxime Ripard @ 2016-05-04 18:32 UTC (permalink / raw)
To: Priit Laes
Cc: Rob Herring, Pawel Moll, Mark Rutland, Ian Campbell, Kumar Gala,
Russell King, Chen-Yu Tsai, devicetree, linux-arm-kernel,
linux-kernel, linux-sunxi
[-- Attachment #1: Type: text/plain, Size: 1904 bytes --]
Hi,
On Tue, May 03, 2016 at 08:14:19PM +0300, Priit Laes wrote:
> Enable pll3 and pll7 clocks that are needed by display clocks.
Missing signed-off-by
> ---
> arch/arm/boot/dts/sun7i-a20.dtsi | 41 ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
> index bf5d056..2688512 100644
> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
> @@ -187,6 +187,15 @@
> clock-output-names = "osc24M";
> };
>
> + osc3M: osc3M_clk {
> + #clock-cells = <0>;
> + compatible = "fixed-factor-clock";
> + clock-div = <8>;
> + clock-mult = <1>;
> + clocks = <&osc24M>;
> + clock-output-names = "osc3M";
> + };
> +
> osc32k: clk@0 {
> #clock-cells = <0>;
> compatible = "fixed-clock";
> @@ -211,6 +220,22 @@
> "pll2-4x", "pll2-8x";
> };
>
> + pll3: clk@01c20010 {
> + #clock-cells = <0>;
> + compatible = "allwinner,sun4i-a10-pll3-clk";
> + reg = <0x01c20010 0x4>;
> + clock = <&osc3M>;
> + clock-output-names = "pll3";
> +};
The indentation is off.
> +
> + pll3x2: pll3x2_clk {
> + #clock-cells = <0>;
> + compatible = "fixed-factor-clock";
> + clock-div = <1>;
> + clock-mult = <2>;
> + clock-output-names = "pll3-2x";
> + };
> +
> pll4: clk@01c20018 {
> #clock-cells = <0>;
> compatible = "allwinner,sun7i-a20-pll4-clk";
> @@ -236,6 +261,22 @@
> "pll6_div_4";
> };
>
> + pll7: clk@01c20030 {
> + #clock-cells = <0>;
> + compatible = "allwinner,sun4i-a10-pll3-clk";
> + reg = <0x01c20030 0x4>;
> + clock = <&osc3M>;
> + clock-output-names = "pll7";
> +};
Ditto.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-05-04 18:33 UTC | newest]
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2016-05-03 17:14 [PATCH 0/2] ARM: dts: sunxi: Add pll3 and pll7 clock to sun[47]i.dtsi Priit Laes
2016-05-03 17:14 ` [PATCH 1/2] ARM: sun4i: dt: Add pll3 and pll7 clocks Priit Laes
2016-05-04 18:32 ` Maxime Ripard
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2016-05-04 18:32 ` Maxime Ripard
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