From: Andre Przywara <andre.przywara@arm.com>
To: Will Deacon <will.deacon@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>
Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 3/6] arm64: include alternative handling in dcache_by_line_op
Date: Mon, 9 May 2016 17:49:47 +0100 [thread overview]
Message-ID: <1462812590-4494-4-git-send-email-andre.przywara@arm.com> (raw)
In-Reply-To: <1462812590-4494-1-git-send-email-andre.przywara@arm.com>
The newly introduced dcache_by_line_op macro is used at least in
one occassion at the moment to issue a "dc cvau" instruction,
which is affected by ARM errata 819472, 826319, 827319 and 824069.
Change the macro to allow for alternative patching in there to
protect affected Cortex-A53 cores.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/mm/proc-macros.S | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/mm/proc-macros.S b/arch/arm64/mm/proc-macros.S
index e6a30e1..5786017 100644
--- a/arch/arm64/mm/proc-macros.S
+++ b/arch/arm64/mm/proc-macros.S
@@ -78,7 +78,14 @@
add \size, \kaddr, \size
sub \tmp2, \tmp1, #1
bic \kaddr, \kaddr, \tmp2
-9998: dc \op, \kaddr
+9998:
+ alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE, (\op == cvau || \op == cvac)
+ dc \op, \kaddr
+ .if (\op == cvau || \op == cvac)
+ alternative_else
+ dc civac, \kaddr
+ alternative_endif
+ .endif
add \kaddr, \kaddr, \tmp1
cmp \kaddr, \size
b.lo 9998b
--
2.7.3
next prev parent reply other threads:[~2016-05-09 16:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-09 16:49 [PATCH 0/6] arm64: Extend Cortex-A53 errata workaround Andre Przywara
2016-05-09 16:49 ` [PATCH 1/6] arm64: alternatives: drop enable parameter from _else and _endif macro Andre Przywara
2016-06-23 17:17 ` Catalin Marinas
2016-05-09 16:49 ` [PATCH 2/6] arm64: fix "dc cvau" cache operation on errata-affected core Andre Przywara
2016-05-09 16:49 ` Andre Przywara [this message]
2016-06-24 15:32 ` [PATCH 3/6] arm64: include alternative handling in dcache_by_line_op Catalin Marinas
2016-05-09 16:49 ` [PATCH 4/6] arm64: errata: Calling enable functions for CPU errata too Andre Przywara
2016-06-10 15:31 ` Suzuki K Poulose
2016-06-24 15:34 ` Catalin Marinas
2016-05-09 16:49 ` [PATCH 5/6] arm64: consolidate signal injection on emulation errors Andre Przywara
2016-05-09 16:49 ` [PATCH 6/6] arm64: trap userspace "dc cvau" cache operation on errata-affected core Andre Przywara
2016-06-14 16:16 ` Suzuki K Poulose
2016-06-17 17:20 ` Andre Przywara
2016-06-17 17:25 ` Suzuki K Poulose
2016-06-24 16:25 ` Catalin Marinas
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