From: Ian Abbott <abbotti@mev.co.uk>
To: devel@driverdev.osuosl.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Ian Abbott <abbotti@mev.co.uk>,
H Hartley Sweeten <hsweeten@visionengravers.com>,
linux-kernel@vger.kernel.org
Subject: [PATCH 16/20] staging: comedi: drivers: re-do PLX PCI 9080 DMACSRx register values
Date: Fri, 20 May 2016 14:49:18 +0100 [thread overview]
Message-ID: <1463752162-15181-17-git-send-email-abbotti@mev.co.uk> (raw)
In-Reply-To: <1463752162-15181-1-git-send-email-abbotti@mev.co.uk>
Replace the existing macros in "plx9080.h" that define values for the
DMACSR0 and DMACSR0 registers. Use the prefix `PLX_DMACSR_` for the
macros. Make use of the `BIT(x)` macro to define the values.
Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
---
drivers/staging/comedi/drivers/cb_pcidas64.c | 22 +++++++++++-----------
drivers/staging/comedi/drivers/gsc_hpdi.c | 8 ++++----
drivers/staging/comedi/drivers/plx9080.h | 23 ++++++++++++++---------
3 files changed, 29 insertions(+), 24 deletions(-)
diff --git a/drivers/staging/comedi/drivers/cb_pcidas64.c b/drivers/staging/comedi/drivers/cb_pcidas64.c
index a4d10a3..1f9c08a 100644
--- a/drivers/staging/comedi/drivers/cb_pcidas64.c
+++ b/drivers/staging/comedi/drivers/cb_pcidas64.c
@@ -2368,7 +2368,7 @@ static inline void dma_start_sync(struct comedi_device *dev,
/* spinlock for plx dma control/status reg */
spin_lock_irqsave(&dev->spinlock, flags);
- writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT,
+ writeb(PLX_DMACSR_ENABLE | PLX_DMACSR_START | PLX_DMACSR_CLEARINTR,
devpriv->plx9080_iobase + PLX_REG_DMACSR(channel));
spin_unlock_irqrestore(&dev->spinlock, flags);
}
@@ -2838,10 +2838,10 @@ static void handle_ai_interrupt(struct comedi_device *dev,
spin_lock_irqsave(&dev->spinlock, flags);
dma1_status = readb(devpriv->plx9080_iobase + PLX_REG_DMACSR1);
if (plx_status & PLX_INTCSR_DMA1IA) { /* dma chan 1 interrupt */
- writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
+ writeb((dma1_status & PLX_DMACSR_ENABLE) | PLX_DMACSR_CLEARINTR,
devpriv->plx9080_iobase + PLX_REG_DMACSR1);
- if (dma1_status & PLX_DMA_EN_BIT)
+ if (dma1_status & PLX_DMACSR_ENABLE)
drain_dma_buffers(dev, 1);
}
spin_unlock_irqrestore(&dev->spinlock, flags);
@@ -2889,7 +2889,7 @@ static int last_ao_dma_load_completed(struct comedi_device *dev)
buffer_index = prev_ao_dma_index(dev);
dma_status = readb(devpriv->plx9080_iobase + PLX_REG_DMACSR0);
- if ((dma_status & PLX_DMA_DONE_BIT) == 0)
+ if ((dma_status & PLX_DMACSR_DONE) == 0)
return 0;
transfer_address =
@@ -2903,8 +2903,8 @@ static int last_ao_dma_load_completed(struct comedi_device *dev)
static inline int ao_dma_needs_restart(struct comedi_device *dev,
unsigned short dma_status)
{
- if ((dma_status & PLX_DMA_DONE_BIT) == 0 ||
- (dma_status & PLX_DMA_EN_BIT) == 0)
+ if ((dma_status & PLX_DMACSR_DONE) == 0 ||
+ (dma_status & PLX_DMACSR_ENABLE) == 0)
return 0;
if (last_ao_dma_load_completed(dev))
return 0;
@@ -3016,16 +3016,16 @@ static void handle_ao_interrupt(struct comedi_device *dev,
spin_lock_irqsave(&dev->spinlock, flags);
dma0_status = readb(devpriv->plx9080_iobase + PLX_REG_DMACSR0);
if (plx_status & PLX_INTCSR_DMA0IA) { /* dma chan 0 interrupt */
- if ((dma0_status & PLX_DMA_EN_BIT) &&
- !(dma0_status & PLX_DMA_DONE_BIT)) {
- writeb(PLX_DMA_EN_BIT | PLX_CLEAR_DMA_INTR_BIT,
+ if ((dma0_status & PLX_DMACSR_ENABLE) &&
+ !(dma0_status & PLX_DMACSR_DONE)) {
+ writeb(PLX_DMACSR_ENABLE | PLX_DMACSR_CLEARINTR,
devpriv->plx9080_iobase + PLX_REG_DMACSR0);
} else {
- writeb(PLX_CLEAR_DMA_INTR_BIT,
+ writeb(PLX_DMACSR_CLEARINTR,
devpriv->plx9080_iobase + PLX_REG_DMACSR0);
}
spin_unlock_irqrestore(&dev->spinlock, flags);
- if (dma0_status & PLX_DMA_EN_BIT) {
+ if (dma0_status & PLX_DMACSR_ENABLE) {
load_ao_dma(dev, cmd);
/* try to recover from dma end-of-chain event */
if (ao_dma_needs_restart(dev, dma0_status))
diff --git a/drivers/staging/comedi/drivers/gsc_hpdi.c b/drivers/staging/comedi/drivers/gsc_hpdi.c
index f2f1874..af4b417 100644
--- a/drivers/staging/comedi/drivers/gsc_hpdi.c
+++ b/drivers/staging/comedi/drivers/gsc_hpdi.c
@@ -214,10 +214,10 @@ static irqreturn_t gsc_hpdi_interrupt(int irq, void *d)
dma0_status = readb(devpriv->plx9080_mmio + PLX_REG_DMACSR0);
if (plx_status & PLX_INTCSR_DMA0IA) {
/* dma chan 0 interrupt */
- writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
+ writeb((dma0_status & PLX_DMACSR_ENABLE) | PLX_DMACSR_CLEARINTR,
devpriv->plx9080_mmio + PLX_REG_DMACSR0);
- if (dma0_status & PLX_DMA_EN_BIT)
+ if (dma0_status & PLX_DMACSR_ENABLE)
gsc_hpdi_drain_dma(dev, 0);
}
spin_unlock_irqrestore(&dev->spinlock, flags);
@@ -227,7 +227,7 @@ static irqreturn_t gsc_hpdi_interrupt(int irq, void *d)
dma1_status = readb(devpriv->plx9080_mmio + PLX_REG_DMACSR1);
if (plx_status & PLX_INTCSR_DMA1IA) {
/* XXX */ /* dma chan 1 interrupt */
- writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT,
+ writeb((dma1_status & PLX_DMACSR_ENABLE) | PLX_DMACSR_CLEARINTR,
devpriv->plx9080_mmio + PLX_REG_DMACSR1);
}
spin_unlock_irqrestore(&dev->spinlock, flags);
@@ -316,7 +316,7 @@ static int gsc_hpdi_cmd(struct comedi_device *dev,
/* enable dma transfer */
spin_lock_irqsave(&dev->spinlock, flags);
- writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT,
+ writeb(PLX_DMACSR_ENABLE | PLX_DMACSR_START | PLX_DMACSR_CLEARINTR,
devpriv->plx9080_mmio + PLX_REG_DMACSR0);
spin_unlock_irqrestore(&dev->spinlock, flags);
diff --git a/drivers/staging/comedi/drivers/plx9080.h b/drivers/staging/comedi/drivers/plx9080.h
index 2fe1a4d..9e76342 100644
--- a/drivers/staging/comedi/drivers/plx9080.h
+++ b/drivers/staging/comedi/drivers/plx9080.h
@@ -529,11 +529,16 @@ struct plx_dma_desc {
#define PLX_REG_DMACSR0 0x00a8
#define PLX_REG_DMACSR1 0x00a9
-#define PLX_DMA_EN_BIT 0x1 /* enable dma channel */
-#define PLX_DMA_START_BIT 0x2 /* start dma transfer */
-#define PLX_DMA_ABORT_BIT 0x4 /* abort dma transfer */
-#define PLX_CLEAR_DMA_INTR_BIT 0x8 /* clear dma interrupt */
-#define PLX_DMA_DONE_BIT 0x10 /* transfer done status bit */
+/* Channel Enable */
+#define PLX_DMACSR_ENABLE BIT(0)
+/* Channel Start - write 1 to start transfer (write-only) */
+#define PLX_DMACSR_START BIT(1)
+/* Channel Abort - write 1 to abort transfer (write-only) */
+#define PLX_DMACSR_ABORT BIT(2)
+/* Clear Interrupt - write 1 to clear DMA Channel Interrupt (write-only) */
+#define PLX_DMACSR_CLEARINTR BIT(3)
+/* Channel Done - transfer complete/inactive (read-only) */
+#define PLX_DMACSR_DONE BIT(4)
/* DMA Threshold Register */
#define PLX_REG_DMATHR 0x00b0
@@ -571,11 +576,11 @@ static inline int plx9080_abort_dma(void __iomem *iobase, unsigned int channel)
/* abort dma transfer if necessary */
dma_status = readb(dma_cs_addr);
- if ((dma_status & PLX_DMA_EN_BIT) == 0)
+ if ((dma_status & PLX_DMACSR_ENABLE) == 0)
return 0;
/* wait to make sure done bit is zero */
- for (i = 0; (dma_status & PLX_DMA_DONE_BIT) && i < timeout; i++) {
+ for (i = 0; (dma_status & PLX_DMACSR_DONE) && i < timeout; i++) {
udelay(1);
dma_status = readb(dma_cs_addr);
}
@@ -583,10 +588,10 @@ static inline int plx9080_abort_dma(void __iomem *iobase, unsigned int channel)
return -ETIMEDOUT;
/* disable and abort channel */
- writeb(PLX_DMA_ABORT_BIT, dma_cs_addr);
+ writeb(PLX_DMACSR_ABORT, dma_cs_addr);
/* wait for dma done bit */
dma_status = readb(dma_cs_addr);
- for (i = 0; (dma_status & PLX_DMA_DONE_BIT) == 0 && i < timeout; i++) {
+ for (i = 0; (dma_status & PLX_DMACSR_DONE) == 0 && i < timeout; i++) {
udelay(1);
dma_status = readb(dma_cs_addr);
}
--
2.8.1
next prev parent reply other threads:[~2016-05-20 13:50 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-20 13:49 [PATCH 00/20] staging: comedi: re-do drivers/plx9080.h Ian Abbott
2016-05-20 13:49 ` [PATCH 01/20] staging: comedi: plx9080.h: correct LRNG_IO_MASK and LMAP_IO_MASK Ian Abbott
2016-05-20 13:49 ` [PATCH 02/20] staging: comedi: plx9080.h: remove Power-Up Test Suite stuff Ian Abbott
2016-05-20 13:49 ` [PATCH 03/20] staging: comedi: drivers: rename PLX PCI 9080 register offsets Ian Abbott
2016-05-20 16:21 ` Hartley Sweeten
2016-05-20 16:30 ` Ian Abbott
2016-05-20 16:51 ` Hartley Sweeten
2016-05-20 13:49 ` [PATCH 04/20] staging: comedi: drivers: re-do macros for PLX PCI 9080 LASxRR values Ian Abbott
2016-05-20 16:37 ` Hartley Sweeten
2016-05-20 17:17 ` Ian Abbott
2016-05-20 17:52 ` Hartley Sweeten
2016-05-23 11:21 ` Ian Abbott
2016-05-20 13:49 ` [PATCH 05/20] staging: comedi: drivers: re-do macros for PLX PCI 9080 LASxBA values Ian Abbott
2016-05-20 13:49 ` [PATCH 06/20] staging: comedi: drivers: re-do PLX PCI 9080 MARBR register values Ian Abbott
2016-05-20 13:49 ` [PATCH 07/20] staging: comedi: drivers: re-do PLX PCI 9080 BIGEND " Ian Abbott
2016-05-20 13:49 ` [PATCH 08/20] staging: comedi: drivers: re-do PLX PCI 9080 LBRDx " Ian Abbott
2016-05-20 13:49 ` [PATCH 09/20] staging: comedi: drivers: re-do PLX PCI 9080 DMPBAM " Ian Abbott
2016-05-20 13:49 ` [PATCH 10/20] staging: comedi: drivers: re-do PLX PCI 9080 DMCFGA " Ian Abbott
2016-05-20 13:49 ` [PATCH 11/20] staging: comedi: drivers: re-do PLX PCI 9080 INTCSR " Ian Abbott
2016-05-20 13:49 ` [PATCH 12/20] staging: comedi: drivers: re-do PLX PCI 9080 CNTRL " Ian Abbott
2016-05-20 13:49 ` [PATCH 13/20] staging: comedi: plx9080.h: add hard-coded PCIHIDR register value Ian Abbott
2016-05-20 13:49 ` [PATCH 14/20] staging: comedi: drivers: re-do PLX PCI 9080 DMAMODEx register values Ian Abbott
2016-05-20 13:49 ` [PATCH 15/20] staging: comedi: drivers: re-do PLX PCI 9080 DMADPRx " Ian Abbott
2016-05-20 13:49 ` Ian Abbott [this message]
2016-05-20 13:49 ` [PATCH 17/20] staging: comedi: drivers: add PLX PCI 9080 DMATHR " Ian Abbott
2016-05-20 13:49 ` [PATCH 18/20] staging: comedi: plx9080.h: tidy up some comments Ian Abbott
2016-05-20 13:49 ` [PATCH 19/20] staging: comedi: plx9080.h: Add kerneldoc comments Ian Abbott
2016-05-20 13:49 ` [PATCH 20/20] staging: comedi: plx9080.h: include headers for declarations Ian Abbott
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