From: Hartley Sweeten <HartleyS@visionengravers.com>
To: Ian Abbott <abbotti@mev.co.uk>,
"devel@driverdev.osuosl.org" <devel@driverdev.osuosl.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 04/20] staging: comedi: drivers: re-do macros for PLX PCI 9080 LASxRR values
Date: Fri, 20 May 2016 16:37:49 +0000 [thread overview]
Message-ID: <CO2PR01MB20883D5381CF052B0C54CD1ED04B0@CO2PR01MB2088.prod.exchangelabs.com> (raw)
In-Reply-To: <1463752162-15181-5-git-send-email-abbotti@mev.co.uk>
On Friday, May 20, 2016 6:49 AM, Ian Abbott wrote:
> Rename the macros for the PLX PCI 9080 LAS0RR and LAS1RR registers in
> "plx9080.h", using the prefix `PLX_LASRR_`. Make use of the `BIT(x)`
> and `GENMASK(h,l)` macros to define the values.
>
> Define a macro `PLX_LASRR_PREFETCH` for the "prefetchable memory" bit in
> this register, and define a macro `PLX_LASRR_MLOC_MASK` to mask the PCI
> memory location control bits.
>
> Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
> ---
[snip]
> diff --git a/drivers/staging/comedi/drivers/plx9080.h b/drivers/staging/comedi/drivers/plx9080.h
> index 92d2480..8788117 100644
> --- a/drivers/staging/comedi/drivers/plx9080.h
> +++ b/drivers/staging/comedi/drivers/plx9080.h
> @@ -54,14 +54,16 @@ struct plx_dma_desc {
> /* Local Address Space 1 Range Register */
> #define PLX_REG_LAS1RR 0x00f0
>
> -#define LRNG_IO 0x00000001 /* Map to: 1=I/O, 0=Mem */
> -#define LRNG_ANY32 0x00000000 /* Locate anywhere in 32 bit */
> -#define LRNG_LT1MB 0x00000002 /* Locate in 1st meg */
> -#define LRNG_ANY64 0x00000004 /* Locate anywhere in 64 bit */
> -/* bits that specify range for memory io */
> -#define LRNG_MEM_MASK 0xfffffff0
> -/* bits that specify range for normal io */
> -#define LRNG_IO_MASK 0xfffffffc
> +#define PLX_LASRR_IO BIT(0) /* Map to: 1=I/O, 0=Mem */
> +#define PLX_LASRR_ANY32 (BIT(1) * 0) /* Locate anywhere in 32 bit */
> +#define PLX_LASRR_LT1MB (BIT(1) * 1) /* Locate in 1st meg */
> +#define PLX_LASRR_ANY64 (BIT(1) * 2) /* Locate anywhere in 64 bit */
The (BIT(n) * x) looks ugly.
These bit define the memory space encoding. I would prefer something
like this:
#define PLX_LASSR_MLOC(x) (((x) & 0x3) << 1)
#define PLX_LASSR_MLOC_ANY32 PLX_LASSR_MLOC(0)
#define PLX_LASSR_MLOC_LT1MB PLX_LASSR_MLOC(1)
#define PLX_LASSR_MLOC_ANY64 PLX_LASSR_MLOC(2)
> +#define PLX_LASRR_MLOC_MASK GENMASK(2, 1) /* Memory location bits */
I guess the GENMASK() macro is common but it's currently
not used by any of the comedi code.
Using the macro above, the 'mask' would be:
#define PLX_LASSR_MLOC_MASK PLX_LASSR_MLOC(3)
> +#define PLX_LASRR_PREFETCH BIT(3) /* Memory is prefetchable */
> +/* bits that specify range for memory space decode bits */
> +#define PLX_LASRR_MEM_MASK GENMASK(31, 4)
> +/* bits that specify range for i/o space decode bits */
> +#define PLX_LASRR_IO_MASK GENMASK(31, 2)
I suppose the GENMASK() use makes sense for these.
Regards,
Hartley
next prev parent reply other threads:[~2016-05-20 16:37 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-20 13:49 [PATCH 00/20] staging: comedi: re-do drivers/plx9080.h Ian Abbott
2016-05-20 13:49 ` [PATCH 01/20] staging: comedi: plx9080.h: correct LRNG_IO_MASK and LMAP_IO_MASK Ian Abbott
2016-05-20 13:49 ` [PATCH 02/20] staging: comedi: plx9080.h: remove Power-Up Test Suite stuff Ian Abbott
2016-05-20 13:49 ` [PATCH 03/20] staging: comedi: drivers: rename PLX PCI 9080 register offsets Ian Abbott
2016-05-20 16:21 ` Hartley Sweeten
2016-05-20 16:30 ` Ian Abbott
2016-05-20 16:51 ` Hartley Sweeten
2016-05-20 13:49 ` [PATCH 04/20] staging: comedi: drivers: re-do macros for PLX PCI 9080 LASxRR values Ian Abbott
2016-05-20 16:37 ` Hartley Sweeten [this message]
2016-05-20 17:17 ` Ian Abbott
2016-05-20 17:52 ` Hartley Sweeten
2016-05-23 11:21 ` Ian Abbott
2016-05-20 13:49 ` [PATCH 05/20] staging: comedi: drivers: re-do macros for PLX PCI 9080 LASxBA values Ian Abbott
2016-05-20 13:49 ` [PATCH 06/20] staging: comedi: drivers: re-do PLX PCI 9080 MARBR register values Ian Abbott
2016-05-20 13:49 ` [PATCH 07/20] staging: comedi: drivers: re-do PLX PCI 9080 BIGEND " Ian Abbott
2016-05-20 13:49 ` [PATCH 08/20] staging: comedi: drivers: re-do PLX PCI 9080 LBRDx " Ian Abbott
2016-05-20 13:49 ` [PATCH 09/20] staging: comedi: drivers: re-do PLX PCI 9080 DMPBAM " Ian Abbott
2016-05-20 13:49 ` [PATCH 10/20] staging: comedi: drivers: re-do PLX PCI 9080 DMCFGA " Ian Abbott
2016-05-20 13:49 ` [PATCH 11/20] staging: comedi: drivers: re-do PLX PCI 9080 INTCSR " Ian Abbott
2016-05-20 13:49 ` [PATCH 12/20] staging: comedi: drivers: re-do PLX PCI 9080 CNTRL " Ian Abbott
2016-05-20 13:49 ` [PATCH 13/20] staging: comedi: plx9080.h: add hard-coded PCIHIDR register value Ian Abbott
2016-05-20 13:49 ` [PATCH 14/20] staging: comedi: drivers: re-do PLX PCI 9080 DMAMODEx register values Ian Abbott
2016-05-20 13:49 ` [PATCH 15/20] staging: comedi: drivers: re-do PLX PCI 9080 DMADPRx " Ian Abbott
2016-05-20 13:49 ` [PATCH 16/20] staging: comedi: drivers: re-do PLX PCI 9080 DMACSRx " Ian Abbott
2016-05-20 13:49 ` [PATCH 17/20] staging: comedi: drivers: add PLX PCI 9080 DMATHR " Ian Abbott
2016-05-20 13:49 ` [PATCH 18/20] staging: comedi: plx9080.h: tidy up some comments Ian Abbott
2016-05-20 13:49 ` [PATCH 19/20] staging: comedi: plx9080.h: Add kerneldoc comments Ian Abbott
2016-05-20 13:49 ` [PATCH 20/20] staging: comedi: plx9080.h: include headers for declarations Ian Abbott
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