* [PATCH 0/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+
@ 2016-06-02 7:50 Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 1/3] ARM: dts: sun8i-h3: move uart0 pins to sort pinmux list in proper order Chen-Yu Tsai
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Chen-Yu Tsai @ 2016-06-02 7:50 UTC (permalink / raw)
To: Maxime Ripard; +Cc: Chen-Yu Tsai, linux-arm-kernel, linux-kernel, linux-sunxi
Hi everyone,
This series adds support for Sinovoip's BPI-M2+, an Allwinner H3 SoC based
development board. It is a smaller form factor than the original BPI-M2,
which was based on a different SoC.
The patches are pretty self-explaining.
Regards
ChenYu
Chen-Yu Tsai (3):
ARM: dts: sun8i-h3: move uart0 pins to sort pinmux list in proper
order
ARM: dts: sun8i-h3: Add uart1 pinmux setting
ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+
arch/arm/boot/dts/Makefile | 3 +-
.../arm/boot/dts/sun8i-h3-sinovoip-bpi-m2-plus.dts | 196 +++++++++++++++++++++
arch/arm/boot/dts/sun8i-h3.dtsi | 21 ++-
3 files changed, 212 insertions(+), 8 deletions(-)
create mode 100644 arch/arm/boot/dts/sun8i-h3-sinovoip-bpi-m2-plus.dts
--
2.8.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/3] ARM: dts: sun8i-h3: move uart0 pins to sort pinmux list in proper order
2016-06-02 7:50 [PATCH 0/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+ Chen-Yu Tsai
@ 2016-06-02 7:50 ` Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 2/3] ARM: dts: sun8i-h3: Add uart1 pinmux setting Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 3/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+ Chen-Yu Tsai
2 siblings, 0 replies; 5+ messages in thread
From: Chen-Yu Tsai @ 2016-06-02 7:50 UTC (permalink / raw)
To: Maxime Ripard; +Cc: Chen-Yu Tsai, linux-arm-kernel, linux-kernel, linux-sunxi
Move uart0 pins to sort the list of pin settings in alphabetical order.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 4a4926b0b0ed..52558046dbaf 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -501,13 +501,6 @@
interrupt-controller;
#interrupt-cells = <3>;
- uart0_pins_a: uart0@0 {
- allwinner,pins = "PA4", "PA5";
- allwinner,function = "uart0";
- allwinner,drive = <SUN4I_PINCTRL_10_MA>;
- allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
- };
-
mmc0_pins_a: mmc0@0 {
allwinner,pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -540,6 +533,13 @@
allwinner,drive = <SUN4I_PINCTRL_30_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
+
+ uart0_pins_a: uart0@0 {
+ allwinner,pins = "PA4", "PA5";
+ allwinner,function = "uart0";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
};
ahb_rst: reset@01c202c0 {
--
2.8.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/3] ARM: dts: sun8i-h3: Add uart1 pinmux setting
2016-06-02 7:50 [PATCH 0/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+ Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 1/3] ARM: dts: sun8i-h3: move uart0 pins to sort pinmux list in proper order Chen-Yu Tsai
@ 2016-06-02 7:50 ` Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 3/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+ Chen-Yu Tsai
2 siblings, 0 replies; 5+ messages in thread
From: Chen-Yu Tsai @ 2016-06-02 7:50 UTC (permalink / raw)
To: Maxime Ripard; +Cc: Chen-Yu Tsai, linux-arm-kernel, linux-kernel, linux-sunxi
Add uart1 pins for 4 pin (RX/TX/RTS/CTS) mode.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 52558046dbaf..3c37f7e2b079 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -540,6 +540,13 @@
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
+
+ uart1_pins_a: uart1@0 {
+ allwinner,pins = "PG6", "PG7", "PG8", "PG9";
+ allwinner,function = "uart1";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
};
ahb_rst: reset@01c202c0 {
--
2.8.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 3/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+
2016-06-02 7:50 [PATCH 0/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+ Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 1/3] ARM: dts: sun8i-h3: move uart0 pins to sort pinmux list in proper order Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 2/3] ARM: dts: sun8i-h3: Add uart1 pinmux setting Chen-Yu Tsai
@ 2016-06-02 7:50 ` Chen-Yu Tsai
2016-06-07 20:44 ` Maxime Ripard
2 siblings, 1 reply; 5+ messages in thread
From: Chen-Yu Tsai @ 2016-06-02 7:50 UTC (permalink / raw)
To: Maxime Ripard; +Cc: Chen-Yu Tsai, linux-arm-kernel, linux-kernel, linux-sunxi
The BPI-M2+ is an H3 development board. It is a smaller form factor than
the original BPI-M2, with the new H3 SoC.
It has 1GB DRAM, 8GB eMMC, a micro SD card slot, HDMI output, 2 USB
host connector and 1 USB OTG connector, an IR receiver, WiFi+BT based
on Ampak AP6212.
The board also has a 3 pin header for (debug) UART, a 40 pin GPIO header
based on the Raspberry Pi B+, but the peripheral signals are not the
same, and an FPC connector for connecting BPI's camera.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm/boot/dts/Makefile | 3 +-
.../arm/boot/dts/sun8i-h3-sinovoip-bpi-m2-plus.dts | 196 +++++++++++++++++++++
2 files changed, 198 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/sun8i-h3-sinovoip-bpi-m2-plus.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 06b6c2d695bf..970e9064f56d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -765,7 +765,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-orangepi-2.dtb \
sun8i-h3-orangepi-one.dtb \
sun8i-h3-orangepi-pc.dtb \
- sun8i-h3-orangepi-plus.dtb
+ sun8i-h3-orangepi-plus.dtb \
+ sun8i-h3-sinovoip-bpi-m2-plus.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
sun9i-a80-cubieboard4.dtb
diff --git a/arch/arm/boot/dts/sun8i-h3-sinovoip-bpi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-sinovoip-bpi-m2-plus.dts
new file mode 100644
index 000000000000..8a19b4b44f1f
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h3-sinovoip-bpi-m2-plus.dts
@@ -0,0 +1,196 @@
+/*
+ * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Sinovoip BPI-M2+";
+ compatible = "sinovoip,bpi-m2+", "allwinner,sun8i-h3";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_led_bpi_m2p>;
+
+ pwr_led {
+ label = "orangepi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ default-state = "on";
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sw_r_bpi_m2p>;
+
+ sw4 {
+ label = "sw4";
+ linux,code = <BTN_0>;
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_bpi_m2p>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_pins_a>;
+ status = "okay";
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
+ cd-inverted;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ vqmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&r_pio {
+ pwr_led_bpi_m2p: led_pins@0 {
+ allwinner,pins = "PL10";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ sw_r_bpi_m2p: key_pins@0 {
+ allwinner,pins = "PL3";
+ allwinner,function = "gpio_in";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+
+ wifi_en_bpi_m2p: wifi_en_pin {
+ allwinner,pins = "PL7";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ /* USB VBUS is on as long as VCC-IO is on */
+ status = "okay";
+};
+
--
2.8.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 3/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+
2016-06-02 7:50 ` [PATCH 3/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+ Chen-Yu Tsai
@ 2016-06-07 20:44 ` Maxime Ripard
0 siblings, 0 replies; 5+ messages in thread
From: Maxime Ripard @ 2016-06-07 20:44 UTC (permalink / raw)
To: Chen-Yu Tsai; +Cc: linux-arm-kernel, linux-kernel, linux-sunxi
[-- Attachment #1: Type: text/plain, Size: 802 bytes --]
On Thu, Jun 02, 2016 at 03:50:11PM +0800, Chen-Yu Tsai wrote:
> The BPI-M2+ is an H3 development board. It is a smaller form factor than
> the original BPI-M2, with the new H3 SoC.
>
> It has 1GB DRAM, 8GB eMMC, a micro SD card slot, HDMI output, 2 USB
> host connector and 1 USB OTG connector, an IR receiver, WiFi+BT based
> on Ampak AP6212.
>
> The board also has a 3 pin header for (debug) UART, a 40 pin GPIO header
> based on the Raspberry Pi B+, but the peripheral signals are not the
> same, and an FPC connector for connecting BPI's camera.
>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
I fixed the whitespace error, and applied all three.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2016-06-02 7:50 [PATCH 0/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+ Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 1/3] ARM: dts: sun8i-h3: move uart0 pins to sort pinmux list in proper order Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 2/3] ARM: dts: sun8i-h3: Add uart1 pinmux setting Chen-Yu Tsai
2016-06-02 7:50 ` [PATCH 3/3] ARM: dts: sun8i-h3: Add dts file for Sinovoip BPI-M2+ Chen-Yu Tsai
2016-06-07 20:44 ` Maxime Ripard
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