From: Masahiro Yamada <yamada.masahiro@socionext.com>
To: arm@kernel.org
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>,
Will Deacon <will.deacon@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 3/3] arm64: dts: uniphier: add /memreserve/ for spin-table release address
Date: Tue, 14 Jun 2016 12:01:43 +0900 [thread overview]
Message-ID: <1465873303-30754-4-git-send-email-yamada.masahiro@socionext.com> (raw)
In-Reply-To: <1465873303-30754-1-git-send-email-yamada.masahiro@socionext.com>
As Documentation/arm64/booting.txt says, the cpu-release-addr
location should be reserved.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
---
arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
index 644025c..c223915 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi
@@ -42,6 +42,8 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
+/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */
+
/ {
compatible = "socionext,ph1-ld20";
#address-cells = <2>;
--
1.9.1
next prev parent reply other threads:[~2016-06-14 3:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-14 3:01 [PATCH 0/3] arm64: dts: uniphier: UniPhier DTS updates (64bit) for v4.8-rc1 Masahiro Yamada
2016-06-14 3:01 ` [PATCH 1/3] arm64: dts: uniphier: add SoC-Glue node to UniPhier 64bit SoCs Masahiro Yamada
2016-06-14 3:01 ` [PATCH 2/3] arm64: dts: uniphier: change cpu-release-address Masahiro Yamada
2016-06-14 3:01 ` Masahiro Yamada [this message]
2016-06-14 17:41 ` [PATCH 0/3] arm64: dts: uniphier: UniPhier DTS updates (64bit) for v4.8-rc1 Olof Johansson
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