Add mt6755 basic chip support

Add mt6755 basic chip support

[Mars Cheng]

This patch adds basic support for Mediatek's new 8-core chip, mt6755.
It is also named as Helio P10. It is based on 4.7-rc1

Mars Cheng (2):
  Document: DT: Add bindings for mediatek MT6755 SoC Platform
  arm64: dts: mediatek: add mt6755 support

 Documentation/devicetree/bindings/arm/mediatek.txt |    4 +
 .../interrupt-controller/mediatek,sysirq.txt       |    1 +
 .../devicetree/bindings/serial/mtk-uart.txt        |    1 +
 arch/arm64/boot/dts/mediatek/Makefile              |    1 +
 arch/arm64/boot/dts/mediatek/mt6755-phone.dts      |   39 ++++++
 arch/arm64/boot/dts/mediatek/mt6755.dtsi           |  143 ++++++++++++++++++++
 6 files changed, 189 insertions(+)
 create mode 100644 arch/arm64/boot/dts/mediatek/mt6755-phone.dts
 create mode 100644 arch/arm64/boot/dts/mediatek/mt6755.dtsi

[PATCH 1/2] Document: DT: Add bindings for mediatek MT6755 SoC Platform

[Mars Cheng]

This adds DT binding documentation for Mediatek MT6755.

Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
---
 Documentation/devicetree/bindings/arm/mediatek.txt |    4 ++++
 .../interrupt-controller/mediatek,sysirq.txt       |    1 +
 .../devicetree/bindings/serial/mtk-uart.txt        |    1 +
 3 files changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt
index d9c2a37..e2f3b04 100644
--- a/Documentation/devicetree/bindings/arm/mediatek.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek.txt
@@ -10,6 +10,7 @@ compatible: Must contain one of
    "mediatek,mt6580"
    "mediatek,mt6589"
    "mediatek,mt6592"
+   "mediatek,mt6755"
    "mediatek,mt6795"
    "mediatek,mt7623"
    "mediatek,mt8127"
@@ -31,6 +32,9 @@ Supported boards:
 - Evaluation board for MT6592:
     Required root node properties:
       - compatible = "mediatek,mt6592-evb", "mediatek,mt6592";
+- Evaluation phone for MT6755(Helio P10):
+    Required root node properties:
+      - compatible = "mediatek,mt6755-phone", "mediatek,mt6755";
 - Evaluation board for MT6795(Helio X10):
     Required root node properties:
       - compatible = "mediatek,mt6795-evb", "mediatek,mt6795";
diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
index 8cf564d..9d1d72c 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt
@@ -9,6 +9,7 @@ Required properties:
 	"mediatek,mt8135-sysirq"
 	"mediatek,mt8127-sysirq"
 	"mediatek,mt6795-sysirq"
+	"mediatek,mt6755-sysirq"
 	"mediatek,mt6592-sysirq"
 	"mediatek,mt6589-sysirq"
 	"mediatek,mt6582-sysirq"
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt
index e99e10a..0015c72 100644
--- a/Documentation/devicetree/bindings/serial/mtk-uart.txt
+++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt
@@ -6,6 +6,7 @@ Required properties:
   * "mediatek,mt6580-uart" for MT6580 compatible UARTS
   * "mediatek,mt6582-uart" for MT6582 compatible UARTS
   * "mediatek,mt6589-uart" for MT6589 compatible UARTS
+  * "mediatek,mt6755-uart" for MT6755 compatible UARTS
   * "mediatek,mt6795-uart" for MT6795 compatible UARTS
   * "mediatek,mt7623-uart" for MT7623 compatible UARTS
   * "mediatek,mt8127-uart" for MT8127 compatible UARTS
-- 
1.7.9.5

[PATCH 2/2] arm64: dts: mediatek: add mt6755 support

[Mars Cheng]

This adds basic chip support for MT6755 SoC.

Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/Makefile         |    1 +
 arch/arm64/boot/dts/mediatek/mt6755-phone.dts |   39 +++++++
 arch/arm64/boot/dts/mediatek/mt6755.dtsi      |  143 +++++++++++++++++++++++++
 3 files changed, 183 insertions(+)
 create mode 100644 arch/arm64/boot/dts/mediatek/mt6755-phone.dts
 create mode 100644 arch/arm64/boot/dts/mediatek/mt6755.dtsi

diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index e0a4bff..9abdb01 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -1,3 +1,4 @@
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-phone.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
 dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
 
diff --git a/arch/arm64/boot/dts/mediatek/mt6755-phone.dts b/arch/arm64/boot/dts/mediatek/mt6755-phone.dts
new file mode 100644
index 0000000..f551666
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6755-phone.dts
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: Mars.C <mars.cheng@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+#include "mt6755.dtsi"
+
+/ {
+	model = "MediaTek MT6755 phone";
+	compatible = "mediatek,mt6755-phone", "mediatek,mt6755";
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x1e800000>;
+	};
+
+	chosen {
+		stdout-path = "serial0:921600n8";
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt6755.dtsi b/arch/arm64/boot/dts/mediatek/mt6755.dtsi
new file mode 100644
index 0000000..36c3384
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt6755.dtsi
@@ -0,0 +1,143 @@
+/*
+ * Copyright (c) 2016 MediaTek Inc.
+ * Author: Mars.C <mars.cheng@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "mediatek,mt6755";
+	interrupt-parent = <&sysirq>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			enable-method = "psci";
+			reg = <0x000>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			enable-method = "psci";
+			reg = <0x001>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			enable-method = "psci";
+			reg = <0x002>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			enable-method = "psci";
+			reg = <0x003>;
+		};
+
+		cpu4: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			enable-method = "psci";
+			reg = <0x100>;
+		};
+
+		cpu5: cpu@101 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			enable-method = "psci";
+			reg = <0x101>;
+		};
+
+		cpu6: cpu@102 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			enable-method = "psci";
+			reg = <0x102>;
+		};
+
+		cpu7: cpu@103 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			enable-method = "psci";
+			reg = <0x103>;
+		};
+	};
+
+	uart_clk: dummy26m {
+		compatible = "fixed-clock";
+		clock-frequency = <26000000>;
+		#clock-cells = <0>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_PPI 13
+			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14
+			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11
+			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10
+			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	sysirq: intpol-controller@10200620 {
+		compatible = "mediatek,mt6755-sysirq",
+			     "mediatek,mt6577-sysirq";
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		interrupt-parent = <&gic>;
+		reg = <0 0x10200620 0 0x20>;
+	};
+
+	gic: interrupt-controller@10231000 {
+		compatible = "arm,gic-400";
+		#interrupt-cells = <3>;
+		interrupt-parent = <&gic>;
+		interrupt-controller;
+		reg = <0 0x10231000 0 0x1000>,
+		      <0 0x10232000 0 0x2000>,
+		      <0 0x10234000 0 0x2000>,
+		      <0 0x10236000 0 0x2000>;
+	};
+
+	uart0: serial@11002000 {
+		compatible = "mediatek,mt6755-uart",
+			     "mediatek,mt6577-uart";
+		reg = <0 0x11002000 0 0x400>;
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&uart_clk>;
+	};
+
+	uart1: serial@11003000 {
+		compatible = "mediatek,mt6755-uart",
+			     "mediatek,mt6577-uart";
+		reg = <0 0x11003000 0 0x400>;
+		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&uart_clk>;
+	};
+};
-- 
1.7.9.5

Re: [PATCH 1/2] Document: DT: Add bindings for mediatek MT6755 SoC Platform

[Rob Herring]

On Tue, Jun 14, 2016 at 10:20:04AM +0800, Mars Cheng wrote:
> This adds DT binding documentation for Mediatek MT6755.
> 
> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> ---
>  Documentation/devicetree/bindings/arm/mediatek.txt |    4 ++++
>  .../interrupt-controller/mediatek,sysirq.txt       |    1 +
>  .../devicetree/bindings/serial/mtk-uart.txt        |    1 +
>  3 files changed, 6 insertions(+)

Acked-by: Rob Herring <robh@kernel.org>

Re: Add mt6755 basic chip support

[Mars Cheng]

On Tue, 2016-06-14 at 10:20 +0800, Mars Cheng wrote:
> This patch adds basic support for Mediatek's new 8-core chip, mt6755.
> It is also named as Helio P10. It is based on 4.7-rc1
> 
> Mars Cheng (2):
>   Document: DT: Add bindings for mediatek MT6755 SoC Platform
>   arm64: dts: mediatek: add mt6755 support
> 
>  Documentation/devicetree/bindings/arm/mediatek.txt |    4 +
>  .../interrupt-controller/mediatek,sysirq.txt       |    1 +
>  .../devicetree/bindings/serial/mtk-uart.txt        |    1 +
>  arch/arm64/boot/dts/mediatek/Makefile              |    1 +
>  arch/arm64/boot/dts/mediatek/mt6755-phone.dts      |   39 ++++++
>  arch/arm64/boot/dts/mediatek/mt6755.dtsi           |  143 ++++++++++++++++++++
>  6 files changed, 189 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/mediatek/mt6755-phone.dts
>  create mode 100644 arch/arm64/boot/dts/mediatek/mt6755.dtsi
> 
Hi Matthias

Would you like to merge this patch? If there is any suggestions or
issues, I will fix them ASAP.

Thanks a lot.
> 
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

Re: [PATCH 2/2] arm64: dts: mediatek: add mt6755 support

[Matthias Brugger]

On 14/06/16 04:20, Mars Cheng wrote:
> This adds basic chip support for MT6755 SoC.
>
> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> ---
>   arch/arm64/boot/dts/mediatek/Makefile         |    1 +
>   arch/arm64/boot/dts/mediatek/mt6755-phone.dts |   39 +++++++
>   arch/arm64/boot/dts/mediatek/mt6755.dtsi      |  143 +++++++++++++++++++++++++
>   3 files changed, 183 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/mediatek/mt6755-phone.dts
>   create mode 100644 arch/arm64/boot/dts/mediatek/mt6755.dtsi
>
> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> index e0a4bff..9abdb01 100644
> --- a/arch/arm64/boot/dts/mediatek/Makefile
> +++ b/arch/arm64/boot/dts/mediatek/Makefile
> @@ -1,3 +1,4 @@
> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-phone.dtb

I suppose this is a evaluation platform? Is this different to the EVB 
for this SoC? Or will the only phone build with this SoC be this one?

Thanks,
Matthias

>   dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
>   dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt6755-phone.dts b/arch/arm64/boot/dts/mediatek/mt6755-phone.dts
> new file mode 100644
> index 0000000..f551666
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6755-phone.dts
> @@ -0,0 +1,39 @@
> +/*
> + * Copyright (c) 2016 MediaTek Inc.
> + * Author: Mars.C <mars.cheng@mediatek.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +/dts-v1/;
> +#include "mt6755.dtsi"
> +
> +/ {
> +	model = "MediaTek MT6755 phone";
> +	compatible = "mediatek,mt6755-phone", "mediatek,mt6755";
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;

we don't enable uart1, so we don't need the alias.

> +	};
> +
> +	memory@40000000 {
> +		device_type = "memory";
> +		reg = <0 0x40000000 0 0x1e800000>;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:921600n8";
> +	};
> +};
> +
> +&uart0 {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/mediatek/mt6755.dtsi b/arch/arm64/boot/dts/mediatek/mt6755.dtsi
> new file mode 100644
> index 0000000..36c3384
> --- /dev/null
> +++ b/arch/arm64/boot/dts/mediatek/mt6755.dtsi
> @@ -0,0 +1,143 @@
> +/*
> + * Copyright (c) 2016 MediaTek Inc.
> + * Author: Mars.C <mars.cheng@mediatek.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +	compatible = "mediatek,mt6755";
> +	interrupt-parent = <&sysirq>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	psci {
> +		compatible = "arm,psci-0.2";
> +		method = "smc";
> +	};
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu0: cpu@0 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			enable-method = "psci";
> +			reg = <0x000>;
> +		};
> +
> +		cpu1: cpu@1 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			enable-method = "psci";
> +			reg = <0x001>;
> +		};
> +
> +		cpu2: cpu@2 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			enable-method = "psci";
> +			reg = <0x002>;
> +		};
> +
> +		cpu3: cpu@3 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			enable-method = "psci";
> +			reg = <0x003>;
> +		};
> +
> +		cpu4: cpu@100 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			enable-method = "psci";
> +			reg = <0x100>;
> +		};
> +
> +		cpu5: cpu@101 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			enable-method = "psci";
> +			reg = <0x101>;
> +		};
> +
> +		cpu6: cpu@102 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			enable-method = "psci";
> +			reg = <0x102>;
> +		};
> +
> +		cpu7: cpu@103 {
> +			device_type = "cpu";
> +			compatible = "arm,cortex-a53";
> +			enable-method = "psci";
> +			reg = <0x103>;
> +		};
> +	};
> +
> +	uart_clk: dummy26m {
> +		compatible = "fixed-clock";
> +		clock-frequency = <26000000>;
> +		#clock-cells = <0>;
> +	};
> +

We can do that, but I would prefer to see the clock driver early. So 
that the DTS we carry around as complete as possible.

> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupt-parent = <&gic>;
> +		interrupts = <GIC_PPI 13
> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 14
> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 11
> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> +			     <GIC_PPI 10
> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> +	};
> +
> +	sysirq: intpol-controller@10200620 {
> +		compatible = "mediatek,mt6755-sysirq",
> +			     "mediatek,mt6577-sysirq";
> +		interrupt-controller;
> +		#interrupt-cells = <3>;
> +		interrupt-parent = <&gic>;
> +		reg = <0 0x10200620 0 0x20>;
> +	};
> +
> +	gic: interrupt-controller@10231000 {
> +		compatible = "arm,gic-400";
> +		#interrupt-cells = <3>;
> +		interrupt-parent = <&gic>;
> +		interrupt-controller;
> +		reg = <0 0x10231000 0 0x1000>,
> +		      <0 0x10232000 0 0x2000>,
> +		      <0 0x10234000 0 0x2000>,
> +		      <0 0x10236000 0 0x2000>;
> +	};
> +
> +	uart0: serial@11002000 {
> +		compatible = "mediatek,mt6755-uart",
> +			     "mediatek,mt6577-uart";
> +		reg = <0 0x11002000 0 0x400>;
> +		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> +		clocks = <&uart_clk>;

status = "disabled";

> +	};
> +
> +	uart1: serial@11003000 {
> +		compatible = "mediatek,mt6755-uart",
> +			     "mediatek,mt6577-uart";
> +		reg = <0 0x11003000 0 0x400>;
> +		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> +		clocks = <&uart_clk>;

same here.

Regards,
Matthias

Re: [PATCH 2/2] arm64: dts: mediatek: add mt6755 support

[Mars Cheng]

On Mon, 2016-06-20 at 10:31 +0200, Matthias Brugger wrote:
> 
> On 14/06/16 04:20, Mars Cheng wrote:
> > This adds basic chip support for MT6755 SoC.
> >
> > Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
> > ---
> >   arch/arm64/boot/dts/mediatek/Makefile         |    1 +
> >   arch/arm64/boot/dts/mediatek/mt6755-phone.dts |   39 +++++++
> >   arch/arm64/boot/dts/mediatek/mt6755.dtsi      |  143 +++++++++++++++++++++++++
> >   3 files changed, 183 insertions(+)
> >   create mode 100644 arch/arm64/boot/dts/mediatek/mt6755-phone.dts
> >   create mode 100644 arch/arm64/boot/dts/mediatek/mt6755.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
> > index e0a4bff..9abdb01 100644
> > --- a/arch/arm64/boot/dts/mediatek/Makefile
> > +++ b/arch/arm64/boot/dts/mediatek/Makefile
> > @@ -1,3 +1,4 @@
> > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-phone.dtb
> 
> I suppose this is a evaluation platform? Is this different to the EVB 
> for this SoC? Or will the only phone build with this SoC be this one?
> 

Yes, this is an evaluation platform which is an internal demo phone.
No difference to EVB. Would you suggest I change the name? If so, I will
change it to mt6755-evb.dtb. So will the compatible string in it.
 
> Thanks,
> Matthias
> 
> >   dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
> >   dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
> >
> > diff --git a/arch/arm64/boot/dts/mediatek/mt6755-phone.dts b/arch/arm64/boot/dts/mediatek/mt6755-phone.dts
> > new file mode 100644
> > index 0000000..f551666
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt6755-phone.dts
> > @@ -0,0 +1,39 @@
> > +/*
> > + * Copyright (c) 2016 MediaTek Inc.
> > + * Author: Mars.C <mars.cheng@mediatek.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +/dts-v1/;
> > +#include "mt6755.dtsi"
> > +
> > +/ {
> > +	model = "MediaTek MT6755 phone";
> > +	compatible = "mediatek,mt6755-phone", "mediatek,mt6755";
> > +
> > +	aliases {
> > +		serial0 = &uart0;
> > +		serial1 = &uart1;
> 
> we don't enable uart1, so we don't need the alias.

OK, will fix this.

> 
> > +	};
> > +
> > +	memory@40000000 {
> > +		device_type = "memory";
> > +		reg = <0 0x40000000 0 0x1e800000>;
> > +	};
> > +
> > +	chosen {
> > +		stdout-path = "serial0:921600n8";
> > +	};
> > +};
> > +
> > +&uart0 {
> > +	status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/mediatek/mt6755.dtsi b/arch/arm64/boot/dts/mediatek/mt6755.dtsi
> > new file mode 100644
> > index 0000000..36c3384
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/mediatek/mt6755.dtsi
> > @@ -0,0 +1,143 @@
> > +/*
> > + * Copyright (c) 2016 MediaTek Inc.
> > + * Author: Mars.C <mars.cheng@mediatek.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License version 2 as
> > + * published by the Free Software Foundation.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + */
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > +	compatible = "mediatek,mt6755";
> > +	interrupt-parent = <&sysirq>;
> > +	#address-cells = <2>;
> > +	#size-cells = <2>;
> > +
> > +	psci {
> > +		compatible = "arm,psci-0.2";
> > +		method = "smc";
> > +	};
> > +
> > +	cpus {
> > +		#address-cells = <1>;
> > +		#size-cells = <0>;
> > +
> > +		cpu0: cpu@0 {
> > +			device_type = "cpu";
> > +			compatible = "arm,cortex-a53";
> > +			enable-method = "psci";
> > +			reg = <0x000>;
> > +		};
> > +
> > +		cpu1: cpu@1 {
> > +			device_type = "cpu";
> > +			compatible = "arm,cortex-a53";
> > +			enable-method = "psci";
> > +			reg = <0x001>;
> > +		};
> > +
> > +		cpu2: cpu@2 {
> > +			device_type = "cpu";
> > +			compatible = "arm,cortex-a53";
> > +			enable-method = "psci";
> > +			reg = <0x002>;
> > +		};
> > +
> > +		cpu3: cpu@3 {
> > +			device_type = "cpu";
> > +			compatible = "arm,cortex-a53";
> > +			enable-method = "psci";
> > +			reg = <0x003>;
> > +		};
> > +
> > +		cpu4: cpu@100 {
> > +			device_type = "cpu";
> > +			compatible = "arm,cortex-a53";
> > +			enable-method = "psci";
> > +			reg = <0x100>;
> > +		};
> > +
> > +		cpu5: cpu@101 {
> > +			device_type = "cpu";
> > +			compatible = "arm,cortex-a53";
> > +			enable-method = "psci";
> > +			reg = <0x101>;
> > +		};
> > +
> > +		cpu6: cpu@102 {
> > +			device_type = "cpu";
> > +			compatible = "arm,cortex-a53";
> > +			enable-method = "psci";
> > +			reg = <0x102>;
> > +		};
> > +
> > +		cpu7: cpu@103 {
> > +			device_type = "cpu";
> > +			compatible = "arm,cortex-a53";
> > +			enable-method = "psci";
> > +			reg = <0x103>;
> > +		};
> > +	};
> > +
> > +	uart_clk: dummy26m {
> > +		compatible = "fixed-clock";
> > +		clock-frequency = <26000000>;
> > +		#clock-cells = <0>;
> > +	};
> > +
> 
> We can do that, but I would prefer to see the clock driver early. So 
> that the DTS we carry around as complete as possible.
> 

OK, I will merge the clk later. However, the clk driver would be
submmited later, is that OK? Or would you prefer sunmmit clk driver
together?

> > +	timer {
> > +		compatible = "arm,armv8-timer";
> > +		interrupt-parent = <&gic>;
> > +		interrupts = <GIC_PPI 13
> > +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 14
> > +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 11
> > +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> > +			     <GIC_PPI 10
> > +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> > +	};
> > +
> > +	sysirq: intpol-controller@10200620 {
> > +		compatible = "mediatek,mt6755-sysirq",
> > +			     "mediatek,mt6577-sysirq";
> > +		interrupt-controller;
> > +		#interrupt-cells = <3>;
> > +		interrupt-parent = <&gic>;
> > +		reg = <0 0x10200620 0 0x20>;
> > +	};
> > +
> > +	gic: interrupt-controller@10231000 {
> > +		compatible = "arm,gic-400";
> > +		#interrupt-cells = <3>;
> > +		interrupt-parent = <&gic>;
> > +		interrupt-controller;
> > +		reg = <0 0x10231000 0 0x1000>,
> > +		      <0 0x10232000 0 0x2000>,
> > +		      <0 0x10234000 0 0x2000>,
> > +		      <0 0x10236000 0 0x2000>;
> > +	};
> > +
> > +	uart0: serial@11002000 {
> > +		compatible = "mediatek,mt6755-uart",
> > +			     "mediatek,mt6577-uart";
> > +		reg = <0 0x11002000 0 0x400>;
> > +		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> > +		clocks = <&uart_clk>;
> 
> status = "disabled";

OK, will fix this.
> 
> > +	};
> > +
> > +	uart1: serial@11003000 {
> > +		compatible = "mediatek,mt6755-uart",
> > +			     "mediatek,mt6577-uart";
> > +		reg = <0 0x11003000 0 0x400>;
> > +		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> > +		clocks = <&uart_clk>;
> 
> same here.

OK, will fix this.

Thanks.
> 
> Regards,
> Matthias

Re: [PATCH 2/2] arm64: dts: mediatek: add mt6755 support

[Matthias Brugger]

On 20/06/16 11:19, Mars Cheng wrote:
> On Mon, 2016-06-20 at 10:31 +0200, Matthias Brugger wrote:
>>
>> On 14/06/16 04:20, Mars Cheng wrote:
>>> This adds basic chip support for MT6755 SoC.
>>>
>>> Signed-off-by: Mars Cheng <mars.cheng@mediatek.com>
>>> ---
>>>    arch/arm64/boot/dts/mediatek/Makefile         |    1 +
>>>    arch/arm64/boot/dts/mediatek/mt6755-phone.dts |   39 +++++++
>>>    arch/arm64/boot/dts/mediatek/mt6755.dtsi      |  143 +++++++++++++++++++++++++
>>>    3 files changed, 183 insertions(+)
>>>    create mode 100644 arch/arm64/boot/dts/mediatek/mt6755-phone.dts
>>>    create mode 100644 arch/arm64/boot/dts/mediatek/mt6755.dtsi
>>>
>>> diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
>>> index e0a4bff..9abdb01 100644
>>> --- a/arch/arm64/boot/dts/mediatek/Makefile
>>> +++ b/arch/arm64/boot/dts/mediatek/Makefile
>>> @@ -1,3 +1,4 @@
>>> +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6755-phone.dtb
>>
>> I suppose this is a evaluation platform? Is this different to the EVB
>> for this SoC? Or will the only phone build with this SoC be this one?
>>
>
> Yes, this is an evaluation platform which is an internal demo phone.
> No difference to EVB. Would you suggest I change the name? If so, I will
> change it to mt6755-evb.dtb. So will the compatible string in it.
>

Sounds good.

>> Thanks,
>> Matthias
>>
>>>    dtb-$(CONFIG_ARCH_MEDIATEK) += mt6795-evb.dtb
>>>    dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb
>>>
>>> diff --git a/arch/arm64/boot/dts/mediatek/mt6755-phone.dts b/arch/arm64/boot/dts/mediatek/mt6755-phone.dts
>>> new file mode 100644
>>> index 0000000..f551666
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/mediatek/mt6755-phone.dts
>>> @@ -0,0 +1,39 @@
>>> +/*
>>> + * Copyright (c) 2016 MediaTek Inc.
>>> + * Author: Mars.C <mars.cheng@mediatek.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>> + * GNU General Public License for more details.
>>> + */
>>> +
>>> +/dts-v1/;
>>> +#include "mt6755.dtsi"
>>> +
>>> +/ {
>>> +	model = "MediaTek MT6755 phone";
>>> +	compatible = "mediatek,mt6755-phone", "mediatek,mt6755";
>>> +
>>> +	aliases {
>>> +		serial0 = &uart0;
>>> +		serial1 = &uart1;
>>
>> we don't enable uart1, so we don't need the alias.
>
> OK, will fix this.
>
>>
>>> +	};
>>> +
>>> +	memory@40000000 {
>>> +		device_type = "memory";
>>> +		reg = <0 0x40000000 0 0x1e800000>;
>>> +	};
>>> +
>>> +	chosen {
>>> +		stdout-path = "serial0:921600n8";
>>> +	};
>>> +};
>>> +
>>> +&uart0 {
>>> +	status = "okay";
>>> +};
>>> diff --git a/arch/arm64/boot/dts/mediatek/mt6755.dtsi b/arch/arm64/boot/dts/mediatek/mt6755.dtsi
>>> new file mode 100644
>>> index 0000000..36c3384
>>> --- /dev/null
>>> +++ b/arch/arm64/boot/dts/mediatek/mt6755.dtsi
>>> @@ -0,0 +1,143 @@
>>> +/*
>>> + * Copyright (c) 2016 MediaTek Inc.
>>> + * Author: Mars.C <mars.cheng@mediatek.com>
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>> + * GNU General Public License for more details.
>>> + */
>>> +
>>> +#include <dt-bindings/interrupt-controller/irq.h>
>>> +#include <dt-bindings/interrupt-controller/arm-gic.h>
>>> +
>>> +/ {
>>> +	compatible = "mediatek,mt6755";
>>> +	interrupt-parent = <&sysirq>;
>>> +	#address-cells = <2>;
>>> +	#size-cells = <2>;
>>> +
>>> +	psci {
>>> +		compatible = "arm,psci-0.2";
>>> +		method = "smc";
>>> +	};
>>> +
>>> +	cpus {
>>> +		#address-cells = <1>;
>>> +		#size-cells = <0>;
>>> +
>>> +		cpu0: cpu@0 {
>>> +			device_type = "cpu";
>>> +			compatible = "arm,cortex-a53";
>>> +			enable-method = "psci";
>>> +			reg = <0x000>;
>>> +		};
>>> +
>>> +		cpu1: cpu@1 {
>>> +			device_type = "cpu";
>>> +			compatible = "arm,cortex-a53";
>>> +			enable-method = "psci";
>>> +			reg = <0x001>;
>>> +		};
>>> +
>>> +		cpu2: cpu@2 {
>>> +			device_type = "cpu";
>>> +			compatible = "arm,cortex-a53";
>>> +			enable-method = "psci";
>>> +			reg = <0x002>;
>>> +		};
>>> +
>>> +		cpu3: cpu@3 {
>>> +			device_type = "cpu";
>>> +			compatible = "arm,cortex-a53";
>>> +			enable-method = "psci";
>>> +			reg = <0x003>;
>>> +		};
>>> +
>>> +		cpu4: cpu@100 {
>>> +			device_type = "cpu";
>>> +			compatible = "arm,cortex-a53";
>>> +			enable-method = "psci";
>>> +			reg = <0x100>;
>>> +		};
>>> +
>>> +		cpu5: cpu@101 {
>>> +			device_type = "cpu";
>>> +			compatible = "arm,cortex-a53";
>>> +			enable-method = "psci";
>>> +			reg = <0x101>;
>>> +		};
>>> +
>>> +		cpu6: cpu@102 {
>>> +			device_type = "cpu";
>>> +			compatible = "arm,cortex-a53";
>>> +			enable-method = "psci";
>>> +			reg = <0x102>;
>>> +		};
>>> +
>>> +		cpu7: cpu@103 {
>>> +			device_type = "cpu";
>>> +			compatible = "arm,cortex-a53";
>>> +			enable-method = "psci";
>>> +			reg = <0x103>;
>>> +		};
>>> +	};
>>> +
>>> +	uart_clk: dummy26m {
>>> +		compatible = "fixed-clock";
>>> +		clock-frequency = <26000000>;
>>> +		#clock-cells = <0>;
>>> +	};
>>> +
>>
>> We can do that, but I would prefer to see the clock driver early. So
>> that the DTS we carry around as complete as possible.
>>
>
> OK, I will merge the clk later. However, the clk driver would be
> submmited later, is that OK? Or would you prefer sunmmit clk driver
> together?
>

The uart won't work without any clock node. It is OK like this. I just 
wanted to emphasis that we should try to get the clock driver accpeted 
early in the effort.

Thanks,
Matthias

>>> +	timer {
>>> +		compatible = "arm,armv8-timer";
>>> +		interrupt-parent = <&gic>;
>>> +		interrupts = <GIC_PPI 13
>>> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>>> +			     <GIC_PPI 14
>>> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>>> +			     <GIC_PPI 11
>>> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
>>> +			     <GIC_PPI 10
>>> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
>>> +	};
>>> +
>>> +	sysirq: intpol-controller@10200620 {
>>> +		compatible = "mediatek,mt6755-sysirq",
>>> +			     "mediatek,mt6577-sysirq";
>>> +		interrupt-controller;
>>> +		#interrupt-cells = <3>;
>>> +		interrupt-parent = <&gic>;
>>> +		reg = <0 0x10200620 0 0x20>;
>>> +	};
>>> +
>>> +	gic: interrupt-controller@10231000 {
>>> +		compatible = "arm,gic-400";
>>> +		#interrupt-cells = <3>;
>>> +		interrupt-parent = <&gic>;
>>> +		interrupt-controller;
>>> +		reg = <0 0x10231000 0 0x1000>,
>>> +		      <0 0x10232000 0 0x2000>,
>>> +		      <0 0x10234000 0 0x2000>,
>>> +		      <0 0x10236000 0 0x2000>;
>>> +	};
>>> +
>>> +	uart0: serial@11002000 {
>>> +		compatible = "mediatek,mt6755-uart",
>>> +			     "mediatek,mt6577-uart";
>>> +		reg = <0 0x11002000 0 0x400>;
>>> +		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
>>> +		clocks = <&uart_clk>;
>>
>> status = "disabled";
>
> OK, will fix this.
>>
>>> +	};
>>> +
>>> +	uart1: serial@11003000 {
>>> +		compatible = "mediatek,mt6755-uart",
>>> +			     "mediatek,mt6577-uart";
>>> +		reg = <0 0x11003000 0 0x400>;
>>> +		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
>>> +		clocks = <&uart_clk>;
>>
>> same here.
>
> OK, will fix this.
>
> Thanks.
>>
>> Regards,
>> Matthias
>
>

Re: [PATCH 2/2] arm64: dts: mediatek: add mt6755 support

[Mars Cheng]

On Mon, 2016-06-20 at 19:09 +0200, Matthias Brugger wrote:

> >>> +	uart_clk: dummy26m {
> >>> +		compatible = "fixed-clock";
> >>> +		clock-frequency = <26000000>;
> >>> +		#clock-cells = <0>;
> >>> +	};
> >>> +
> >>
> >> We can do that, but I would prefer to see the clock driver early. So
> >> that the DTS we carry around as complete as possible.
> >>
> >
> > OK, I will merge the clk later. However, the clk driver would be
> > submmited later, is that OK? Or would you prefer sunmmit clk driver
> > together?
> >
> 
> The uart won't work without any clock node. It is OK like this. I just 
> wanted to emphasis that we should try to get the clock driver accpeted 
> early in the effort.
> 
> Thanks,
> Matthias

Got it. I will not include the clk dts & driver in basic chip patch
v2.We will submmit clk driver soon after this basic chip support patch.

Thanks.

> 
> >>> +	timer {
> >>> +		compatible = "arm,armv8-timer";
> >>> +		interrupt-parent = <&gic>;
> >>> +		interrupts = <GIC_PPI 13
> >>> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> >>> +			     <GIC_PPI 14
> >>> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> >>> +			     <GIC_PPI 11
> >>> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> >>> +			     <GIC_PPI 10
> >>> +			     (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> >>> +	};
> >>> +
> >>> +	sysirq: intpol-controller@10200620 {
> >>> +		compatible = "mediatek,mt6755-sysirq",
> >>> +			     "mediatek,mt6577-sysirq";
> >>> +		interrupt-controller;
> >>> +		#interrupt-cells = <3>;
> >>> +		interrupt-parent = <&gic>;
> >>> +		reg = <0 0x10200620 0 0x20>;
> >>> +	};
> >>> +
> >>> +	gic: interrupt-controller@10231000 {
> >>> +		compatible = "arm,gic-400";
> >>> +		#interrupt-cells = <3>;
> >>> +		interrupt-parent = <&gic>;
> >>> +		interrupt-controller;
> >>> +		reg = <0 0x10231000 0 0x1000>,
> >>> +		      <0 0x10232000 0 0x2000>,
> >>> +		      <0 0x10234000 0 0x2000>,
> >>> +		      <0 0x10236000 0 0x2000>;
> >>> +	};
> >>> +
> >>> +	uart0: serial@11002000 {
> >>> +		compatible = "mediatek,mt6755-uart",
> >>> +			     "mediatek,mt6577-uart";
> >>> +		reg = <0 0x11002000 0 0x400>;
> >>> +		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
> >>> +		clocks = <&uart_clk>;
> >>
> >> status = "disabled";
> >
> > OK, will fix this.
> >>
> >>> +	};
> >>> +
> >>> +	uart1: serial@11003000 {
> >>> +		compatible = "mediatek,mt6755-uart",
> >>> +			     "mediatek,mt6577-uart";
> >>> +		reg = <0 0x11003000 0 0x400>;
> >>> +		interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
> >>> +		clocks = <&uart_clk>;
> >>
> >> same here.
> >
> > OK, will fix this.
> >
> > Thanks.
> >>
> >> Regards,
> >> Matthias
> >
> >