From: Yongji Xie <xyjxie@linux.vnet.ibm.com>
To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-doc@vger.kernel.org
Cc: bhelgaas@google.com, alex.williamson@redhat.com, aik@ozlabs.ru,
benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au,
corbet@lwn.net, warrier@linux.vnet.ibm.com,
zhong@linux.vnet.ibm.com, nikunj@linux.vnet.ibm.com,
gwshan@linux.vnet.ibm.com
Subject: [PATCH v3 5/7] PCI: Do not use IORESOURCE_STARTALIGN to identify bridge resources
Date: Thu, 30 Jun 2016 18:53:11 +0800 [thread overview]
Message-ID: <1467283993-3185-6-git-send-email-xyjxie@linux.vnet.ibm.com> (raw)
In-Reply-To: <1467283993-3185-1-git-send-email-xyjxie@linux.vnet.ibm.com>
Now we use the IORESOURCE_STARTALIGN to identify bridge resources
in __assign_resources_sorted(). That's quite fragile. We may also
set flag IORESOURCE_STARTALIGN for SR-IOV resources in some cases,
for example, using the option "noresize" of parameter
"pci=resource_alignment".
In this patch, we try to use a more robust way to identify
bridge resources.
Signed-off-by: Yongji Xie <xyjxie@linux.vnet.ibm.com>
---
drivers/pci/setup-bus.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 55641a3..216ddbc 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -390,6 +390,7 @@ static void __assign_resources_sorted(struct list_head *head,
struct pci_dev_resource *dev_res, *tmp_res, *dev_res2;
unsigned long fail_type;
resource_size_t add_align, align;
+ int index;
/* Check if optional add_size is there */
if (!realloc_head || list_empty(realloc_head))
@@ -410,11 +411,13 @@ static void __assign_resources_sorted(struct list_head *head,
/*
* There are two kinds of additional resources in the list:
- * 1. bridge resource -- IORESOURCE_STARTALIGN
- * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN
+ * 1. bridge resource
+ * 2. SR-IOV resource
* Here just fix the additional alignment for bridge
*/
- if (!(dev_res->res->flags & IORESOURCE_STARTALIGN))
+ index = dev_res->res - dev_res->dev->resource;
+ if (index < PCI_BRIDGE_RESOURCES ||
+ index > PCI_BRIDGE_RESOURCE_END)
continue;
add_align = get_res_add_align(realloc_head, dev_res->res);
--
1.7.9.5
next prev parent reply other threads:[~2016-06-30 10:55 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-30 10:53 [PATCH v3 0/7] PCI: Add support for enforcing all MMIO BARs not to share PAGE_SIZE Yongji Xie
2016-06-30 10:53 ` [PATCH v3 1/7] PCI: Ignore enforced alignment when kernel uses existing firmware setup Yongji Xie
2016-07-01 0:28 ` Gavin Shan
2016-07-01 4:49 ` Yongji Xie
2016-06-30 10:53 ` [PATCH v3 2/7] PCI: Ignore enforced alignment to VF BARs Yongji Xie
2016-07-01 0:39 ` Gavin Shan
2016-07-01 5:27 ` Yongji Xie
2016-07-01 6:05 ` Gavin Shan
2016-07-01 6:40 ` Yongji Xie
2016-07-02 0:31 ` Gavin Shan
2016-06-30 10:53 ` [PATCH v3 3/7] PCI: Do not disable memory decoding in pci_reassigndev_resource_alignment() Yongji Xie
2016-07-01 0:50 ` Gavin Shan
2016-07-01 6:35 ` Yongji Xie
2016-06-30 10:53 ` [PATCH v3 4/7] PCI: Add a new option for resource_alignment to reassign alignment Yongji Xie
2016-07-01 2:25 ` Gavin Shan
2016-07-01 6:53 ` Yongji Xie
2016-06-30 10:53 ` Yongji Xie [this message]
2016-07-01 2:34 ` [PATCH v3 5/7] PCI: Do not use IORESOURCE_STARTALIGN to identify bridge resources Gavin Shan
2016-07-01 7:04 ` Yongji Xie
2016-07-02 0:37 ` Gavin Shan
2016-06-30 10:53 ` [PATCH v3 6/7] PCI: Add support for enforcing all MMIO BARs to be page aligned Yongji Xie
2016-06-30 10:53 ` [PATCH v3 7/7] PCI: Add a macro to set default alignment for all PCI devices Yongji Xie
2016-07-12 5:09 ` [PATCH v3 0/7] PCI: Add support for enforcing all MMIO BARs not to share PAGE_SIZE Yongji Xie
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