* [PATCH] bcma: define ChipCommon B MII registers
@ 2016-07-08 9:28 Rafał Miłecki
2016-07-08 15:14 ` [PATCH V2] " Rafał Miłecki
0 siblings, 1 reply; 3+ messages in thread
From: Rafał Miłecki @ 2016-07-08 9:28 UTC (permalink / raw)
To: Kalle Valo
Cc: Rafał Miłecki,
open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA),
open list
We don't have access to datasheets to document all the bits but we can
name these registers at least.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
drivers/bcma/driver_chipcommon_b.c | 10 ++++++----
include/linux/bcma/bcma_driver_chipcommon.h | 3 +++
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/bcma/driver_chipcommon_b.c b/drivers/bcma/driver_chipcommon_b.c
index c20b5f4..52c3d36 100644
--- a/drivers/bcma/driver_chipcommon_b.c
+++ b/drivers/bcma/driver_chipcommon_b.c
@@ -33,11 +33,13 @@ static bool bcma_wait_reg(struct bcma_bus *bus, void __iomem *addr, u32 mask,
void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value)
{
struct bcma_bus *bus = ccb->core->bus;
+ void __iomem *mii = ccb->mii;
- writel(offset, ccb->mii + 0x00);
- bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100);
- writel(value, ccb->mii + 0x04);
- bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100);
+ writel(offset, mii + BCMA_CCB_MII_MNG_CTL);
+ bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
+ writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA);
+ bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CMD_DATA, 0x0100, 0x0000,
+ 100);
}
EXPORT_SYMBOL_GPL(bcma_chipco_b_mii_write);
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index a5ac2ca..b20e3d5 100644
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -504,6 +504,9 @@
#define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000
#define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_SHIFT 20
+#define BCMA_CCB_MII_MNG_CTL 0x0000
+#define BCMA_CCB_MII_MNG_CMD_DATA 0x0004
+
/* BCM4331 ChipControl numbers. */
#define BCMA_CHIPCTL_4331_BT_COEXIST BIT(0) /* 0 disable */
#define BCMA_CHIPCTL_4331_SECI BIT(1) /* 0 SECI is disabled (JATG functional) */
--
1.8.4.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH V2] bcma: define ChipCommon B MII registers
2016-07-08 9:28 [PATCH] bcma: define ChipCommon B MII registers Rafał Miłecki
@ 2016-07-08 15:14 ` Rafał Miłecki
2016-07-19 18:13 ` [V2] " Kalle Valo
0 siblings, 1 reply; 3+ messages in thread
From: Rafał Miłecki @ 2016-07-08 15:14 UTC (permalink / raw)
To: Kalle Valo
Cc: Rafał Miłecki,
open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA),
open list
We don't have access to datasheets to document all the bits but we can
name these registers at least.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
---
V2: Fix mistake in V1 that used BCMA_CCB_MII_MNG_CMD_DATA instead of
BCMA_CCB_MII_MNG_CTL in the second bcma_wait_reg call.
---
drivers/bcma/driver_chipcommon_b.c | 9 +++++----
include/linux/bcma/bcma_driver_chipcommon.h | 3 +++
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/bcma/driver_chipcommon_b.c b/drivers/bcma/driver_chipcommon_b.c
index c20b5f4..57f10b5 100644
--- a/drivers/bcma/driver_chipcommon_b.c
+++ b/drivers/bcma/driver_chipcommon_b.c
@@ -33,11 +33,12 @@ static bool bcma_wait_reg(struct bcma_bus *bus, void __iomem *addr, u32 mask,
void bcma_chipco_b_mii_write(struct bcma_drv_cc_b *ccb, u32 offset, u32 value)
{
struct bcma_bus *bus = ccb->core->bus;
+ void __iomem *mii = ccb->mii;
- writel(offset, ccb->mii + 0x00);
- bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100);
- writel(value, ccb->mii + 0x04);
- bcma_wait_reg(bus, ccb->mii + 0x00, 0x0100, 0x0000, 100);
+ writel(offset, mii + BCMA_CCB_MII_MNG_CTL);
+ bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
+ writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA);
+ bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100);
}
EXPORT_SYMBOL_GPL(bcma_chipco_b_mii_write);
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index a5ac2ca..b20e3d5 100644
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -504,6 +504,9 @@
#define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000
#define BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_SHIFT 20
+#define BCMA_CCB_MII_MNG_CTL 0x0000
+#define BCMA_CCB_MII_MNG_CMD_DATA 0x0004
+
/* BCM4331 ChipControl numbers. */
#define BCMA_CHIPCTL_4331_BT_COEXIST BIT(0) /* 0 disable */
#define BCMA_CHIPCTL_4331_SECI BIT(1) /* 0 SECI is disabled (JATG functional) */
--
1.8.4.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [V2] bcma: define ChipCommon B MII registers
2016-07-08 15:14 ` [PATCH V2] " Rafał Miłecki
@ 2016-07-19 18:13 ` Kalle Valo
0 siblings, 0 replies; 3+ messages in thread
From: Kalle Valo @ 2016-07-19 18:13 UTC (permalink / raw)
To: Rafał Miłecki
Cc: Rafał Miłecki,
open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA),
open list
Rafał Miłecki wrote:
> We don't have access to datasheets to document all the bits but we can
> name these registers at least.
>
> Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Thanks, 1 patch applied to wireless-drivers-next.git:
cc2d1de06f05 bcma: define ChipCommon B MII registers
--
Sent by pwcli
https://patchwork.kernel.org/patch/9221183/
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2016-07-19 18:13 UTC | newest]
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2016-07-08 9:28 [PATCH] bcma: define ChipCommon B MII registers Rafał Miłecki
2016-07-08 15:14 ` [PATCH V2] " Rafał Miłecki
2016-07-19 18:13 ` [V2] " Kalle Valo
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